www.pudn.com > Flash.rar > flashcode.c

/********************************************************************************/ 
/* flashcode.c									*/  
/* Written by: Kyle Castille							*/ 
/* Updated by: Michael Haag (6/27/01)						*/	                                                
/* This program will create a dummy data buffer with an incrementing count	*/ 
/* in internal memory, and then program this data to the AM29LV800-90 Flash	*/ 
/* which is a 1M x 8/512k x 16, 90 ns Flash memory.				*/ 
/* 										*/ 
/* This program assumes that the ARDY interface is used, so no software		*/ 
/* checking is done to detect end of operation for erase or program		*/ 
/*										*/ 
/********************************************************************************/ 
#include  
#include  
#include  
 
#define CHIP_6711C 
 
#define		CE1_ADDRS	0x90000000 
#define		INT_MEM		0x0000a000 
#define 	CE1_CNTRL	0x01800004 
 
#define 	FLASH_ADDRS		CE1_ADDRS 
#define 	SRC_ADDRS		INT_MEM 
#define 	LENGTH			0x400 
#define 	TRUE			1 
#define 	FALSE			0 
 
//void emif_config(); 
void load_source (short * source, int num_words); 
void erase_flash(int * flash_addrs); 
void program_flash(short * source, int * flash_addrs, int num_words); 
void emif_config() 
 
void main(void) 
{ 
	int * flash_ptr = (int *)FLASH_ADDRS; 
	short * src_ptr = (short *)SRC_ADDRS; 
 
	/* initialize the CSL library */ 
 	 CSL_init(); 
 
	emif_config(); 
	load_source(src_ptr, LENGTH); 
	erase_flash(flash_ptr); 
	program_flash(src_ptr, flash_ptr, LENGTH); 
	printf("Successful erase and program!!!"); 
} 
 
/****************************************************************************/ 
/* emif_config :Routine to configure the Emif for operation with 			*/ 
/*		AM29LV800-90 at CE1.  This routine sets the CE1 control register	*/ 
/*		for a 32 bit asynchronous memory interface with the following 		*/ 
/*		parameters:								*/ 
/*		Mtype = 010 (32-bit async memory)					*/ 
/*		Read Setup/Strobe/Hold = 1/21/3						*/ 
/*		Write Setup/Strobe/Hold = 2/13/3					*/ 
/*											*/ 
/****************************************************************************/ 
 
void emif_config() 
{ 
	/* Create Global Control Register field */ 
	Uint32 global_ctl = EMIF_GBLCTL_RMK( 
				EMIF_GBLCTL_NOHOLD_DEFAULT, 
				//EMIF_GBLCTL_SDCEN_DISABLE, 
				//EMIF_GBLCTL_SSCEN_DISABLE, 
				EMIF_GBLCTL_EKEN_DEFAULT, 
				EMIF_GBLCTL_CLK1EN_DISABLE, 
				EMIF_GBLCTL_CLK2EN_DISABLE); 
				//EMIF_GBLCTL_SSCRT_CPUOVR2, 
				//EMIF_GBLCTL_RBTR8_HPRI); 
	 
	/* Create CE1 Control Register field */ 
	Uint32 ce1_control = EMIF_CECTL_RMK( 
				EMIF_CECTL_WRSETUP_OF(4), 
				EMIF_CECTL_WRSTRB_OF(6), 
				EMIF_CECTL_WRHLD_OF(2), 
				EMIF_CECTL_RDSETUP_OF(2), 
				EMIF_CECTL_TA_DEFAULT, 
				EMIF_CECTL_RDSTRB_OF(12), 
				EMIF_CECTL_MTYPE_ASYNC16,				 
				EMIF_CECTL_RDHLD_OF(2) ); 
				 
	EMIF_configArgs( 
				EMIF_GBLCTL_OF(global_ctl),		/* global control 	 */ 
				EMIF_CECTL_DEFAULT,				/* CE0 DEFAULT	 */ 
				EMIF_CECTL_OF(ce1_control),     /* 16-bit async FLASH*/ 
				EMIF_CECTL_DEFAULT,				/* 32-bit async SRAM */ 
				EMIF_CECTL_DEFAULT,				/* CE3 control		 */ 
				EMIF_SDCTL_DEFAULT, 			/* SDRAM control 	 */ 
				EMIF_SDTIM_DEFAULT,				/* SDRAM timing		 */ 
				EMIF_SDEXT_DEFAULT 
		); 
 
} 
 
/****************************************************************************/ 
/* load_source : Routine to load the source memory with data.  This routine	*/ 
/*		loads an incrementing count into the source memory for  	*/ 
/*		demonstration purposes.					     	*/ 
/* Inputs:									*/ 
/*	source_ptr	: 	Address to be used as the source buffer		*/ 
/*	length   	: 	Length to be programmed				*/ 
/*										*/ 
/****************************************************************************/ 
 
void load_source(short * source_ptr, int length) 
{ 
	int i; 
 
	for (i = 0; i < length; i ++){ 
		* source_ptr++ = i; 
	} 
} 
 
/****************************************************************************/ 
/* erase_flash : Routine to erase entire FLASH memory AM29LV800 (1M x 8bit/	*/ 
/*		512k x 16bit)							*/ 
/* Inputs:									*/ 
/*	flash_ptr: Address of the FLASH PEROM			           	*/ 
/* 										*/ 
/****************************************************************************/ 
	 
void erase_flash(int * flash_ptr) 
{ 
	/* Control addresses are left shifted so that 		*/ 
	/*  they appear correctly on the EMIF's EA[19:2]	*/ 
	/* Byte address << 2 == Word Address				*/ 
 
	int * ctrl_addr1 = (int *) ((int)flash_ptr + (0x555 << 1)); 
	int * ctrl_addr2 = (int *) ((int)flash_ptr + (0x2aa << 1));; 
 
	* ctrl_addr1 = 0xaa;	/* Erase sequence writes to addr1 and addr2 	*/ 
	* ctrl_addr2 = 0x55;	/*  with this data 								*/ 
	* ctrl_addr1 = 0x80; 
	* ctrl_addr1 = 0xaa; 
	* ctrl_addr2 = 0x55; 
	* ctrl_addr1 = 0x10; 
} 
 
/****************************************************************************/ 
/* program_flash: Routine to program FLASH AM29LV800				*/ 
/* Inputs:									*/ 
/*	flash_ptr	: Address of the FLASH  				*/ 
/*	source_ptr	: Address of the array containing the code to program 	*/ 
/* 	length		: Length to be programmed				*/ 
/*										*/ 
/****************************************************************************/ 
 
void program_flash(short * source_ptr, int * flash_ptr, int length) 
{ 
	int i; 
 
	/* Control addresses are left shifted so that 	 	*/ 
	/*  they appear correctly on the EMIF's EA[19:2]	*/ 
	/* Byte address << 1 == Word Address		    	*/ 
	int * ctrl_addr1 = (int *) ((int)flash_ptr + (0x555 << 1)); 
	int * ctrl_addr2 = (int *) ((int)flash_ptr + (0x2aa << 1));; 
		 
	for (i = 0; i < length; i++){ 
 
		* ctrl_addr1 = 0xaa; 
		* ctrl_addr2 = 0x55; 
		* ctrl_addr1 = 0xa0; 
 
		* flash_ptr++ = * source_ptr++; 
	} 
}