www.pudn.com > driver.zip > Sil3124.h


/****************************************************************************** 
 * File Name: 
 *      Sil3124.h 
 * Description: 
 *      The header file for the Silicon Image Sertial ATA Controller's Windows WDM driver. 
 * Revision History: 
 *      10-11-07 : Sil3124 1.00 
 ******************************************************************************/ 
//#include  
#include  
#include "DebugPrint.h" 
#include "IoCtl.h" 
/////////////////////////////////////////////////////////////////////////////// 
// structure for ATA commands 
typedef UCHAR BYTE; 
 
typedef struct 
{ 
	BYTE status;	// Return status of the function 
	BYTE fxdc;      //= BASE+FDC;    //Global Register Address Definitions 
	BYTE data;      //= BASE; data register 
	BYTE feat_pre;      //= BASE+1; feature register 
	BYTE feat_cur;      //= BASE+1;  
	BYTE secc_pre;      //= BASE+2; sector count register 
	BYTE secc_cur;      //= BASE+2;  
	BYTE secn_pre;      //= BASE+3; sector number register 
	BYTE secn_cur;      //= BASE+3; 
	BYTE cyll_pre;      //= BASE+4; cylinder low register 
	BYTE cyll_cur;      //= BASE+4; 
	BYTE cylh_pre;      //= BASE+5; cylinder high register 
	BYTE cylh_cur;      //= BASE+5; 
	BYTE devh;      //= BASE+6;	    device/head high register 
	BYTE cmnd;	    //= BASE+7      command register 
	BYTE rBuf[512*512]; 
	BYTE wBuf[512*512]; 
} SATAREG48,*PSATAREG48; 
 
typedef struct 
{ 
	USHORT Control;                       //Control Field 
	USHORT ProtocolOverride;              //Protocol Override Field  
	ULONG ReceivedCount;                //Received Transfer Count 
	BYTE FISType;                       //FIS Type 
	BYTE PMP;                           //PMP 
	BYTE Command_Status;               //Command/Status 
	BYTE Features_Error;               //features/error 
	BYTE SectorNumber;                 //sector number 
	BYTE CylLow;                       //cylinder low 
	BYTE CylHigh;                      //cylinder high 
	BYTE DevHead;                      //device/head 
	BYTE SectorNumberExp;              //sector number(Exp) 
	BYTE CylLowExp;                    //cylinder low(Exp) 
	BYTE CylHighExp;                   //cylinder high(Exp) 
	BYTE FeaturesExp;                  //features(Exp) 
    BYTE SectorCount;                  //sector count 
	BYTE SectorCountExp;               //sector count(Exp) 
	BYTE Reserved0;                   //reserved field between Sector Count and Device Control 
	BYTE DeviceControl;               //Device Control 
	ULONG Reserved1; 
	ULONG Reserved2;  
	ULONG SGE0Low;                   //SGE0 data address low 
	ULONG SGE0High;                  //SGE0 data address high 
	ULONG SGE0Count;                 //SGE0 data count 
	ULONG SGE0Control;              //SGE0 control fields including TRM LNK DRD XCF 
 
	ULONG SGE1Low;                  //SGE1 data address low 
	ULONG SGE1High;                 //SGE1 data address high 
	ULONG SGE1Count;                 //SGE1 data count 
	ULONG SGE1Control;               //SGE1 control fields including TRM LNK DRD XCF 
} PRB,*pPRB; 
 
typedef struct 
{ 
	ULONG       PortAddress; 
    PSATAREG48  SATAREG48Buffer; 
} DmaInfo,*pDmaInfo; 
 
typedef struct 
{ 
	ULONG SGE0Low;                   //SGE0 data address low 
	ULONG SGE0High;                  //SGE0 data address high 
	ULONG SGE0Count;                 //SGE0 data count 
	ULONG SGE0Control;              //SGE0 control fields including TRM LNK DRD XCF 
 
	ULONG SGE1Low;                  //SGE1 data address low 
	ULONG SGE1High;                 //SGE1 data address high 
	ULONG SGE1Count;                 //SGE1 data count 
	ULONG SGE1Control;               //SGE1 control fields including TRM LNK DRD XCF 
 
	ULONG SGE2Low;                   //SGE2 data address low 
	ULONG SGE2High;                  //SGE2 data address high 
	ULONG SGE2Count;                 //SGE2 data count 
	ULONG SGE2Control;              //SGE2 control fields including TRM LNK DRD XCF 
 
	ULONG SGE3Low;                  //SGE3 data address low 
	ULONG SGE3High;                 //SGE3 data address high 
	ULONG SGE3Count;                 //SGE3 data count 
	ULONG SGE3Control;               //SGE3 control fields including TRM LNK DRD XCF 
} SGTable,*pSGTable; 
 
 
// Device Extension Structure 
typedef struct _DEVICE_EXTENSION  
{ 
	PDEVICE_OBJECT		pDeviceObject;			// device object this extension belongs to 
	PDEVICE_OBJECT		pLowerDeviceObject;		// next lower driver in same stack 
	PDEVICE_OBJECT		pPhysicalDeviceObject;	// the PDO 
 
	UNICODE_STRING		InterfaceName;	    	// interface name 
 
	DEVICE_POWER_STATE	DevicePower;			// current device power state 
	SYSTEM_POWER_STATE	SystemPower;			// current system power state 
 
	LONG OpenHandleCount;	// Count of open handles 
 
	LONG                Handles;					// # open handles 
	BOOLEAN             GotResource;             //whether obtain resources 
///////////////////////////////////////////////////////////////////////////////// 
//Device Resources 
///////////////////////////////////////////////////////////////////////////////// 
/******************************************************************************** 
*Port Resource 
*********************************************************************************/ 
    PHYSICAL_ADDRESS    BaseAddress_Indirect_Access; 
	ULONG               IORangeBytes; 
/******************************************************************************** 
*Memory Resource 
*********************************************************************************/ 
    PHYSICAL_ADDRESS    BaseAddress_GlobalRegister; 
	PUCHAR               Map_GlobalRegister; 
	ULONG               GlobalRegisterBytes; 
	PHYSICAL_ADDRESS    BaseAddress_PortRegister; 
	PUCHAR               Map_PortRegister; 
	ULONG               PortRegisterBytes; 
/******************************************************************************** 
*DMA information 
********************************************************************************/ 
	PDMA_ADAPTER AdapterObject ;                   //represents a bus dma adapter 
	PSCATTER_GATHER_LIST ScatterGatherList; 
 
	PHYSICAL_ADDRESS *LogicalAddress,*SGTPAddress; 
    ULONG             SGEControl; 
 
	pSGTable          pSGT; 
 
	ULONG PortBaseAddress; 
    ULONG MaximumMapRegisters ;                        
    PVOID CurrentVirtualAddress ; 
    ULONG CurrentTransferLength ; 
    ULONG BytesTransfer,BytesTransfered; 
    BOOLEAN WriteToDevice ; 
 
	pDmaInfo pDmaContext; 
/******************************************************************************** 
*Interrupt Resource 
*********************************************************************************/ 
    ULONG							vector; 
    KIRQL							IrqL; 
	KAFFINITY						affinity; 
    BOOLEAN							GotInterrupt; 
	BOOLEAN							irqshare; 
    KINTERRUPT_MODE					mode; 
 
	// Interrupt handling variables 
	ULONG				InterruptSource; 
    PKINTERRUPT			InterruptObject;		// address of interrupt object 
 
	PKEVENT				pWaitEvent;             //event pointer 
 
	BOOLEAN				bStopping;				// 
	KEVENT				StoppingEvent;			// Set when all pending I/O complete 
 
	PUCHAR              ReadBuffer; 
	PUCHAR              WriteBuffer; 
	pPRB                PRBStruct; 
    ULONG               TansferedCount; 
	BOOLEAN             NeedToHandle; 
 
	 
} DEVICE_EXTENSION, *PDEVICE_EXTENSION; 
//				Define Device Extention 
 
//////////////////////////////////////////////////////////////////////////////////// 
 
/********************************************** 
*               Initiate Functions 
**********************************************/ 
 
VOID DriverUnload(IN PDRIVER_OBJECT pDriverObject); 
 
/********************************************** 
*               Pnp Functions 
**********************************************/ 
NTSTATUS DispatchPnp(IN PDEVICE_OBJECT fdo, 
					 IN PIRP pIrp); 
NTSTATUS DefaultPnpHandler(IN PDEVICE_OBJECT fdo, 
						   IN PIRP pIrp); 
 
NTSTATUS PnpStartDevice(IN PDEVICE_OBJECT fdo, 
						IN PIRP pIrp); 
NTSTATUS StartDevice(IN PDEVICE_OBJECT fdo, 
					 IN PCM_PARTIAL_RESOURCE_LIST ResourceListRaw, 
					 IN PCM_PARTIAL_RESOURCE_LIST ResourceList); 
NTSTATUS ForwardAndWait(IN PDEVICE_OBJECT fdo, 
						IN PIRP pIrp); 
 
NTSTATUS OnRequestComplete(IN PDEVICE_OBJECT fdo, 
						   IN PIRP pIrp, 
						   IN PKEVENT pKEvent); 
 
NTSTATUS PnpStopDevice(IN PDEVICE_OBJECT fdo, 
					   IN PIRP pIrp); 
VOID StopDevice(IN PDEVICE_OBJECT fdo); 
NTSTATUS PnpRemoveDevice(IN PDEVICE_OBJECT fdo, 
						 IN PIRP pIrp); 
NTSTATUS PnpQueryCapabilitiesHandler( IN PDEVICE_OBJECT fdo, IN PIRP Irp); 
NTSTATUS PnpQueryRemoveDeviceHandler( IN PDEVICE_OBJECT fdo, IN PIRP Irp); 
 
 
NTSTATUS CompleteRequest(IN PIRP Irp, 
						 IN NTSTATUS status); 
NTSTATUS CompleteRequestInfo(IN PIRP Irp,  
							 IN NTSTATUS status,  
							 IN ULONG_PTR info); 
NTSTATUS AddDevice(IN PDRIVER_OBJECT pDriverObject, 
				   IN PDEVICE_OBJECT pdo); 
 
/********************************************** 
*               Dispath Functions 
**********************************************/ 
NTSTATUS DispatchCreate(IN PDEVICE_OBJECT fdo, 
						IN PIRP pIrp); 
NTSTATUS DispatchClose(IN PDEVICE_OBJECT fdo, 
					   IN PIRP pIrp); 
NTSTATUS DispatchRead(IN PDEVICE_OBJECT fdo, 
					  IN PIRP pIrp); 
NTSTATUS DispatchWrite(IN PDEVICE_OBJECT fdo, 
					   IN PIRP pIrp); 
VOID StartIo(IN PDEVICE_OBJECT fdo, 
				  IN PIRP pIrp); 
 
NTSTATUS DispatchIoControl(IN PDEVICE_OBJECT fdo, 
						   IN PIRP pIrp); 
 
NTSTATUS IOCTL_GET_3124REGISTER_PORT0_BASEADDRESS_Handler(IN PDEVICE_OBJECT fdo, 
						                                  IN PIRP pIrp); 
NTSTATUS IOCTL_GET_3124REGISTER_PORT1_BASEADDRESS_Handler(IN PDEVICE_OBJECT fdo, 
						                                  IN PIRP pIrp); 
NTSTATUS IOCTL_GET_3124REGISTER_PORT2_BASEADDRESS_Handler(IN PDEVICE_OBJECT fdo, 
						                                  IN PIRP pIrp); 
NTSTATUS IOCTL_GET_3124REGISTER_PORT3_BASEADDRESS_Handler(IN PDEVICE_OBJECT fdo, 
						                                  IN PIRP pIrp); 
NTSTATUS IOCTL_GET_3124REGISTER_GLOBAL_BASEADDRESS_Handler(IN PDEVICE_OBJECT fdo, 
						                                   IN PIRP pIrp); 
NTSTATUS IOCTL_GET_3124PORT_INDIRECT_BASEADDRESS_Handler(IN PDEVICE_OBJECT fdo, 
						                                 IN PIRP pIrp); 
 
NTSTATUS IOCTL_3124REGISTER_PIO_READ_Handler(IN PDEVICE_OBJECT fdo, 
						                         IN PIRP pIrp); 
NTSTATUS IOCTL_3124REGISTER_PIO_WRITE_Handler(IN PDEVICE_OBJECT fdo, 
						                          IN PIRP pIrp); 
 
NTSTATUS IOCTL_GET_3124TASKFILE_Handler(IN PDEVICE_OBJECT fdo, 
						                       IN PIRP pIrp); 
NTSTATUS IOCTL_3124REGISTER_COMMAND_Handler(IN PDEVICE_OBJECT fdo, 
						                       IN PIRP pIrp); 
 
NTSTATUS IOCTL_3124REGISTER_MAP_PORT_Handler(IN PDEVICE_OBJECT fdo, 
						                IN PIRP pIrp); 
NTSTATUS IOCTL_3124REGISTER_MAP_GLOBAL_Handler(IN PDEVICE_OBJECT fdo, 
						                IN PIRP pIrp); 
 
NTSTATUS IOCTL_3124REGISTER_UNMAP_PORT_Handler(IN PDEVICE_OBJECT fdo, 
						                  IN PIRP pIrp); 
NTSTATUS IOCTL_3124REGISTER_UNMAP_GLOBAL_Handler(IN PDEVICE_OBJECT fdo, 
						                  IN PIRP pIrp); 
 
NTSTATUS IOCTL_3124_PORT_RESET_Handler(IN PDEVICE_OBJECT fdo, 
						               IN PIRP pIrp); 
 
NTSTATUS IOCTL_3124_DMA_Handler(IN PDEVICE_OBJECT fdo, 
						             IN PIRP pIrp); 
 
VOID 
  AdapterListControl( 
    IN PDEVICE_OBJECT fdo, 
    IN PIRP           pIrp, 
    IN PSCATTER_GATHER_LIST  ScatterGather, 
    IN PVOID  Context 
    ); 
 
/********************************************** 
*               Interupt Functions 
**********************************************/ 
BOOLEAN OnInterrupt(IN PKINTERRUPT pInterrupt, 
					IN PDEVICE_EXTENSION pdx); 
VOID DpcForIsr(IN PKDPC pDpc, 
			   IN PDEVICE_OBJECT fdo, 
			   IN PIRP Irp,  
			   IN PDEVICE_EXTENSION pdx); 
 
/********************************************** 
*               Power Functions 
**********************************************/ 
 
NTSTATUS DispatchPower(IN PDEVICE_OBJECT fdo, 
					   IN PIRP Irp); 
NTSTATUS DefaultPowerHandler(IN PDEVICE_OBJECT fdo, 
							 IN PIRP Irp);