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LIBRARY IEEE; 
USE IEEE.STD_LOGIC_1164.ALL; 
USE IEEE.STD_LOGIC_UNSIGNED.ALL; 
ENTITY LCNT8 IS                              -- 8位可自加载加法计数器 
    PORT (    CLK : IN STD_LOGIC; 
                D : OUT std_logic_vector(15 downto 0) ); 
END LCNT8; 
ARCHITECTURE behav OF LCNT8 IS 
    SIGNAL COUNT : std_logic_vector(15 downto 0) ; 
BEGIN 
    PROCESS( CLK ) 
    BEGIN 
        IF CLK'EVENT AND CLK = '1' THEN 
             COUNT <= COUNT + 1; 
        END IF; 
    END PROCESS; 
    D <= COUNT ; 
END behav;