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LIBRARY IEEE;                                            -- 24进制计数器 
USE IEEE.STD_LOGIC_1164.ALL; 
USE IEEE.STD_LOGIC_UNSIGNED.ALL; 
ENTITY CNTA IS 
    PORT ( CLK : IN STD_LOGIC;  
			U_D : IN STD_LOGIC; 
              CQ : OUT STD_LOGIC_VECTOR(4 DOWNTO 0)); 
END CNTA; 
ARCHITECTURE behav OF CNTA IS 
    SIGNAL CQI : STD_LOGIC_VECTOR(4 DOWNTO 0); 
BEGIN 
    PROCESS(CLK) 
    BEGIN 
        IF CLK'EVENT AND CLK = '1' THEN 
            IF U_D = '1' THEN 
                IF CQI = 31 THEN   CQI <= "11111";         -- 模为32 
                     ELSE 
                    CQI <= CQI + 1; 
                END IF; 
				ELSE 
				IF CQI=0 THEN  CQI<= "00000"; 
					ELSE 
					CQI<= CQI-1; 
				END IF; 
	       END IF; 
		END IF; 
    END PROCESS; 
  CQ(4 DOWNTO 0) <= CQI; 
END behav;