www.pudn.com > Bit1611_demo_code.rar > BIT5101.H
/* **********************************************************************
Copyright (c) 2002-2006 Beyond Innovation Technology Co., Ltd
All rights are reserved. Reproduction in whole or in parts is
prohibited without the prior written consent of the copyright owner.
----------------------------------------------------------------------
Module: BIT5101.H
Purpose: Interface of BIT5101.
Version: 0.01 11:33AM 2005/11/17
Compiler: Keil 8051 C Compiler v8.01
Reference:
[1] BIT5101 8051 MICROCONTROLLER WITH 64K FLASH AND ISP Version 0.01,
2004/10/25, Beyond Innovation Technology
----------------------------------------------------------------------
Modification:
R0.01 11:33AM 2005/11/17 Jeffrey Chang
Reason:
1. Original.
Solution:
********************************************************************** */
#ifndef _BIT5101_H_
#define _BIT5101_H_
/* BYTE Registers */
sfr P0 = 0x80; // Port 0
sfr P1 = 0x90; // Port 1
sfr P2 = 0xA0; // Port 2
sfr P3 = 0xB0; // Port 3
sfr P4 = 0xD8; // Port 4 (BIT5101)
sfr SP = 0x81; // Stack Pointer
sfr DPL = 0x82; // Data Pointer Low
sfr DPH = 0x83; // Data Pointer high
sfr PCON = 0x87; // Power Control
sfr TCON = 0x88; // Timer Control
sfr TMOD = 0x89; // Timer Mode
sfr TL0 = 0x8A; // Timer 0 Low
sfr TL1 = 0x8B; // Timer 1 Low
sfr TH0 = 0x8C; // Timer 0 High
sfr TH1 = 0x8D; // Timer 1 High
sfr WDTC = 0x8F; // (BIT5101) Watchdog Timer Control Register
sfr SCON = 0x98; // Serial Control
sfr SBUF = 0x99; // Serial Data Buffer
sfr IE = 0xA8; // Interrupt Enable
sfr IP = 0xB8; // Interrupt Priority
sfr CHPCON = 0xBF; // (BIT5101) ISP Control Register
sfr XICON = 0xC0; // (BIT5101) External Interrupt Control
sfr PSW = 0xD0; // Program Status Word
sfr ACC = 0xE0; // Accumulator
sfr B = 0xF0; // B register
/* ISP SFR */
sfr ISP_CTRL= 0xE8; // (BIT5101)
sfr ISP_ADDR= 0xE9; // (BIT5101)
/* /// 8052 Extensions /// */
sfr T2CON = 0xC8; // Timer 2 Control
sfr T2MOD = 0xC9; // Timer 2 Mode Control
sfr RCAP2L = 0xCA; // Timer 2 Capture Low
sfr RCAP2H = 0xCB; // Timer 2 Capture High
sfr TL2 = 0xCC; // Timer 2 Low
sfr TH2 = 0xCD; // Timer 2 High
/* BIT Registers */
/* TCON */
sbit TF1 = 0x8F;
sbit TR1 = 0x8E;
sbit TF0 = 0x8D;
sbit TR0 = 0x8C;
sbit IE1 = 0x8B;
sbit IT1 = 0x8A;
sbit IE0 = 0x89;
sbit IT0 = 0x88;
/* Bit Register */
sbit P0_0 = 0x80;
sbit P0_1 = 0x81;
sbit P0_2 = 0x82;
sbit P0_3 = 0x83;
sbit P0_4 = 0x84;
sbit P0_5 = 0x85;
sbit P0_6 = 0x86;
sbit P0_7 = 0x87;
sbit P1_0 = 0x90;
sbit P1_1 = 0x91;
sbit P1_2 = 0x92;
sbit P1_3 = 0x93;
sbit P1_4 = 0x94;
sbit P1_5 = 0x95;
sbit P1_6 = 0x96;
sbit P1_7 = 0x97;
/* T2 */
sbit T2EX = 0x91;
sbit T2 = 0x90;
/* SCON */
sbit RI = 0x98;
sbit TI = 0x99;
sbit RB8 = 0x9A;
sbit TB8 = 0x9B;
sbit REN = 0x9C;
sbit SM2 = 0x9D;
sbit SM1 = 0x9E;
sbit SM0 = 0x9F;
/* P2 */
sbit P2_0 = 0xA0;
sbit P2_1 = 0xA1;
sbit P2_2 = 0xA2;
sbit P2_3 = 0xA3;
sbit P2_4 = 0xA4;
sbit P2_5 = 0xA5;
sbit P2_6 = 0xA6;
sbit P2_7 = 0xA7;
/* IE */
sbit EX0 = 0xA8;
sbit ET0 = 0xA9;
sbit EX1 = 0xAA;
sbit ET1 = 0xAB;
sbit ES = 0xAC;
sbit ET2 = 0xAD;
sbit EA = 0xAF;
/* P3 */
sbit P3_0 = 0xB0;
sbit P3_1 = 0xB1;
sbit P3_2 = 0xB2;
sbit P3_3 = 0xB3;
sbit P3_4 = 0xB4;
sbit P3_5 = 0xB5;
sbit P3_6 = 0xB6;
sbit P3_7 = 0xB7;
/* P3 */
sbit RXD = 0xB0;
sbit TXD = 0xB1;
sbit INT0 = 0xB2;
sbit INT1 = 0xB3;
sbit T0 = 0xB4;
sbit T1 = 0xB5;
sbit WR = 0xB6;
sbit RD = 0xB7;
/* XICON */
sbit IT2 = 0xC0; // External interrupt 2 is falling-edge/low-level
sbit IE2 = 0xC1;
sbit EX2 = 0xC2; // External interrupt 2 enable
sbit PX2 = 0xC3; // External interrupt 2
sbit IT3 = 0xC4; // External interrupt 3 is falling-edge/low-level
sbit IE3 = 0xC5;
sbit EX3 = 0xC6; // External interrupt 3 enable
sbit PX3 = 0xC7; // External interrupt 3
/* T2CON */
sbit CP_RL2 = 0xC8;
sbit C_T2 = 0xC9; // C/nT2
sbit TR2 = 0xCA;
sbit EXEN2 = 0xCB;
sbit TCLK = 0xCC;
sbit RCLK = 0xCD;
sbit EXF2 = 0xCE;
sbit TF2 = 0xCF;
/* PSW */
sbit P = 0xD0;
sbit OV = 0xD2;
sbit RS0 = 0xD3;
sbit RS1 = 0xD4;
sbit F0 = 0xD5;
sbit AC = 0xD6;
sbit CY = 0xD7;
/* P4 */
sbit P4_0 = 0xD8; // (BIT5101)
sbit P4_1 = 0xD9; // (BIT5101)
sbit P4_2 = 0xDA; // (BIT5101)
sbit P4_3 = 0xDB; // (BIT5101)
#endif /* _BIT5101_H_ */
/* **********************************************************************
Description:
********************************************************************** */
/* %% End Of File %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */