www.pudn.com > FX GPIF.zip > gpif.c
//
// This program configures the General Purpose Interface.
// Parts of this program are automatically generated using the GPIF Tool.
// Please do not modify sections of text which are marked as "DO NOT EDIT ...".
// You can modify the comments section of this GPIF program file using the dropdown menus
// and pop-up dialogs. These controls are available as hot spots in the text. Modifying the
// comments section will generate program code which will implement your GPIF program.
//
// DO NOT EDIT ...
// GPIF Initialization
// Interface Timing Async
// Data Bus Width 8 BIT
// Internal Ready Init IntRdy=1
// CTL Out Tristate-able Binary
// SingleWrite WF Select 3
// SingleRead WF Select 2
// FifoWrite WF Select 0
// FifoRead WF Select 1
// Data Bus Idle Drive Tristate
// END DO NOT EDIT
// DO NOT EDIT ...
// GPIF Wave Names
// Wave 0 = FIFOWrAs
// Wave 1 = FIFORdAs
// Wave 2 = SnglRdAs
// Wave 3 = SnglWrAs
// GPIF Ctrl Outputs Level
// CTL 0 = ASEL CMOS
// CTL 1 = NC CMOS
// CTL 2 = AOE CMOS
// CTL 3 = NC CMOS
// CTL 4 = SLWR CMOS
// CTL 5 = SLRD CMOS
// GPIF Rdy Inputs
// RDY0 = AINPF
// RDY1 = NC
// RDY2 = AOUTPF
// RDY3 = NC
// RDY4 = AINFF
// RDY5 = NC
// FIFOFlag = FIFOFlag
// IntReady = IntReady
// END DO NOT EDIT
// DO NOT EDIT ...
//
// GPIF Waveform 0: FIFOWrAs
//
// Interval 0 1 2 3 4 5 6 Idle (7)
// _________ _________ _________ _________ _________ _________ _________ _________
//
// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val
// DataMode NO Data NO Data Activate Activate NO Data NO Data NO Data
// NextData SameData SameData SameData SameData NextData SameData SameData
// Int Trig No Int No Int No Int No Int No Int No Int No Int
// IF/Wait Wait 1 IF Wait 2 Wait 5 IF Wait 1 Wait 1
// Term A AINFF AINFF
// LFunc AND AND
// Term B AINFF AINFF
// Branch1 Then 0 ThenIdle
// Branch0 Else 2 ElseIdle
// Re-Exec No No
// Sngl/CRC Default Default Default Default Default Default Default
// ASEL 0 0 0 0 1 1 1 1
// NC 1 1 1 1 1 1 1 1
// AOE 1 1 1 1 1 1 1 1
// NC 1 1 1 1 1 1 1 1
// SLWR 1 1 0 1 1 1 1 1
// SLRD 1 1 1 1 1 1 1 1
//
// END DO NOT EDIT
// DO NOT EDIT ...
//
// GPIF Waveform 1: FIFORdAs
//
// Interval 0 1 2 3 4 5 6 Idle (7)
// _________ _________ _________ _________ _________ _________ _________ _________
//
// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val
// DataMode NO Data NO Data NO Data Activate NO Data NO Data NO Data
// NextData SameData SameData SameData SameData SameData SameData SameData
// Int Trig No Int No Int No Int No Int No Int No Int Trig Int
// IF/Wait Wait 1 IF Wait 2 Wait 5 IF Wait 1 IF
// Term A AOUTPF AOUTPF AOUTPF
// LFunc AND AND AND
// Term B AOUTPF AOUTPF AOUTPF
// Branch1 Then 6 ThenIdle Then 6
// Branch0 Else 2 ElseIdle Else 6
// Re-Exec No No No
// Sngl/CRC Default Default Default Default Default Default Default
// ASEL 0 0 0 0 1 1 1 1
// NC 1 1 1 1 1 1 1 1
// AOE 1 1 0 0 1 1 1 1
// NC 1 1 1 1 1 1 1 1
// SLWR 1 1 1 1 1 1 1 1
// SLRD 1 1 0 1 1 1 1 1
//
// END DO NOT EDIT
// DO NOT EDIT ...
//
// GPIF Waveform 2: SnglRdAs
//
// Interval 0 1 2 3 4 5 6 Idle (7)
// _________ _________ _________ _________ _________ _________ _________ _________
//
// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val
// DataMode NO Data NO Data NO Data Activate NO Data NO Data NO Data
// NextData SameData SameData SameData SameData SameData SameData SameData
// Int Trig No Int No Int No Int No Int No Int No Int Trig Int
// IF/Wait Wait 1 IF Wait 2 Wait 5 IF Wait 1 IF
// Term A AOUTPF AOUTPF AOUTPF
// LFunc AND AND AND
// Term B AOUTPF AOUTPF AOUTPF
// Branch1 Then 6 ThenIdle Then 6
// Branch0 Else 2 ElseIdle Else 6
// Re-Exec No No No
// Sngl/CRC Default Default Default Default Default Default Default
// ASEL 0 0 0 0 1 1 1 1
// NC 1 1 1 1 1 1 1 1
// AOE 1 1 0 0 1 1 1 1
// NC 1 1 1 1 1 1 1 1
// SLWR 1 1 1 1 1 1 1 1
// SLRD 1 1 0 1 1 1 1 1
//
// END DO NOT EDIT
// DO NOT EDIT ...
//
// GPIF Waveform 3: SnglWrAs
//
// Interval 0 1 2 3 4 5 6 Idle (7)
// _________ _________ _________ _________ _________ _________ _________ _________
//
// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val
// DataMode NO Data NO Data Activate Activate NO Data NO Data NO Data
// NextData SameData SameData SameData SameData SameData SameData SameData
// Int Trig No Int No Int No Int No Int No Int No Int No Int
// IF/Wait Wait 1 IF Wait 2 Wait 5 IF Wait 1 Wait 1
// Term A AINFF AINFF
// LFunc AND AND
// Term B AINFF AINFF
// Branch1 Then 0 ThenIdle
// Branch0 Else 2 ElseIdle
// Re-Exec No No
// Sngl/CRC Default Default Default Default Default Default Default
// ASEL 0 0 0 0 1 1 1 1
// NC 1 1 1 1 1 1 1 1
// AOE 1 1 1 1 1 1 1 1
// NC 1 1 1 1 1 1 1 1
// SLWR 1 1 0 1 1 1 1 1
// SLRD 1 1 1 1 1 1 1 1
//
// END DO NOT EDIT
// GPIF Program Code
// DO NOT EDIT ...
#include "ezusb.h"
#include "ezregs.h"
#include "Fx.h"
// END DO NOT EDIT
// DO NOT EDIT ...
const char xdata WaveData[128] =
{
// Wave 0
/* LenBr */ 0x01, 0x02, 0x02, 0x05, 0x3F, 0x01, 0x01, 0x07,
/* Opcode*/ 0x00, 0x01, 0x02, 0x02, 0x05, 0x00, 0x00, 0x00,
/* Output*/ 0xFE, 0xFE, 0xEE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF,
/* LFun */ 0x00, 0x24, 0x12, 0x1B, 0x24, 0x2D, 0x36, 0x3F,
// Wave 1
/* LenBr */ 0x01, 0x32, 0x02, 0x05, 0x3F, 0x01, 0x36, 0x07,
/* Opcode*/ 0x00, 0x01, 0x00, 0x02, 0x01, 0x00, 0x11, 0x00,
/* Output*/ 0xFE, 0xFE, 0xDA, 0xFA, 0xFF, 0xFF, 0xFF, 0xFF,
/* LFun */ 0x00, 0x12, 0x12, 0x1B, 0x12, 0x2D, 0x12, 0x3F,
// Wave 2
/* LenBr */ 0x01, 0x32, 0x02, 0x05, 0x3F, 0x01, 0x36, 0x07,
/* Opcode*/ 0x00, 0x01, 0x00, 0x02, 0x01, 0x00, 0x11, 0x00,
/* Output*/ 0xFE, 0xFE, 0xDA, 0xFA, 0xFF, 0xFF, 0xFF, 0xFF,
/* LFun */ 0x00, 0x12, 0x12, 0x1B, 0x12, 0x2D, 0x12, 0x3F,
// Wave 3
/* LenBr */ 0x01, 0x02, 0x02, 0x05, 0x3F, 0x01, 0x01, 0x07,
/* Opcode*/ 0x00, 0x01, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00,
/* Output*/ 0xFE, 0xFE, 0xEE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF,
/* LFun */ 0x00, 0x24, 0x12, 0x1B, 0x24, 0x2D, 0x36, 0x3F
};
// END DO NOT EDIT
// DO NOT EDIT ...
const char xdata InitData[7] =
{
/* Regs */ 0x80,0x00,0x00,0xFF,0x02,0xE1,0x00
};
// END DO NOT EDIT
// DO NOT EDIT ...
GpifInit(void)
{
BYTE xdata *Source;
BYTE xdata *Dest;
BYTE x;
IFCONFIG = InitData[4];
ABORT = 0xFF; // abort any pending operation
READY = InitData[0];
CTLOUTCFG = InitData[1];
IDLE_CS = InitData[2];
IDLE_CTLOUT = InitData[3];
WFSELECT = InitData[5];
ABSETUP |= InitData[6];
Source = WaveData; // load GPIFTool generated data
Dest = &WFDESC[0]; // ...into waveform memories
for ( x = 0; x < 128; x++ )
{
*Dest++ = *Source++;
}
INT4SETUP = 0x03; // setup INT4 FIFO/GPIF Autovectoring
EXIF &= ~0x40; // just in case one was pending
GENIE = 0x02; // enable GPIFWF ISR
EIE |= 0x04; // enable INT4 ISR, EIE.2(EIEX4=1)
}
// END DO NOT EDIT
// TO DO: You may add additional code below.
// uncomment to use non application specific GPIF functions...
#ifdef TESTING_GPIF
#define TMOUT 0x0020 // Default Timeout TODO: Set this appropriately
void OtherInit()
{
// TO DO: Add initialization code here.
}
Peripheral_DMAfromAINDATA( BYTE xdata *pEndpDest )
{
DMALEN = AINBC;
// the DMA engine will actually transfer 256 bytes of data when DMALEN=0
if( DMALEN == 0x00 )
{ // DO NOT DMA the data...
// ...handle special case for zero len pkt...
}
else
{
DMASRC = &AINDATA; // point to FIFO-A
DMADEST = pEndpDest; // Typically points to endp buffer
EA = 0; // protect DMA from interrupts occurring in Block0
DMAGO = 0xFF;
while( !( DMAGO & 0x80 ) )
{
; // wait here for the DMA to complete
}
EA = 1; // Enable interrupts...
}
}
Peripheral_DMAtoAOUTDATA( BYTE xdata *pEndpSrc, BYTE len )
{
DMALEN = len;
// the DMA engine will actually transfer 256 bytes of data when DMALEN=0
if( DMALEN == 0x00 )
{ // DO NOT DMA the data...
// ...handle special case for zero len pkt...
}
else
{
DMASRC = pEndpSrc; // Typically points to endp buffer
DMADEST = &AOUTDATA; // point to FIFO-A
EA = 0; // protect DMA from interrupts occurring in Block0
DMAGO = 0xFF;
while( !( DMAGO & 0x80 ) )
{
; // wait here for the DMA to complete
}
EA = 1; // Enable interrupts...
}
}
Peripheral_SetAddress( BYTE gaddr )
{
GPIFADRL = gaddr;
}
Peripheral_SetAOUTFIFOGPIFTC( BYTE xfrcnt )
{
AOUTTC = xfrcnt;
}
Peripheral_SetAINFIFOGPIFTC( BYTE xfrcnt )
{
AINTC = xfrcnt;
}
// write byte(s) to PERIPHERAL, using GPIF and slave FIFOA
Peripheral_AFIFOByteWrite( void )
{
BYTE axfr;
while( !( IDLE_CS & 0x80 ) ) // poll IDLE_CS.7 Done bit
{ // transaction completed
;
} // write to ATRIG initiates
ATRIG = axfr; // ...FIFO -> GPIF transaction(s)
}
// read byte(s) from PERIPHERAL, using GPIF and slave FIFOA
Peripheral_AFIFOByteRead( void )
{
BYTE axfr;
while( !( IDLE_CS & 0x80 ) ) // poll IDLE_CS.7 GPIF Done bit
{
;
} // read from ATRIG initiates
axfr = ATRIG; // ...GPIF -> FIFO transaction(s)
}
// write byte to PERIPHERAL, using GPIF
bit Peripheral_SingleByteWrite( BYTE gaddr, BYTE gdata )
{
BYTE transaction_err = 0x00;
GPIFADRL = gaddr; // setup GPIF address ADR0-ADR5
SGLDATLTRIG = gdata; // initiate GPIF write transaction
while( !( IDLE_CS & 0x80 ) ) // poll IDLE_CS.7 Done bit
{
if( ++transaction_err > TMOUT ) // trap GPIF transaction for TMOUT
{
ABORT = 0xFF;
return( 0 ); // error has occurred
}
}
return( 1 );
}
// write word to PERIPHERAL, using GPIF
bit Peripheral_SingleWordWrite( BYTE gaddr, WORD gdata )
{
BYTE transaction_err = 0x00;
GPIFADRL = gaddr; // setup GPIF address ADR0-ADR5
SGLDATH = gdata >> 8;
SGLDATLTRIG = gdata; // initiate GPIF write transaction
while( !( IDLE_CS & 0x80 ) ) // poll IDLE_CS.7 Done bit
{
if( ++transaction_err > TMOUT ) // trap GPIF transaction for TMOUT
{
ABORT = 0xFF;
return( 0 ); // error has occurred
}
}
return( 1 );
}
// read byte from PERIPHERAL, using GPIF
bit Peripheral_SingleByteRead( BYTE gaddr, BYTE xdata *gdata )
{
BYTE g_data = 0x00;
BYTE transaction_err = 0x00;
GPIFADRL = gaddr; // setup GPIF address ADR0-ADR5
g_data = SGLDATLTRIG; // initiate GPIF read transaction
while( !( IDLE_CS & 0x80 ) ) // poll IDLE_CS.7 Done bit
{
if( ++transaction_err > TMOUT ) // trap GPIF transaction for TMOUT
{
ABORT = 0xFF;
return( 0 ); // error has occurred
}
}
*gdata = SGLDATLNTRIG;
return( 1 );
}
// read word from PERIPHERAL, using GPIF
bit Peripheral_SingleWordRead( BYTE gaddr, WORD xdata *gdata )
{
BYTE g_data = 0x00;
BYTE transaction_err = 0x00;
GPIFADRL = gaddr; // setup GPIF address ADR0-ADR5
g_data = SGLDATLTRIG; // initiate GPIF read transaction
while( !( IDLE_CS & 0x80 ) ) // poll IDLE_CS.7 Done bit
{
if( ++transaction_err > TMOUT ) // trap GPIF transaction for TMOUT
{
ABORT = 0xFF;
return( 0 ); // error has occurred
}
}
*gdata = ( ( WORD )SGLDATH << 8 ) | ( WORD )SGLDATLNTRIG;
return( 1 );
}
// write word(s) to PERIPHERAL, using GPIF, DMA, and slave FIFOA
bit Peripheral_AFIFOWordWrite( BYTE gaddr, BYTE xfrcnt, BYTE xdata *outbuf )
{
BYTE transaction_err = 0x00;
GPIFADRL = gaddr; // setup GPIF address ADR0-ADR5
DMASRC = outbuf; // Typically points to endp buffer
DMADEST = &AOUTDATA; // point to FIFO-A
DMALEN = xfrcnt;
EA = 0; // protect DMA from interrupts occurring in Block0
DMAGO = xfrcnt;
AOUTTC = xfrcnt >> 1; // divide by 2 for 16 bit transactions
ATRIG = xfrcnt; // write to ATRIG initiates
// FIFO -> GPIF transaction(s)
while( !( DMAGO & 0x80 ) )
{
; // wait here for the DMA to complete
}
EA = 1; // Enable interrupts...
while( !( IDLE_CS & 0x80 ) ) // poll IDLE_CS.7 Done bit
{ // transaction completed
if( ++transaction_err > TMOUT) // trap GPIF transaction for TMOUT
{
ABORT = 0xFF;
return( 0 ); // error has occurred
}
}
return( 1 );
}
// read word(s) from PERIPHERAL, using GPIF, DMA, and slave FIFOA
bit Peripheral_AFIFOWordRead( BYTE gaddr, BYTE xfrcnt, BYTE xdata *inbuf)
{
BYTE transaction_err = 0x00;
BYTE gxfr = 0x00;
GPIFADRL = gaddr; // setup GPIF address ADR0-ADR5
AINTC = xfrcnt >> 1; // divide by 2 for 16 bit interface
gxfr = ATRIG; // read from ATRIG initiates
// GPIF -> FIFO transaction(s)
while( !( IDLE_CS & 0x80 ) ) // poll IDLE_CS.7 GPIF Done bit
{
if( ++transaction_err > TMOUT ) // trap GPIF transaction for TMOUT
{
ABORT = 0xFF;
return( 0 ); // an error has occurred
}
}
DMASRC = &AINDATA; // point to FIFO-A
DMADEST = inbuf; // Typically points to endp buffer
DMALEN = xfrcnt;
EA = 0; // protect DMA from interrupts occurring in Block0
DMAGO = xfrcnt; // writing any value to DMAGO starts the DMA
while( !( DMAGO & 0x80 ) )
{
; // wait here for the DMA to complete
}
EA = 1; // Enable interrupts...
return( 1 );
}
void main( void )
{
WORD xdata wData;
BYTE xdata bData;
bit bResult;
GpifInit();
OtherInit();
if(IFCONFIG&0x04) // If 16-bit mode
{ // illustrate use of efficient 16 bit functions
bResult = Peripheral_SingleWordWrite(0x00, 0xAA55);
bResult = Peripheral_SingleWordRead(0x00, &wData);
}
else
{
bResult = Peripheral_SingleByteWrite(0x00, 0xAA);
bResult = Peripheral_SingleByteRead(0x00, &bData);
}
}
#endif
// TESTING_GPIF