www.pudn.com > PWM_DC.rar > dc.c
//###########################################################################
//
// FILE: dc.c
//
// TITLE: DSP2812 Event Manager create PWM to control a DC motor.
//
// DATE: 2007.04.20
//
// AUTHOR: ksy
//
// COMPANY: ******Technology Co.,Ltd
//
// DESCRIPTION:
//
// This program sets up the EVA timers (TIMER1) to generate
// PWM1-4 waveforms to control a DC motor
// 按键A正转;按键B反转
//###########################################################################
#include "DSP281x_Device.h" // DSP281x Headerfile Include File
#include "DSP281x_Examples.h" // DSP281x Examples Include File
// Prototype statements for functions found within this file.
interrupt void eva_timer1_isr(void);
void init_eva(void);
void InitAdc();
void delay_loop();
// Initialize Global variables
Uint16 IntCount;
void main(void)
{
// Initialize System Control:
InitSysCtrl();
EALLOW;
SysCtrlRegs.HISPCP.all=0x03;// HSPCLK=SYSCLKOUT/2*3=150/(2*3)=25MHz(AD clock)
EDIS;
// Initalize GPIO:
EALLOW;
GpioMuxRegs.GPAMUX.all = 0x00FF; // EVA PWM 1-6 pins
GpioMuxRegs.GPBMUX.bit.CAP4Q1_GPIOB8=0; // A
GpioMuxRegs.GPBMUX.bit.CAP5Q2_GPIOB9=0; // B
GpioMuxRegs.GPBDIR.all = 0x0; // set IO pins to be input pins
EDIS;
// Disable CPU interrupts
DINT;
// Initialize PIE control registers.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table.
InitPieVectTable();
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.T1PINT = &eva_timer1_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
// Initialize EVA、SCI-A、ADC:
init_eva();
InitAdc();
// Enable PIE group 2 interrupt 4 for T1PINT
PieCtrlRegs.PIEIER2.all = M_INT4;
// Enable CPU INT2 for T1PINT:
IER |= M_INT2;
// Enable global Interrupts and higher priority real-time debug events:
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
IntCount=0x0;
XwdataRegs.USB_CS=0xFF; //关数码管显示
// wait for interrupt:
for(;;)
{
if(GpioDataRegs.GPBDAT.bit.GPIOB8==0) //按键A
EvaRegs.ACTRA.all = 0x0F3E; // PWM1 正转
if(GpioDataRegs.GPBDAT.bit.GPIOB9==0) //按键B
EvaRegs.ACTRA.all = 0x0FE3; // PWM3 反转
}
}
interrupt void eva_timer1_isr(void)
{
Uint16 a[16];
Uint16 i,data,sum,cmpr;
IntCount++;
if(IntCount>10)
{
AdcRegs.ADCTRL2.bit.SOC_SEQ1=1; //启动SEQ1(启动AD转换)
IntCount=0;
while(AdcRegs.ADCST.bit.SEQ1_BSY!=0){;}//等待AD转换完成
a[0]=AdcRegs.ADCRESULT0>>4;
a[1]=AdcRegs.ADCRESULT1>>4;
a[2]=AdcRegs.ADCRESULT2>>4;
a[3]=AdcRegs.ADCRESULT3>>4;
a[4]=AdcRegs.ADCRESULT4>>4;
a[5]=AdcRegs.ADCRESULT5>>4;
a[6]=AdcRegs.ADCRESULT6>>4;
a[7]=AdcRegs.ADCRESULT7>>4;
a[8]=AdcRegs.ADCRESULT8>>4;
a[9]=AdcRegs.ADCRESULT9>>4;
a[10]=AdcRegs.ADCRESULT10>>4;
a[11]=AdcRegs.ADCRESULT11>>4;
a[12]=AdcRegs.ADCRESULT12>>4;
a[13]=AdcRegs.ADCRESULT13>>4;
a[14]=AdcRegs.ADCRESULT14>>4;
a[15]=AdcRegs.ADCRESULT15>>4;
for(i=0;i<16;i++)
{
sum=sum+a[i];
}
data=sum/16; // AD采样值
cmpr=data/4; // cmpr|max=4096/4=1024;(12 bits ADC)
if(cmpr<30)
cmpr=0;
EvaRegs.CMPR1 = cmpr;
EvaRegs.CMPR2 = cmpr;
sum=0;
}
// Enable more interrupts from this timer
EvaRegs.EVAIMRA.bit.T1PINT = 1;
// Note: To be safe, use a mask value to write to the entire
// EVAIFRA register. Writing to one bit will cause a read-modify-write
// operation that may have the result of writing 1's to clear
// bits other then those intended.
EvaRegs.EVAIFRA.all = BIT7;
// Acknowledge interrupt to receive more interrupts from PIE group 2
PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;
}
void init_eva()
{
// Initalize EVA Timer1&Configure PWM1-PWM4
EvaRegs.T1PR = 1250; // Timer1 period=1250/25M=50us
EvaRegs.T1CNT = 0; // Timer1 counter
EvaRegs.GPTCONA.bit.T1CMPOE=1; // enable timer compare
EvaRegs.GPTCONA.bit.T1PIN=1; // timer compare output
EvaRegs.EVAIMRA.bit.T1PINT = 1;// enable Timer1 period interrupt
EvaRegs.EVAIFRA.bit.T1PINT=1; // clear Timer1 period interrupt flag
/****************************************************
TMODE = continuous up count
Input clock prescaler= X/1 (X=HSPCLK)=25MHz
Timer enable ; Timer compare enable
*****************************************************/
EvaRegs.T1CON.all = 0x1042;
// Enable compare for PWM1-PWM4
EvaRegs.CMPR1 = 625;
EvaRegs.CMPR2 = 625;
EvaRegs.ACTRA.all = 0x0FE3; // PWM1,2(11):forced high; PWM3,4(00):forced low
EvaRegs.DBTCONA.all = 0x05FC; // 死区1us (1/(150M/32))*5
EvaRegs.COMCONA.all = 0xAE00; // Enable full compare 1010 0110 0000 0000
}
void InitScia(void)
{
// Initialize SCI-A:
SciaRegs.SCICCR.all =0x0007; // 1 stop bit, No loopback
// No parity,SCI character length 8 bits
SciaRegs.SCICTL1.all =0x0003; // Enable TX, RX
SciaRegs.SCICTL2.all =0x0002; // Enable RXRDY/BRKDT interrupt
SciaRegs.SCIPRI.bit.SOFT=0;
SciaRegs.SCIHBAUD =0x0000;
SciaRegs.SCILBAUD =0x00F3; // BRR=LSPCLK/Baud*8-1=150M/4*Baud*8-1=19200
SciaRegs.SCICTL1.all =0x0023; // Relinquish SCI from Reset
}
void InitAdc(void)
{
extern void DSP28x_usDelay(Uint32 Count);
AdcRegs.ADCTRL1.bit.RESET=1; //Reset ADC
delay_loop(2);
AdcRegs.ADCTRL1.bit.RESET=0; //No reset
AdcRegs.ADCTRL1.bit.SUSMOD=3; //在仿真暂停时停止
AdcRegs.ADCTRL1.bit.ACQ_PS=0;
AdcRegs.ADCTRL1.bit.CPS=0; // AD_clock=HSPCLK/1=25MHz
AdcRegs.ADCTRL1.bit.CONT_RUN=0;
AdcRegs.ADCTRL1.bit.SEQ_CASC=1; //级联模式(SEQ mode)
//***********ADC上电顺序:**************
AdcRegs.ADCTRL3.bit.ADCBGRFDN=0x3;//Power up bandgap/reference circuitry
DELAY_US(8000L); //(5ms)Delay before powering up rest of ADC
AdcRegs.ADCTRL3.bit.ADCPWDN=1; //Power up rest of ADC
DELAY_US(20L); //(20us)Delay after powering up ADC
//*************************************
AdcRegs.ADCTRL3.bit.ADCCLKPS=0; //ADC module clock = HSPCLK/1= 25MHz/(1)= 25MHz
AdcRegs.ADCTRL3.bit.SMODE_SEL=0; //顺序采样方式
AdcRegs.ADCMAXCONV.bit.MAX_CONV1=0x07;
AdcRegs.ADCCHSELSEQ1.all=0x2222; //Select ADCINA2
AdcRegs.ADCCHSELSEQ2.all=0x2222; //Select ADCINA2
AdcRegs.ADCCHSELSEQ3.all=0x2222; //Select ADCINA2
AdcRegs.ADCCHSELSEQ4.all=0x2222; //Select ADCINA2
AdcRegs.ADCTRL2.bit.SOC_SEQ1=1; //启动SEQ1(启动AD转换)
}
void delay_loop(Uint16 count )
{
long i;
for (i = 0; i < count; i++) {}
}
//===========================================================================
// No more.
//===========================================================================