www.pudn.com > SMV_Code.rar > basic_op.h
/*=========================================================================*/
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/* Nortel Networks, and Qualcomm (hereinafter referred to individually as */
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/*-------------------------------------------------------------------*/
/*===================================================================*/
/***********************************************************************
*
* FILE : basic_op.h (essentially identical to mathevrc.h)
*
* PURPOSE:
*
* Modified TIA basic operations. Bit-exact simulation of a
* generic 32 bit accumulator DSP chip (fractional math). This
* version has a latching overflow bit (giOverflow) and
* non-compound MAC's (One where initial mult does not saturate)
*
***********************************************************************/
#ifndef __MATHTIA
#define __MATHTIA
#include "typedef_fx.h"
#define MAX_32 (Word32)0x7fffffffL
#define MIN_32 (Word32)0x80000000L
#define MAX_16 (Word16)0x7fff
#define MIN_16 (Word16)0x8000
/*_________________________________________________________________________
| |
| Function Prototypes |
|_________________________________________________________________________|
*/
/* addition */
/************/
Word16 add(Word16 var1, Word16 var2); /* 1 ops */
Word16 sub(Word16 var1, Word16 var2); /* 1 ops */
Word32 L_add(Word32 L_var1, Word32 L_var2); /* 2 ops */
Word32 L_sub(Word32 L_var1, Word32 L_var2); /* 2 ops */
/* multiplication */
/******************/
Word16 mult(Word16 var1, Word16 var2); /* 1 ops */
Word32 L_mult(Word16 var1, Word16 var2); /* 1 ops */
Word16 mult_r(Word16 var1, Word16 var2); /* 2 ops */
/* arithmetic shifts */
/*********************/
Word16 shr(Word16 var1, Word16 var2); /* 1 ops */
Word16 shl(Word16 var1, Word16 var2); /* 1 ops */
Word32 L_shr(Word32 L_var1, Word16 var2); /* 2 ops */
Word32 L_shl(Word32 L_var1, Word16 var2); /* 2 ops */
Word16 shift_r(Word16 var, Word16 var2); /* 2 ops */
Word32 L_shift_r(Word32 L_var, Word16 var2); /* 3 ops */
/* absolute value */
/*******************/
Word16 abs_s(Word16 var1); /* 1 ops */
Word32 L_abs(Word32 var1); /* 3 ops */
/* multiply accumulate */
/************************/
Word32 L_mac(Word32 L_var3,
Word16 var1, Word16 var2); /* 1 op */
Word16 mac_r(Word32 L_var3,
Word16 var1, Word16 var2); /* 2 op */
Word32 L_msu(Word32 L_var3,
Word16 var1, Word16 var2); /* 1 op */
Word16 msu_r(Word32 L_var3,
Word16 var1, Word16 var2); /* 2 op */
/* negation */
/*************/
Word16 negate(Word16 var1); /* 1 ops */
Word32 L_negate(Word32 L_var1); /* 2 ops */
/* Accumulator manipulation */
/****************************/
Word32 L_deposit_l(Word16 var1); /* 1 ops */
Word32 L_deposit_h(Word16 var1); /* 1 ops */
Word16 extract_l(Word32 L_var1); /* 1 ops */
Word16 extract_h(Word32 L_var1); /* 1 ops */
/* Round */
/*********/
Word16 round32_16(Word32 L_var1); /* 1 ops */
/* Normalization */
/*****************/
Word16 norm_l(Word32 L_var1); /* 30 ops */
Word16 norm_s(Word16 var1); /* 15 ops */
/* Division */
/************/
Word16 divide_s(Word16 var1, Word16 var2); /* 18 ops */
/* Saturation manipulation routines */
/************************************/
int clearOverflow(void);
int isOverflow(void);
int popOverflow(void);
int setOverflow(void);
/* Non-saturating instructions */
/*******************************/
Word32 L_add_c(Word32 L_Var1, Word32 L_Var2); /* 2 ops */
Word32 L_sub_c(Word32 L_Var1, Word32 L_Var2); /* 2 ops */
Word32 L_macNs(Word32 L_var3,
Word16 var1, Word16 var2); /* 1 ops */
Word32 L_msuNs(Word32 L_var3,
Word16 var1, Word16 var2); /* 1 ops */
#endif