www.pudn.com > uCOS_II_uart.rar > cstartup1.s

				INCLUDE		AT91SAM7X256.inc 
RamEnd   	EQU		0x00210000 
 
   IMPORT  OS_CPU_IRQ_ISR 
 
                AREA        reset, CODE, READONLY 
                 
 
				entry 
 
re_set 
                B           InitReset            
undefvec 
                B           undefvec             
swivec 
                B           swivec               
pabtvec  
                B           pabtvec              
dabtvec  
                B           dabtvec              
rsvdvec  
                B           rsvdvec              
irqvec  
 
				ldr 		pc,=OS_CPU_IRQ_ISR 
fiqvec               				 
 
 
FIQ_Handler_Entry  
 
            mov         r9, r0 
	    	ldr         r0, [r8, #AIC_FVR] 
            msr         CPSR_c, #I_BIT | F_BIT | ARM_MODE_SVC 
 
 
            stmfd       sp!, { r1-r3, r12, lr} 
 
 
            mov         r14, pc 
            bx          r0 
 
 
            ldmia       sp!, { r1-r3, r12, lr} 
 
 
            msr         CPSR_c, #I_BIT | F_BIT | ARM_MODE_FIQ 
 
 
            mov         r0,r9 
 
 
            subs        pc,lr,#4 
 
 
InitReset 
 
				ldr		r0,=0xFFFFFD08 
				ldr     r1,=0xa5000001 
				str		r1,[r0] 
				 
 
            	EXTERN   AT91F_LowLevelInit 
 
 
 
 
 
 
            ldr     r13,=RamEnd             
 
	    ldr	    r0,=AT91F_LowLevelInit 
        mov     lr, pc 
	    bx	    r0 
 
 
 
IRQ_STACK_SIZE  equ   (2*8*64)      
 
 
 
ARM_MODE_USER           EQU     0x10 
ARM_MODE_FIQ            EQU     0x11 
ARM_MODE_IRQ            EQU     0x12 
ARM_MODE_SVC            EQU     0x13 
ARM_MODE_ABORT          EQU     0x17 
ARM_MODE_UNDEF          EQU     0x1B 
ARM_MODE_SYS            EQU     0x1F 
I_BIT equ 0x80 
F_BIT equ 0x40 
 
 
                ldr     r0, =RamEnd 
 
 
                msr     CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT 
 
            	ldr     r8, =AT91C_BASE_AIC 
 
 
                msr     CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT 
                mov     r13, r0                      
                sub     r0, r0, #IRQ_STACK_SIZE 
 
 
                msr     CPSR_c, #ARM_MODE_SVC  
                mov     r13, r0                      
 
 
 
 
 
 
 
		 EXTERN	main 
		 global	__main 
jump_to_main 
		ldr	lr,=call_exit 
		ldr	r0,=main 
__main 
		bx	r0 
 
 
call_exit 
End 
            b       End 
 
 
 
 
IRQ_Handler_Entry 
 
 
            sub         lr, lr, #4 
            stmfd       sp!, {lr} 
 
            stmfd       sp!, {r0} 
 
 
 
            ldr         r14, =AT91C_BASE_AIC 
	    	ldr         r0 , [r14, #AIC_IVR] 
	    	str         r14, [r14, #AIC_IVR] 
 
 
          	msr         CPSR_c, #ARM_MODE_SVC 
 
 
            stmfd       sp!, { r1-r3, r12, r14} 
 
 
            mov         r14, pc 
            bx          r0 
 
 
            ldmia       sp!, { r1-r3, r12, r14} 
 
 
            msr         CPSR_c, #I_BIT | ARM_MODE_IRQ 
 
 
            ldr         r14, =AT91C_BASE_AIC 
            str         r14, [r14, #AIC_EOICR] 
 
 
            ldmia       sp!, {r0} 
 
 
            ldmia       sp!, {pc}^ 
             
reinter		mov r2,#AT91C_ISRAM 
			mov r3,#0 
rein		ldr	r1,[r3] 
			str r1,[r2] 
			add r3,r3,#1 
			cmp r3,#4 
			bne rein 
 
		global	AT91F_Default_FIQ_handler 
		global	AT91F_Default_IRQ_handler 
		global	AT91F_Spurious_handler 
 
 
AT91F_Default_FIQ_handler 
            b     AT91F_Default_FIQ_handler 
 
AT91F_Default_IRQ_handler 
            b     AT91F_Default_IRQ_handler 
 
AT91F_Spurious_handler 
            b     AT91F_Spurious_handler 
 
 
 
	END