www.pudn.com > ADSP-BF561_MicronSensorExample_I2C_ASM_in_C.zip > MI350.h
#ifndef _MI350
#define _MI350
#define MI350WR 0xB8
#define MI350RD 0xB9
enum ENCODER {
CHIP_VERSION_REG = 0x00,
COL_WINDOW_START_REG,
ROW_WINDOW_START_REG,
WINDOW_HEIGHT_REG,
WINDOW_WIDTH_REG,
HORZ_BLANK_REG,
VERT_BLANK_REG,
CHIP_CONTROL_REG,
SHUTTER_WIDTH_REG_1,
SHUTTER_WIDTH_REG_2,
SHUTTER_WIDTH_CONTROL,
SHUTTER_WIDTH_TOTAL,
RESET_REG,
READ_MODE_REG,
MONITOR_MODE_CONTROL,
DYNAMIC_RANGE_CONTROL,
RESERVED_10,
RESERVED_11,
RESERVED_12,
RESERVED_13,
RESERVED_14,
RESERVED_15,
RESERVED_16,
RESERVED_17,
RESERVED_18,
RESERVED_19,
RESERVED_1A,
LED_OUT_CONTROL,
ADC_RSOLUTION_CONTROL,
RESERVED_1D,
RESERVED_1E,
RESERVED_1F,
RESERVED_20,
RESERVED_21,
RESERVED_22,
RESERVED_23,
RESERVED_24,
RESERVED_25,
RESERVED_26,
RESERVED_27,
RESERVED_28,
RESERVED_29,
RESERVED_2A,
RESERVED_2B,
VREF_ADC_CONTROL,
RESERVED_2D,
RESERVED_2E,
RESERVED_2F,
RESERVED_30,
V1_CONTROL,
V2_CONTROL,
V3_CONTROL,
V4_CONTROL,
ANALOG_GAIN_REG,
MAXIMUM_GAIN_REG,
RESERVED_37,
RESERVED_38,
RESERVED_39,
RESERVED_3A,
RESERVED_3B,
RESERVED_3C,
RESERVED_3D,
RESERVED_3E,
RESERVED_3F,
RESERVED_40,
RESERVED_41,
TARGET_DARK_AVG,
RESERVED_43,
RESERVED_44,
RESERVED_45,
DARK_AVG_THRESHOLDS,
CALIB_CONTROL_REG,
TARGET_CALIB_VAL,
RESERVED_49,
RESERVED_4A,
RESERVED_4B,
STEP_SIZE_AVG_MODE,
RESERVED_4D,
RESERVED_4E,
RESERVED_4F,
RESERVED_50,
RESERVED_51,
RESERVED_52,
RESERVED_53,
RESERVED_54,
RESERVED_55,
RESERVED_56,
RESERVED_57,
RESERVED_58,
RESERVED_59,
RESERVED_5A,
RESERVED_5B,
RESERVED_5C,
RESERVED_5D,
RESERVED_5E,
RESERVED_5F,
RESERVED_60,
RESERVED_61,
RESERVED_62,
RESERVED_63,
RESERVED_64,
RESERVED_65,
RESERVED_66,
RESERVED_67,
RESERVED_68,
RESERVED_69,
RESERVED_6A,
RESERVED_6B,
RESERVED_6C,
RESERVED_6D,
RESERVED_6E,
RESERVED_6F,
ROW_NOISE_CONTROL,
RESERVED_71,
NOISE_CONSTANT,
DARK_COL_START,
PIXCLK_CONTROL,
RESERVED_75,
RESERVED_76,
RESERVED_77,
RESERVED_78,
RESERVED_79,
RESERVED_7A,
RESERVED_7B,
RESERVED_7C,
RESERVED_7D,
RESERVED_7E,
RESERVED_7F,
TILE_X0_Y0,
TILE_X1_Y0,
TILE_X2_Y0,
TILE_X3_Y0,
TILE_X4_Y0,
TILE_X0_Y1,
TILE_X1_Y1,
TILE_X2_Y1,
TILE_X3_Y1,
TILE_X4_Y1,
TILE_X0_Y2,
TILE_X1_Y2,
TILE_X2_Y2,
TILE_X3_Y2,
TILE_X4_Y2,
TILE_X0_Y3,
TILE_X1_Y3,
TILE_X2_Y3,
TILE_X3_Y3,
TILE_X4_Y3,
TILE_X0_Y4,
TILE_X1_Y4,
TILE_X2_Y4,
TILE_X3_Y4,
TILE_X4_Y4,
X0_SLASH5,
X1_SLASH5,
X2_SLASH5,
X3_SLASH5,
X4_SLASH5,
X5_SLASH5,
Y0_SLASH5,
Y1_SLASH5,
Y2_SLASH5,
Y3_SLASH5,
Y4_SLASH5,
Y5_SLASH5,
AEC_AGC_DESIRED_BIN,
AEC_UPDATE_FREQ,
RESERVED_A7,
AEC_LPF,
AGC_UPDATE_FREQ,
RESERVED_AA,
GAIN_LPF_H,
RESERVED_AC,
RESERVED_AD,
RESERVED_AE,
AUTO_BLOCK_CONTROL,
PIXEL_COUNT,
LVDS_MASTER_CONTROL,
SHFT_CLK_CONTROL,
LVDS_DATA_CONTROL,
STREAM_LATENCY_SELECT,
LVDS_INTERNAL_SYNC,
USE_10BIT_PIXELS,
STEREO_ERROR_CONTROL,
STEREO_ERROR_FLAG,
LVDS_DATA_OUTPUT,
AGC_GAIN ,
AEC_EXPOSURE,
CURRENT_BIN,
MAX_EXPOSURE,
BIN_DIFF_THRESHOLD,
INTERLACE_VBLANK,
IMAGE_CAPTURE_NUM,
THERMAL_INFO,
RESERVED_C2,
RESERVED_C3,
RESERVED_C4,
RESERVED_C5,
RESERVED_C6,
RESERVED_C7,
RESERVED_C8,
RESERVED_C9,
RESERVED_CA,
RESERVED_CB,
RESERVED_CC,
RESERVED_CD,
RESERVED_CE,
RESERVED_CF,
RESERVED_D0,
RESERVED_D1,
RESERVED_D2,
RESERVED_D3,
RESERVED_D4,
RESERVED_D5,
RESERVED_D6,
RESERVED_D7,
RESERVED_D8,
RESERVED_D9,
RESERVED_DA,
RESERVED_DB,
RESERVED_DC,
RESERVED_DD,
RESERVED_DE,
RESERVED_DF,
RESERVED_E0,
RESERVED_E1,
RESERVED_E2,
RESERVED_E3,
RESERVED_E4,
RESERVED_E5,
RESERVED_E6,
RESERVED_E7,
RESERVED_E8,
RESERVED_E9,
RESERVED_EA,
RESERVED_EB,
RESERVED_EC,
RESERVED_ED,
RESERVED_EE,
RESERVED_EF,
PAGE_REGISTER,
BYTEWISE_ADDR_REG,
RESERVED_F2,
RESERVED_F3,
RESERVED_F4,
RESERVED_F5,
RESERVED_F6,
RESERVED_F7,
RESERVED_F8,
RESERVED_F9,
RESERVED_FA,
RESERVED_FB,
RESERVED_FC,
RESERVED_FD,
RESERVED_FE,
CHIP_VERSION_REG2,
};
#endif