www.pudn.com > s3c2443_test_code.zip > spi.c
#include "system.h"
#include "spi_dma.h"
#define rSPTXFIFO1 (*(volatile unsigned *)0x59000018)
#define rSPRXFIFO1 (*(volatile unsigned *)0x5900001C)
#define rSPFIC1 (*(volatile unsigned *)0x59000024)
#define rSPTOV (*(volatile unsigned *)0x59000028)
#define WrSPTDAT1(ch) (*(volatile unsigned char*)0x59000010)=(unsigned char)(ch)
#define RdSPRDAT1() (*(volatile unsigned char*)0x59000014)
#define RdSPRDATB1() (*(volatile unsigned char*)0x59000020)
#define WrSPTXFIFO1(ch) (*(volatile unsigned char*)0x59000018)=(unsigned char)(ch)
#define RdSPRXFIFO1() (*(volatile unsigned char*)0x5900001C)
#define REDY1_org (rSPSTA1>>3)&0x1 // In Slave, for Rx Checking
#define REDY1 rSPSTA1&0x1
#define SPI_BUFFER1 _NONCACHE_STARTADDRESS
volatile char *spi1TxStr,*spi1RxStr;
volatile int endSpi1Tx,endSpi1Rx;
volatile int tx_dmaDone, rx_dmaDone;
volatile int trans_count;
// For SPI Port Recovery
U32 rGPECON_saved;
U32 rGPEUDP_saved;
U32 rGPLCON_saved;
U32 rGPLUDP_saved;
typedef struct tagDMA
{
volatile U32 DISRC; //0x0
volatile U32 DISRCC; //0x4
volatile U32 DIDST; //0x8
volatile U32 DIDSTC; //0xc
volatile U32 DCON; //0x10
volatile U32 DSTAT; //0x14
volatile U32 DCSRC; //0x18
volatile U32 DCDST; //0x1c
volatile U32 DMASKTRIG; //0x20
volatile U32 DMAREQSEL; //0x24
}DMA;
void Test_Spi1_Loopback_Poll(void);
void Test_Spi1_Loopback_Int(void);
void __irq Spi1_LoopBack_Int(void);
void Test_Spi1_M_Buf_Poll(void);
void Test_Spi1_S_Buf_Poll(void);
void Test_Spi1_M_Buf_Int(void);
void Test_Spi1_S_Buf_Int(void);
void __irq Spi1_M_Buf_Int(void);
void __irq Spi1_S_Buf_Int(void);
void Test_Spi1_M_Tx_Buf_DMA(void);
void Test_Spi1_S_Rx_Buf_DMA(void);
void Test_Spi1_M_Rx_Buf_DMA(void);
void Test_Spi1_S_Tx_Buf_DMA(void);
void Set_Spi1_Tx_DMA_Set(U32 ch);
void Set_Spi1_Rx_DMA_Set(U32 ch);
void __irq DmaTx_Int(void);
void __irq DmaRx_Int(void);
void Test_Spi1_M_Tx_Fifo_Int(void);
void Test_Spi1_M_Tx_Fifo_Int2(void);
void Test_Spi1_S_Rx_Fifo_Int(void);
void Test_Spi1_M_Rx_Fifo_Int(void);
void Test_Spi1_S_Tx_Fifo_Int(void);
void Test_Spi1_S_Tx_Fifo_Int2(void);
void __irq Spi1_Tx_fifo_Int(void);
void __irq Spi1_Rx_fifo_Int(void);
void Test_Spi1_M_Tx_Fifo_DMA(void);
void Test_Spi1_S_Rx_Fifo_DMA(void);
void Test_Spi1_M_Rx_Fifo_DMA(void);
void Test_Spi1_S_Tx_Fifo_DMA(void);
void Set_Spi1_Tx_Fifo_DMA(U32 ch);
void Set_Spi1_Rx_Fifo_DMA(U32 ch);
void SPI_Port_Init(void);
void SPI_Port_Recovery(void);
void SPI1_Master_nSS_Con(U32 CSout);
void SPI_Baud_Rate_Set(float BaudRate);
void SPI_Transfer_Format(void);
void * func_spi_test[][2]=
{
// "0123456789012345" max 15자 로한정하여 comment하세요.
//SPI
(void *)Test_Spi1_Loopback_Poll, "SPI1 loopback Poll",
(void *)Test_Spi1_Loopback_Int, "SPI1 loopback Int",
(void *)Test_Spi1_M_Buf_Poll, "SPI1:Master (Tx/Rx), Byte Access POLL",
(void *)Test_Spi1_S_Buf_Poll, "SPI1:Slave (Tx/Rx), Byte Access POLL",
(void *)Test_Spi1_M_Buf_Int, "SPI1:Master (Tx/Rx), Byte Access INT",
(void *)Test_Spi1_S_Buf_Int, "SPI1:Slave (Tx/Rx), Byte Access INT",
(void *)Test_Spi1_M_Tx_Buf_DMA, "SPI1:Master (Tx), Byte Access DMA",
(void *)Test_Spi1_S_Rx_Buf_DMA, "SPI1:Slave (Rx), Byte Access DMA",
(void *)Test_Spi1_M_Rx_Buf_DMA, "SPI1:Master (Rx), Byte Access DMA",
(void *)Test_Spi1_S_Tx_Buf_DMA, "SPI1:Slave (Tx), Byte Access DMA",
(void *)Test_Spi1_M_Tx_Fifo_Int, "SPI1:Master (Tx), Fifo INT",
(void *)Test_Spi1_M_Tx_Fifo_Int2, "SPI1:Master (2nd Tx), Fifo INT",
(void *)Test_Spi1_S_Rx_Fifo_Int, "SPI1:Slave (Rx), Fifo INT",
(void *)Test_Spi1_M_Rx_Fifo_Int, "SPI1:Master (Rx), Fifo INT",
(void *)Test_Spi1_S_Tx_Fifo_Int, "SPI1:Slave (Tx), Fifo INT",
(void *)Test_Spi1_S_Tx_Fifo_Int2, "SPI1:Slave (2nd Tx), Fifo INT",
(void *)Test_Spi1_M_Tx_Fifo_DMA, "SPI1:Master (Tx), Fifo DMA",
(void *)Test_Spi1_S_Rx_Fifo_DMA, "SPI1:Slave (Rx), Fifo DMA",
(void *)Test_Spi1_M_Rx_Fifo_DMA, "SPI1:Master (Rx), Fifo DMA",
(void *)Test_Spi1_S_Tx_Fifo_DMA, "SPI1:Slave (Tx), Fifo DMA",
0,0
};
void Test_SPI(void)
{
int i;
while(1)
{
i=0;
printf("\n====== SPI Test program start ======\n\n");
while(1)
{ //display menu
printf("%2d:%s",i,func_spi_test[i][1]);
i++;
if((int)(func_spi_test[i][0])==0)
{
printf("\n");
break;
}
// if((i%4)==0)
printf("\n");
}
printf("\nPress Enter key to exit : ");
i = GetIntNum();
if(i==-1) break; // return.
if(i>=0 && (i<((sizeof(func_spi_test)-1)/8)) ) // select and execute...
( (void (*)(void)) (func_spi_test[i][0]) )();
}
printf("\n====== SPI Test program end ======\n");
}
void Test_Spi1_Loopback_Poll(void)
{
char *txStr,*rxStr;
SPI_Port_Init();
endSpi1Tx=0;
spi1TxStr="Test Spi1 Loop Back Polling Mode acbedgfihkjmlonqpsrutwvyxz 1234567890 ACBEDGFIHKJMLONQPSRUTWVYXZ !@#$%^&*()_+|<>?";
spi1RxStr=(char *) SPI_BUFFER1; // Rx Buffer to receive
txStr=(char *)spi1TxStr;
rxStr=(char *)spi1RxStr;
SPI_Baud_Rate_Set(25000000);
SPI_Transfer_Format();
rSPCON1 = (rSPCON1&0x6)|(0<<5)|(1<<4)|(1<<3)|(0<<0);//Polling,en-SCK,master,low,A,normal
rSPPIN1 |= (1<<0);//Feedback Clock Disable, Master Out Keep
SPI1_Master_nSS_Con(0);
#if 1
while(endSpi1Tx==0)
{
if(REDY1) //Check Tx ready state
{
if(*spi1TxStr!='\0')
WrSPTDAT1(*spi1TxStr++);
else {
WrSPTDAT1(*spi1TxStr++); // Transfer last data(NULL Character)
endSpi1Tx=1;
}
while(!(REDY1)); //Check Rx ready state
*spi1RxStr++=RdSPRDAT1();
}
}
#else
while(endSpi1Tx==0)
{
if(*spi1TxStr!='\0')
WrSPTDAT1(*spi1TxStr++);
else {
WrSPTDAT1(*spi1TxStr++); // Transfer last data(NULL Character)
endSpi1Tx=1;
}
while(!(REDY1)); //Check Rx ready state
*spi1RxStr++=RdSPRDAT1();
}
#endif
SPI1_Master_nSS_Con(1);
*spi1RxStr++=RdSPRDAT1(); // read last data(NULL)
rxStr++; // remove first dummy
printf("Tx Strings:%s\n",txStr);
printf("Rx Strings:%s :",rxStr);
if(strcmp(rxStr,txStr)==0) printf("O.K.\n");
else printf("ERROR!!!\n");
SPI_Port_Recovery();
}
void Test_Spi1_Loopback_Int(void)
{
char *txStr,*rxStr;
SPI_Port_Init();
endSpi1Tx=0;
spi1TxStr="Test Spi1 Loop Back Interrupt Mode 1234567890 ACBEDGFIHKJMLONQPSRUTWVYXZ acbedgfihkjmlonqpsrutwvyxz !@#$%^&*()_+|<>?";
spi1RxStr=(char *) SPI_BUFFER1; // Rx Buffer to receive
txStr=(char *)spi1TxStr;
rxStr=(char *)spi1RxStr;
SPI_Baud_Rate_Set(25000000);
SPI_Transfer_Format();
rSPCON1 = (rSPCON1&0x6)|(1<<5)|(1<<4)|(1<<3)|(0<<0);//Interrupt,en-SCK,master
rSPPIN1 |= (1<<0);//Feedback Clock Disable, Master Out Keep
SPI1_Master_nSS_Con(0);
pISR_SPI1=(unsigned)Spi1_LoopBack_Int;
rINTMSK&=~(BIT_SPI1);
while(endSpi1Tx==0);
SPI1_Master_nSS_Con(1);
*spi1RxStr++=RdSPRDAT1();
rxStr++; // remove first dummy
printf("Tx Strings:%s\n",txStr);
printf("Rx Strings:%s :",rxStr);
if(strcmp(rxStr,txStr)==0) printf("O.K.\n");
else printf("ERROR!!!\n");
SPI_Port_Recovery();
}
void __irq Spi1_LoopBack_Int(void)
{
ClearPending(BIT_SPI1);
if(*spi1TxStr!='\0')
WrSPTDAT1(*spi1TxStr++);
else {
WrSPTDAT1(*spi1TxStr++);
endSpi1Tx=1;
rINTMSK|=(BIT_SPI1);
}
while(!(REDY1)); //Check Rx ready state
*spi1RxStr++=RdSPRDAT1(); //First Rx data is garbage data
}
void Test_Spi1_M_Buf_Poll(void)
{
char *txStr,*rxStr;
char dummy_read;
printf("[This Board is SPI1(Master TxRx), Another Board are SPI1(Slave TxRx) Poll test]\n");
printf("Slave is ready? Then press any key, Start\n");
getchar();
SPI_Port_Init();
endSpi1Tx=0;
spi1TxStr="[B2B] Test Spi1 Master Tx/Rx BUF Poll Mode !@#$%^&*()_+|<>?";
spi1RxStr=(char *) SPI_BUFFER1; // Rx Buffer to receive
printf("spi1RxStr:%p\n",spi1RxStr); // for debug
txStr=(char *)spi1TxStr;
rxStr=(char *)spi1RxStr;
dummy_read = RdSPRDAT1();
dummy_read = RdSPRDAT1();
// SPI_Baud_Rate_Set(25000000);
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
rSPCON1 = (rSPCON1&0x6)|(0<<5)|(1<<4)|(1<<3)|(0<<0);//Polling,en-SCK,master,low,A,normal
rSPPIN1 |= (1<<0);//Feedback Clock Disable, Master Out Keep
// rSPPIN1 &= ~(1<<0);//Feedback Clock Disable, Master Out Release
SPI1_Master_nSS_Con(0);
while(endSpi1Tx==0)
{
if(REDY1==1) //Check Tx ready state
{
if(*spi1TxStr!='\0')
WrSPTDAT1(*spi1TxStr++);
else {
endSpi1Tx=1;
WrSPTDAT1(*spi1TxStr++);
}
while(!(REDY1)); //Check Rx ready state
*spi1RxStr++=RdSPRDAT1();
}
}
SPI1_Master_nSS_Con(1);
*spi1RxStr++=RdSPRDAT1(); // read last data(NULL)
rxStr++; // remove first dummy
printf("MASTER Tx Strings:%s\n",txStr);
printf("MASTER Rx Strings:%s\n",rxStr);
SPI_Port_Recovery();
}
void Test_Spi1_S_Buf_Poll(void)
{
char *txStr,*rxStr;
char dummy_read;
printf("[This Board is SPI1(Slave TxRx), Another Board are SPI1(Master TxRx) Poll test]\n");
SPI_Port_Init();
endSpi1Tx=0;
spi1TxStr="[B2B] Test Spi1 Savle Tx/Rx BUF Poll Mode ABCDEFGHIJKLMNOP";
spi1RxStr=(char *) SPI_BUFFER1; // Rx Buffer to receive
printf("spi1RxStr:%p\n",spi1RxStr); // for debug
txStr=(char *)spi1TxStr;
rxStr=(char *)spi1RxStr;
dummy_read = RdSPRDAT1();
dummy_read = RdSPRDAT1();
// SPI_Baud_Rate_Set(25000000);
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
rSPCON1 = (rSPCON1&0x7)|(0<<5)|(0<<4)|(0<<3)|(0<<0);//Polling,en-SCK,master
rSPPIN1 |= (1<<0);//Feedback Clock Disable, Master Out Keep
while(endSpi1Tx==0)
{
if(REDY1==1) //Check Tx ready state
{
if(*spi1TxStr!='\0')
WrSPTDAT1(*spi1TxStr++);
else {
endSpi1Tx=1;
WrSPTDAT1(*spi1TxStr++);
}
while(!(REDY1)); //Check Rx ready state
*spi1RxStr++=RdSPRDAT1();
}
}
while(!(REDY1_org)); //Check Rx ready state
*spi1RxStr++=RdSPRDAT1(); // read last data(NULL)
rxStr++; // remove first dummy
printf("SLAVE Tx Strings:%s\n",txStr);
printf("SLAVE Rx Strings:%s\n",rxStr);
SPI_Port_Recovery();
}
void Test_Spi1_M_Buf_Int(void)
{
char *txStr,*rxStr;
char dummy_read;
printf("[This Board is SPI1(Master TxRx), Another Board are SPI1(Slave TxRx) Int test]\n");
printf("Slave is ready? Then press any key, Start\n");
getchar();
SPI_Port_Init();
endSpi1Tx=0;
spi1TxStr="[B2B] Test Spi1 Master Tx/Rx BUF Int. Mode ?><|+_)(*&^%$#@!";
spi1RxStr=(char *) SPI_BUFFER1; // Rx Buffer to receive
printf("spi1RxStr:%p\n",spi1RxStr); // for debug
txStr=(char *)spi1TxStr;
rxStr=(char *)spi1RxStr;
dummy_read = RdSPRDAT1();
dummy_read = RdSPRDAT1();
// SPI_Baud_Rate_Set(25000000);
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
rSPCON1 = (rSPCON1&0x6)|(1<<5)|(1<<4)|(1<<3)|(0<<0);//Interrupt,en-SCK,master,normal
rSPPIN1 |= (1<<0);//Feedback Clock Disable, Master Out Keep
// rSPPIN1 &= ~(1<<0);//Feedback Clock Disable, Master Out Release
SPI1_Master_nSS_Con(0);
pISR_SPI1=(unsigned)Spi1_M_Buf_Int;
rINTMSK&=~(BIT_SPI1);
while(endSpi1Tx==0);
SPI1_Master_nSS_Con(1);
*spi1RxStr++=RdSPRDAT1(); // read last data(NULL)
rxStr++; // remove first dummy
printf("MASTER Tx Strings:%s\n",txStr);
printf("MASTER Rx Strings:%s\n",rxStr);
SPI_Port_Recovery();
}
void __irq Spi1_M_Buf_Int(void)
{
ClearPending(BIT_SPI1);
if(*spi1TxStr!='\0')
WrSPTDAT1(*spi1TxStr++);
else {
WrSPTDAT1(*spi1TxStr++);
endSpi1Tx=1;
rINTMSK|=(BIT_SPI1);
}
while(!(REDY1)); //Check Rx ready state
*spi1RxStr++=RdSPRDAT1(); //First Rx data is garbage data
}
void Test_Spi1_S_Buf_Int(void)
{
char *txStr,*rxStr;
char dummy_read;
printf("[This Board is SPI1(Slave TxRx), Another Board are SPI1(Master TxRx) Poll test]\n");
SPI_Port_Init();
endSpi1Tx=0;
spi1TxStr="[B2B] Test Spi1 Savle Tx/Rx BUF Int. Mode abcdefghijklmnop";
spi1RxStr=(char *) SPI_BUFFER1; // Rx Buffer to receive
printf("spi1RxStr:%p\n",spi1RxStr); // for debug
txStr=(char *)spi1TxStr;
rxStr=(char *)spi1RxStr;
dummy_read = RdSPRDAT1();
dummy_read = RdSPRDAT1();
// SPI_Baud_Rate_Set(25000000);
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
rSPCON1 = (rSPCON1&0x7)|(1<<5)|(0<<4)|(0<<3)|(0<<0);//Polling,en-SCK,master
rSPPIN1 |= (1<<0);//Feedback Clock Disable, Master Out Keep
pISR_SPI1=(unsigned)Spi1_S_Buf_Int;
rINTMSK&=~(BIT_SPI1);
while(endSpi1Tx==0);
while(!(REDY1_org)); //Check Rx ready state
*spi1RxStr++=RdSPRDAT1(); // read last data(NULL)
rxStr++; // remove first dummy
printf("SLAVE Tx Strings:%s\n",txStr);
printf("SLAVE Rx Strings:%s\n",rxStr);
SPI_Port_Recovery();
}
void __irq Spi1_S_Buf_Int(void)
{
ClearPending(BIT_SPI1);
if(*spi1TxStr!='\0')
WrSPTDAT1(*spi1TxStr++);
else {
WrSPTDAT1(*spi1TxStr++);
endSpi1Tx=1;
rINTMSK|=(BIT_SPI1);
}
while(!(REDY1)); //Check Rx ready state
*spi1RxStr++=RdSPRDAT1(); //First Rx data is garbage data
}
void Test_Spi1_M_Tx_Buf_DMA(void)
{
int i;
printf("[This Board is SPI1(Master Tx), Another Board are SPI1(Slave Rx) DMA test]\n");
printf("Slave is ready? Then press any key, Start\n");
getchar();
SPI_Port_Init();
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
rSPCON1 = (rSPCON1&0x7)|(2<<5)|(1<<4)|(1<<3)|(0<<0);//DMA,en-SCK,master
rSPPIN1 |= (1<<0);//Feedback Clock Disable, Master Out Keep
SPI1_Master_nSS_Con(0);
Set_Spi1_Tx_DMA_Set(0); // Spi1 Master DMA channel 1 Set
while(tx_dmaDone) {
if(Uart_GetKey())
break;
}
for(i=0;i<400;i++);
SPI1_Master_nSS_Con(1);
rSPCON1=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal
SPI_Port_Recovery();
}
void Set_Spi1_Tx_DMA_Set(U32 ch)
{
int i;
unsigned char *tx_ptr;
DMA *pDMA;
tx_ptr=(unsigned char *)(SPI_BUFFER1+0x1000000);
for(i=0;i<76800;i++) {
*tx_ptr++=(unsigned char)(pspi_dma[i]);
*tx_ptr++=(unsigned char)(pspi_dma[i]>>8);
*tx_ptr++=(unsigned char)(pspi_dma[i]>>16);
*tx_ptr++=(unsigned char)(pspi_dma[i]>>24);
}
tx_dmaDone=1;
pISR_DMA = (unsigned)DmaTx_Int; // DMA ISR Address Mapping
switch(ch) {
case 0 :
pDMA=(void *)0x4b000000;
rINTSUBMSK&=~(BIT_SUB_DMA0); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 1 :
pDMA=(void *)0x4b000100;
rINTSUBMSK&=~(BIT_SUB_DMA1); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 2 :
pDMA=(void *)0x4b000200;
rINTSUBMSK&=~(BIT_SUB_DMA2); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 3 :
pDMA=(void *)0x4b000300;
rINTSUBMSK&=~(BIT_SUB_DMA3); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 4 :
pDMA=(void *)0x4b000400;
rINTSUBMSK&=~(BIT_SUB_DMA4); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 5 :
pDMA=(void *)0x4b000500;
rINTSUBMSK&=~(BIT_SUB_DMA5); // Interrupt SUB Mask Disable, Interrupt Enable
break;
default :
pDMA=(void *)0x4b000500;
rINTSUBMSK&=~(BIT_SUB_DMA5); // Interrupt SUB Mask Disable, Interrupt Enable
}
rINTMSK&=~(BIT_DMA); // Interrupt Mask Disable, Interrupt Enable
pDMA->DISRC=(unsigned)(SPI_BUFFER1+0x1000000);
pDMA->DISRCC=(0<<1)|(0<<0); //AHB(Memory), inc
pDMA->DIDST=(unsigned)0x59000010;
pDMA->DIDSTC=(1<<1)|(1); //APB(SPI), fix
pDMA->DCON=(1<<31)|(0<<30)|(1<<29)|(0<<28)|(0<<27)|(1<<22)|(0<<20)|(0x4b001);
//HS|APB|InterruptEn|TransferSize|WholeServ|RelaodOff|DataSize|TransferCount
pDMA->DMAREQSEL=(2<<1)|(1<<0); // HWSRC SPI1 TX
pDMA->DMASKTRIG=(0<<2)|(1<<1)|(0); //run, DMA channel on, no-sw trigger
}
void __irq DmaTx_Int(void)
{
rINTSUBMSK|=(BIT_SUB_DMA0|BIT_SUB_DMA1|BIT_SUB_DMA2|BIT_SUB_DMA3|BIT_SUB_DMA4|BIT_SUB_DMA5);
rINTMSK|=(BIT_DMA);
rSUBSRCPND |= (BIT_SUB_DMA0|BIT_SUB_DMA1|BIT_SUB_DMA2|BIT_SUB_DMA3|BIT_SUB_DMA4|BIT_SUB_DMA5);
ClearPending(BIT_DMA);
tx_dmaDone=0;
}
void Test_Spi1_S_Rx_Buf_DMA(void)
{
unsigned int i,j;
unsigned char *rx_ptr;
unsigned int read_data,dummy_data;
unsigned int ErrCnt;
printf("[One Board SPI1(Master Tx), Another Board SPI1(Slave Rx) DMA test]\n");
SPI_Port_Init();
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
rSPCON1 = (rSPCON1&0x7)|(1<<7)|(3<<5)|(0<<4)|(0<<3)|(0<<0);//DMA,en-SCK,master
rSPPIN1 |= (1<<0);//Feedback Clock Disable, Master Out Keep
Set_Spi1_Rx_DMA_Set(0); // Spi1 Slave DMA channel 1 Set
while(rx_dmaDone) {
if(Uart_GetKey())
break;
}
for(i=0;i<1000;i++);
rSPCON0=(0<<5)|(0<<4)|(0<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,slave,low,A,normal
rx_ptr=(unsigned char *)(SPI_BUFFER1);
rx_ptr += 2; // dummy removed
printf("Data compare !!\n");
ErrCnt=0;
for(i=0,j=0;i<76800;i++,j+=4) {
read_data = (U32)(*(rx_ptr+j+3)<<24|*(rx_ptr+j+2)<<16|*(rx_ptr+j+1)<<8|*(rx_ptr+j));
if(pspi_dma[i]!=read_data) {
printf("%d Ori [%08x]\t",i,pspi_dma[i]);
printf("Cpy [%08x]\t",read_data);
ErrCnt++;
printf("E");
getchar();
}
}
printf("Error Count : %d\n",ErrCnt);
SPI_Port_Recovery();
}
void Set_Spi1_Rx_DMA_Set(U32 ch)
{
int i;
U32 *ptr_erase;
DMA *pDMA;
ptr_erase = (unsigned int *)(SPI_BUFFER1);
for(i=0;i<76800;i++) {
*ptr_erase++ = 0;
}
rx_dmaDone=1;
pISR_DMA = (unsigned)DmaRx_Int; // DMA ISR Address Mapping
switch(ch) {
case 0 :
pDMA=(void *)0x4b000000;
rINTSUBMSK&=~(BIT_SUB_DMA0); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 1 :
pDMA=(void *)0x4b000100;
rINTSUBMSK&=~(BIT_SUB_DMA1); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 2 :
pDMA=(void *)0x4b000200;
rINTSUBMSK&=~(BIT_SUB_DMA2); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 3 :
pDMA=(void *)0x4b000300;
rINTSUBMSK&=~(BIT_SUB_DMA3); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 4 :
pDMA=(void *)0x4b000400;
rINTSUBMSK&=~(BIT_SUB_DMA4); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 5 :
pDMA=(void *)0x4b000500;
rINTSUBMSK&=~(BIT_SUB_DMA5); // Interrupt SUB Mask Disable, Interrupt Enable
break;
default :
pDMA=(void *)0x4b000500;
rINTSUBMSK&=~(BIT_SUB_DMA5); // Interrupt SUB Mask Disable, Interrupt Enable
}
rINTMSK&=~(BIT_DMA); // Interrupt Mask Disable, Interrupt Enable
pDMA->DISRC=(unsigned)(0x59000020);
pDMA->DISRCC=(1<<1)|(1<<0); //AHB(Memory), inc
pDMA->DIDST=(unsigned)(SPI_BUFFER1);
pDMA->DIDSTC=(0<<1)|(0); //APB(SPI), fix
pDMA->DCON=(1<<31)|(0<<30)|(1<<29)|(0<<28)|(0<<27)|(1<<22)|(0<<20)|(0x4b002);
//HS|APB|InterruptEn|TransferSize|WholeServ|RelaodOff|DataSize|TransferCount
pDMA->DMAREQSEL=(3<<1)|(1<<0); // HWSRC SPI1 RX
pDMA->DMASKTRIG=(0<<2)|(1<<1)|(0); //run, DMA channel on, no-sw trigger
}
void __irq DmaRx_Int(void)
{
rINTSUBMSK|=(BIT_SUB_DMA0|BIT_SUB_DMA1|BIT_SUB_DMA2|BIT_SUB_DMA3|BIT_SUB_DMA4|BIT_SUB_DMA5);
rINTMSK|=(BIT_DMA);
rSPCON1&=~(1<<7); // Rx dir (Clock Out Stop)
rSUBSRCPND |= (BIT_SUB_DMA0|BIT_SUB_DMA1|BIT_SUB_DMA2|BIT_SUB_DMA3|BIT_SUB_DMA4|BIT_SUB_DMA5);
ClearPending(BIT_DMA);
rx_dmaDone=0;
}
void Test_Spi1_M_Rx_Buf_DMA(void)
{
unsigned int i,j;
unsigned char *rx_ptr;
unsigned int read_data,dummy_data;
unsigned int ErrCnt;
printf("[This Board is SPI1(Master Rx), Another Board are SPI1(Slave Tx) DMA test]\n");
printf("Slave is ready? Then press any key, Start\n");
getchar();
SPI_Port_Init();
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
rSPCON1 = (rSPCON1&0x7)|(1<<7)|(3<<5)|(1<<4)|(1<<3)|(0<<0);//DMA,en-SCK,master
rSPPIN1 |= (1<<3)|(1<<0);//Feedback Clock Disable, Master Out Keep
SPI1_Master_nSS_Con(0);
Set_Spi1_Rx_DMA_Set(0); // Spi1 Master DMA channel 0 Set
while(rx_dmaDone) {
if(Uart_GetKey())
break;
}
for(i=0;i<1000;i++);
SPI1_Master_nSS_Con(1);
rSPCON1=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal
rx_ptr=(unsigned char *)(SPI_BUFFER1);
rx_ptr += 2; // dummy removed
printf("Data compare !!\n");
ErrCnt=0;
for(i=0,j=0;i<76800;i++,j+=4) {
read_data = (U32)(*(rx_ptr+j+3)<<24|*(rx_ptr+j+2)<<16|*(rx_ptr+j+1)<<8|*(rx_ptr+j));
if(pspi_dma[i]!=read_data) {
printf("%d Ori [%08x]\t",i,pspi_dma[i]);
printf("Cpy [%08x]\t",read_data);
ErrCnt++;
printf("E");
getchar();
}
}
printf("Error Count : %d\n",ErrCnt);
SPI_Port_Recovery();
}
void Test_Spi1_S_Tx_Buf_DMA(void)
{
int i;
printf("[One Board SPI0(Master Rx), Another Board SPI0(Slave Tx) DMA test]\n");
SPI_Port_Init();
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
rSPCON1 = (rSPCON1&0x7)|(2<<5)|(0<<4)|(0<<3)|(0<<0);//DMA,dis-SCK,slave
rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<0);//Feedback Clock Disable, Master Out Keep
Set_Spi1_Tx_DMA_Set(0); // Spi1 Master DMA channel 1 Set
while(tx_dmaDone) {
if(Uart_GetKey())
break;
}
for(i=0;i<400;i++);
rSPCON1=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal
SPI_Port_Recovery();
}
void Test_Spi1_M_Tx_Fifo_Int(void)
{
int i;
printf("[This Board is SPI1(Master Tx), Another Board are SPI1(Slave Rx) Fifo Int. test]\n");
printf("Slave is ready? Then press any key, Start\n");
getchar();
SPI_Port_Init();
rSPCON1=(1<<11)|(1<<10); // FIFO Clear
while((rSPCON1>>10)&0x3 > 0); // Wait for FIFO clear
endSpi1Tx=0;
#if 1
spi1TxStr = (volatile char *)pspi_dma;
trans_count = 307200-3;
#else
spi1TxStr = "1234567890!@#$%^&*()";
trans_count = 20-3;
#endif
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<0);//Feedback Clock Disable, Master Out Keep
rSPFIC1 = (rSPFIC1&~0xfff)|(1<<4)|(1<<2);
rSPCON1 = (rSPCON1&~0xffff)|(0<<14)|(0<<12)|(1<<8)|(0<<7)|(0<<5)|(1<<4)|(1<<3)|(0<<0);//DMA,dis-SCK,slave
SPI1_Master_nSS_Con(0);
pISR_SPI1=(unsigned)Spi1_Tx_fifo_Int;
rINTMSK&=~(BIT_SPI1);
rSPTXFIFO1 = *spi1TxStr++;
rSPTXFIFO1 = *spi1TxStr++;
rSPTXFIFO1 = *spi1TxStr++;
while(endSpi1Tx==0){
if(Uart_GetKey())
break;
}
while(((rSPSTA1>>4)&0x1)==0); // wait for fifo empty state
for(i=0;i<7000;i++);
SPI1_Master_nSS_Con(1);
rSPCON0 = 0x0008;
rSPFIC1 = 0x0;
rSPPIN1 = 0x02;
// rSPCON0=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal
SPI_Port_Recovery();
}
void Test_Spi1_M_Tx_Fifo_Int2(void)
{
int i;
printf("[This Board is SPI1(Master Tx), Another Board are SPI1(Slave Rx) Fifo Int. test]\n");
printf("Slave is ready? Then press any key, Start\n");
getchar();
SPI_Port_Init();
rSPCON1=(1<<11)|(1<<10); // FIFO Clear
while((rSPCON1>>10)&0x3 > 0); // Wait for FIFO clear
endSpi1Tx=0;
#if 1
spi1TxStr = (volatile char *)pspi_dma;
trans_count = 307200;
#else
spi1TxStr = "1234567890!@#$%^&*()";
trans_count = 20-3;
#endif
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<0);//Feedback Clock Disable, Master Out Keep
rSPFIC1 = (rSPFIC1&~0xfff)|(1<<4)|(1<<2);
rSPCON1 = (rSPCON1&~0xffff)|(0<<14)|(0<<12)|(1<<8)|(0<<7)|(0<<5)|(1<<4)|(1<<3)|(0<<0);//DMA,dis-SCK,slave
SPI1_Master_nSS_Con(0);
pISR_SPI1=(unsigned)Spi1_Tx_fifo_Int;
rINTMSK&=~(BIT_SPI1);
while(endSpi1Tx==0){
if(Uart_GetKey())
break;
}
while(((rSPSTA1>>4)&0x1)==0); // wait for fifo empty state
for(i=0;i<7000;i++);
SPI1_Master_nSS_Con(1);
rSPCON0 = 0x0008;
rSPFIC1 = 0x0;
rSPPIN1 = 0x02;
// rSPCON0=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal
SPI_Port_Recovery();
}
void __irq Spi1_Tx_fifo_Int(void)
{
rINTMSK|=(BIT_SPI1);
while((rSPSTA1>>5)&0x1) {
// while((rSPSTA1>>16)&0x1f) {
rSPTXFIFO1 = *spi1TxStr++;
trans_count--;
if(trans_count==0) {
endSpi1Tx=1;
ClearPending(BIT_SPI1);
return;
}
}
ClearPending(BIT_SPI1);
rINTMSK&=~(BIT_SPI1);
}
void Test_Spi1_S_Rx_Fifo_Int(void)
{
unsigned int i,j;
unsigned char *rx_ptr;
unsigned int read_data,dummy_data;
unsigned int ErrCnt;
U32 *ptr_erase;
ptr_erase = (unsigned int *)(SPI_BUFFER1);
for(i=0;i<76800;i++) {
*ptr_erase++ = 0;
}
SPI_Port_Init();
rSPCON1=(1<<11)|(1<<10); // FIFO Clear
while((rSPCON1>>10)&0x3 == 3); // Wait for FIFO clear
endSpi1Rx=0;
spi1RxStr=(char *) SPI_BUFFER1; // Rx Buffer to receive
trans_count = 307200;
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
rSPFIC1 = (rSPFIC1&~0xfff)|(1<<7)|(1<<5)|(0<<3); // Rx FIFO Time-Out, Rx FIFO Almost Full Interrupt Enable
rSPTOV = 0xfffff; // Rx FIFO Time-out Count
rSPCON1 = (rSPCON1&~0xffff)|(1<<16)|(2<<14)|(1<<9)|(0<<7)|(0<<5)|(0<<4)|(0<<3)|(0<<0);//Poll,dis-SCK,slave
pISR_SPI1=(unsigned)Spi1_Rx_fifo_Int;
rINTMSK&=~(BIT_SPI1);
while(endSpi1Rx==0){
if(Uart_GetKey())
break;
}
rSPCON0=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal
rx_ptr=(unsigned char *)(SPI_BUFFER1);
printf("Data trans_count %d\n",trans_count);
printf("Data compare !!\n");
ErrCnt=0;
for(i=0,j=0;i<76800;i++,j+=4) {
read_data = (U32)(*(rx_ptr+j+3)<<24|*(rx_ptr+j+2)<<16|*(rx_ptr+j+1)<<8|*(rx_ptr+j));
if(pspi_dma[i]!=read_data) {
printf("%d Ori [%08x]\t",i,pspi_dma[i]);
printf("Cpy [%08x]\t",read_data);
ErrCnt++;
printf("E");
getchar();
}
}
printf("Error Count : %d\n",ErrCnt);
SPI_Port_Recovery();
}
void __irq Spi1_Rx_fifo_Int(void)
{
rINTMSK|=(BIT_SPI1);
if((rSPSTA1>>12)&0x1)
rSPSTA1 |= (1<<12); // Rx FIFO Trailing Byte Time-out interrupt bit clear
// while((rSPSTA1>>24)&0x1f) {
while((rSPSTA1>>6)&0x1) {
*spi1RxStr++ = rSPRXFIFO1;
trans_count--;
if(trans_count==0) {
rSPCON1&=~(1<<7); // Rx dir (Clock Out Stop)
endSpi1Rx=1;
printf("Rx fifo time out\n");
ClearPending(BIT_SPI1);
return;
}
}
ClearPending(BIT_SPI1);
rINTMSK&=~(BIT_SPI1);
}
void Test_Spi1_M_Rx_Fifo_Int(void)
{
unsigned int i,j;
unsigned char *rx_ptr;
unsigned int read_data,dummy_data;
unsigned int ErrCnt;
U32 *ptr_erase;
ptr_erase = (unsigned int *)(SPI_BUFFER1);
for(i=0;i<76800;i++) {
*ptr_erase++ = 0;
}
printf("[This Board is SPI1(Master Rx), Another Board are SPI1(Slave Tx) Fifo Int. test]\n");
printf("Slave is ready? Then press any key, Start\n");
getchar();
SPI_Port_Init();
rSPCON1=(1<<11)|(1<<10); // FIFO Clear
while((rSPCON1>>10)&0x3 > 0); // Wait for FIFO clear
endSpi1Rx=0;
spi1RxStr=(char *) SPI_BUFFER1; // Rx Buffer to receive
trans_count = 307200;
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
SPI1_Master_nSS_Con(0);
pISR_SPI1=(unsigned)Spi1_Rx_fifo_Int;
rINTMSK&=~(BIT_SPI1);
rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<3)|(1<<0);//Feedback Clock Disable, Master Out Keep
rSPFIC1 = (rSPFIC1&~0xfff)|(1<<7)|(1<<5)|(0<<3); // Rx FIFO Time-Out, Rx FIFO Almost Full Interrupt Enable
rSPTOV = 0xfffff; // Rx FIFO Time-out Count
rSPCON1 = (rSPCON1&~0xffff)|(1<<16)|(0<<14)|(1<<9)|(0<<5)|(1<<4)|(1<<3)|(0<<0);//Poll,en-SCK,master
rSPCON1|=(1<<7); // Rx dir (Clock Out Start)
while(endSpi1Rx==0){
if(Uart_GetKey())
break;
}
// while(((rSPSTA1>>4)&0x1)==0); // wait for fifo empty state
for(i=0;i<7000;i++);
SPI1_Master_nSS_Con(1);
rx_ptr=(unsigned char *)(SPI_BUFFER1);
printf("Data trans_count %d\n",trans_count);
printf("Data compare !!\n");
ErrCnt=0;
for(i=0,j=0;i<76800;i++,j+=4) {
read_data = (U32)(*(rx_ptr+j+3)<<24|*(rx_ptr+j+2)<<16|*(rx_ptr+j+1)<<8|*(rx_ptr+j));
if(pspi_dma[i]!=read_data) {
printf("%d Ori [%08x]\t",i,pspi_dma[i]);
printf("Cpy [%08x]\t",read_data);
ErrCnt++;
printf("E");
getchar();
}
}
printf("Error Count : %d\n",ErrCnt);
rSPCON0 = 0x0008;
rSPFIC1 = 0x0;
rSPPIN1 = 0x02;
// rSPCON0=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal
SPI_Port_Recovery();
}
void Test_Spi1_S_Tx_Fifo_Int(void)
{
int i;
SPI_Port_Init();
rSPCON1=(1<<11)|(1<<10); // FIFO Clear
while((rSPCON1>>10)&0x3 > 0); // Wait for FIFO clear
endSpi1Tx=0;
#if 1
spi1TxStr = (volatile char *)pspi_dma;
trans_count = 307200-3;
#else
spi1TxStr = "1234567890!@#$%^&*()";
trans_count = 20-3;
#endif
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<0);//Feedback Clock Disable, Master Out Keep
rSPFIC1 = (rSPFIC1&~0xfff)|(1<<4)|(1<<2);
rSPCON1 = (rSPCON1&~0xffff)|(0<<12)|(1<<8)|(0<<7)|(0<<5)|(0<<4)|(0<<3)|(0<<0);//DMA,dis-SCK,slave
pISR_SPI1=(unsigned)Spi1_Tx_fifo_Int;
rINTMSK&=~(BIT_SPI1);
rSPTXFIFO1 = *spi1TxStr++;
rSPTXFIFO1 = *spi1TxStr++;
rSPTXFIFO1 = *spi1TxStr++;
while(endSpi1Tx==0){
if(Uart_GetKey())
break;
}
while(((rSPSTA1>>4)&0x1)==0); // wait for fifo empty state
for(i=0;i<7000;i++);
rSPCON0 = 0x0008;
rSPFIC1 = 0x0;
rSPPIN1 = 0x02;
// rSPCON0=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal
SPI_Port_Recovery();
}
void Test_Spi1_S_Tx_Fifo_Int2(void)
{
int i;
SPI_Port_Init();
rSPCON1=(1<<11)|(1<<10); // FIFO Clear
while((rSPCON1>>10)&0x3 > 0); // Wait for FIFO clear
endSpi1Tx=0;
#if 1
spi1TxStr = (volatile char *)pspi_dma;
trans_count = 307200;
#else
spi1TxStr = "1234567890!@#$%^&*()";
trans_count = 20-3;
#endif
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<0);//Feedback Clock Disable, Master Out Keep
rSPFIC1 = (rSPFIC1&~0xfff)|(1<<4)|(1<<2);
rSPCON1 = (rSPCON1&~0xffff)|(0<<12)|(1<<8)|(0<<7)|(0<<5)|(0<<4)|(0<<3)|(0<<0);//DMA,dis-SCK,slave
pISR_SPI1=(unsigned)Spi1_Tx_fifo_Int;
rINTMSK&=~(BIT_SPI1);
while(endSpi1Tx==0){
if(Uart_GetKey())
break;
}
while(((rSPSTA1>>4)&0x1)==0); // wait for fifo empty state
for(i=0;i<7000;i++);
rSPCON0 = 0x0008;
rSPFIC1 = 0x0;
rSPPIN1 = 0x02;
// rSPCON0=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal
SPI_Port_Recovery();
}
void Test_Spi1_M_Tx_Fifo_DMA(void)
{
int i;
printf("[This Board is SPI1(Master Tx), Another Board are SPI1(Slave Rx) Fifo DMA. test]\n");
printf("Slave is ready? Then press any key, Start\n");
getchar();
SPI_Port_Init();
rSPCON1=(1<<11)|(1<<10); // FIFO Clear
while((rSPCON1>>10)&0x3 > 0); // Wait for FIFO clear
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
SPI1_Master_nSS_Con(0);
Set_Spi1_Tx_Fifo_DMA(0);
rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<3)|(1<<0);//Feedback Clock Disable, Master Out Keep
rSPFIC1 = (rSPFIC1&~0xfff)|(2<<8);
rSPCON1 = (rSPCON1&~0xffff)|(1<<8)|(0<<7)|(0<<5)|(1<<4)|(1<<3)|(0<<0);//DMA,en-SCK,master
while(tx_dmaDone){
if(Uart_GetKey())
break;
}
while(((rSPSTA1>>4)&0x1)==0); // wait for fifo empty state
for(i=0;i<7000;i++);
SPI1_Master_nSS_Con(1);
rSPCON0 = 0x0008;
rSPFIC1 = 0x0;
rSPPIN1 = 0x02;
// rSPCON0=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal
SPI_Port_Recovery();
}
void Set_Spi1_Tx_Fifo_DMA(U32 ch)
{
unsigned char *tx_ptr;
DMA *pDMA;
tx_ptr = (unsigned char *)pspi_dma;
tx_dmaDone=1;
pISR_DMA = (unsigned)DmaTx_Int; // DMA ISR Address Mapping
switch(ch) {
case 0 :
pDMA=(void *)0x4b000000;
rINTSUBMSK&=~(BIT_SUB_DMA0); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 1 :
pDMA=(void *)0x4b000100;
rINTSUBMSK&=~(BIT_SUB_DMA1); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 2 :
pDMA=(void *)0x4b000200;
rINTSUBMSK&=~(BIT_SUB_DMA2); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 3 :
pDMA=(void *)0x4b000300;
rINTSUBMSK&=~(BIT_SUB_DMA3); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 4 :
pDMA=(void *)0x4b000400;
rINTSUBMSK&=~(BIT_SUB_DMA4); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 5 :
pDMA=(void *)0x4b000500;
rINTSUBMSK&=~(BIT_SUB_DMA5); // Interrupt SUB Mask Disable, Interrupt Enable
break;
default :
pDMA=(void *)0x4b000500;
rINTSUBMSK&=~(BIT_SUB_DMA5); // Interrupt SUB Mask Disable, Interrupt Enable
}
rINTMSK&=~(BIT_DMA); // Interrupt Mask Disable, Interrupt Enable
pDMA->DISRC=(unsigned)tx_ptr;
pDMA->DISRCC=(0<<1)|(0<<0); //AHB(Memory), inc
pDMA->DIDST=(unsigned)0x59000018;
pDMA->DIDSTC=(1<<1)|(1); //APB(SPI), fix
pDMA->DCON=(1<<31)|(0<<30)|(1<<29)|(1<<28)|(0<<27)|(1<<22)|(0<<20)|(0x12c00);
//HS|APB|InterruptEn|TransferSize|WholeServ|RelaodOff|DataSize|TransferCount
pDMA->DMAREQSEL=(2<<1)|(1<<0); // HWSRC SPI1 TX
pDMA->DMASKTRIG=(0<<2)|(1<<1)|(0); //run, DMA channel on, no-sw trigger
}
void Test_Spi1_S_Rx_Fifo_DMA(void)
{
unsigned int i,j;
unsigned char *rx_ptr;
unsigned int read_data,dummy_data;
unsigned int ErrCnt;
SPI_Port_Init();
rSPCON1=(1<<11)|(1<<10); // FIFO Clear
while((rSPCON1>>10)&0x3 > 0); // Wait for FIFO clear
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
Set_Spi1_Rx_Fifo_DMA(0);
rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<1)|(1<<0);//Feedback Clock Disable, Master Out Keep
rSPFIC1 = (rSPFIC1&~0xfff)|(2<<10);
rSPCON1 = (rSPCON1&~0xffff)|(1<<14)|(1<<9)|(1<<7)|(0<<5)|(0<<4)|(0<<3)|(0<<0);//DMA,dis-SCK,Slave
while(rx_dmaDone){
if(Uart_GetKey())
break;
}
rx_ptr=(unsigned char *)(SPI_BUFFER1);
printf("Data compare !!\n");
ErrCnt=0;
for(i=0,j=0;i<76800;i++,j+=4) {
read_data = (U32)(*(rx_ptr+j+3)<<24|*(rx_ptr+j+2)<<16|*(rx_ptr+j+1)<<8|*(rx_ptr+j));
if(pspi_dma[i]!=read_data) {
printf("%d Ori [%08x]\t",i,pspi_dma[i]);
printf("Cpy [%08x]\t",read_data);
ErrCnt++;
printf("E");
getchar();
}
}
printf("Error Count : %d\n",ErrCnt);
rSPCON0 = 0x0008;
rSPFIC1 = 0x0;
rSPPIN1 = 0x02;
SPI_Port_Recovery();
}
void Set_Spi1_Rx_Fifo_DMA(U32 ch)
{
int i;
U32 *ptr_erase;
DMA *pDMA;
ptr_erase = (unsigned int *)(SPI_BUFFER1);
for(i=0;i<76800;i++) {
*ptr_erase++ = 0;
}
rx_dmaDone=1;
pISR_DMA = (unsigned)DmaRx_Int; // DMA ISR Address Mapping
switch(ch) {
case 0 :
pDMA=(void *)0x4b000000;
rINTSUBMSK&=~(BIT_SUB_DMA0); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 1 :
pDMA=(void *)0x4b000100;
rINTSUBMSK&=~(BIT_SUB_DMA1); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 2 :
pDMA=(void *)0x4b000200;
rINTSUBMSK&=~(BIT_SUB_DMA2); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 3 :
pDMA=(void *)0x4b000300;
rINTSUBMSK&=~(BIT_SUB_DMA3); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 4 :
pDMA=(void *)0x4b000400;
rINTSUBMSK&=~(BIT_SUB_DMA4); // Interrupt SUB Mask Disable, Interrupt Enable
break;
case 5 :
pDMA=(void *)0x4b000500;
rINTSUBMSK&=~(BIT_SUB_DMA5); // Interrupt SUB Mask Disable, Interrupt Enable
break;
default :
pDMA=(void *)0x4b000500;
rINTSUBMSK&=~(BIT_SUB_DMA5); // Interrupt SUB Mask Disable, Interrupt Enable
}
rINTMSK&=~(BIT_DMA); // Interrupt Mask Disable, Interrupt Enable
pDMA->DISRC=(unsigned)(0x5900001c);
pDMA->DISRCC=(1<<1)|(1<<0); //AHB(Memory), inc
pDMA->DIDST=(unsigned)(SPI_BUFFER1);
pDMA->DIDSTC=(0<<1)|(0); //APB(SPI), fix
pDMA->DCON=(1<<31)|(0<<30)|(1<<29)|(1<<28)|(0<<27)|(1<<24)|(1<<22)|(0<<20)|(0x12c00);
//HS|APB|InterruptEn|TransferSize|WholeServ|RelaodOff|DataSize|TransferCount
pDMA->DMAREQSEL=(3<<1)|(1<<0); // HWSRC SPI1 RX
pDMA->DMASKTRIG=(0<<2)|(1<<1)|(0); //run, DMA channel on, no-sw trigger
}
void Test_Spi1_M_Rx_Fifo_DMA(void)
{
unsigned int i,j;
unsigned char *rx_ptr;
unsigned int read_data,dummy_data;
unsigned int ErrCnt;
printf("[This Board is SPI1(Master Rx), Another Board are SPI1(Slave Tx) Fifo DMA. test]\n");
printf("Slave is ready? Then press any key, Start\n");
getchar();
SPI_Port_Init();
rSPCON1=(1<<11)|(1<<10); // FIFO Clear
while((rSPCON1>>10)&0x3 > 0); // Wait for FIFO clear
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
rSPPIN1 = (rSPPIN1&~(1<<3))|(3<<1)|(1<<0);//Feedback Clock Disable, Master Out Keep
rSPFIC1 = (rSPFIC1&~0xfff)|(2<<10);
rSPCON1 = (rSPCON1&~0xffff)|(1<<14)|(1<<9)|(0<<5)|(1<<4)|(1<<3)|(0<<0);//DMA,en-SCK,Master
SPI1_Master_nSS_Con(0);
Set_Spi1_Rx_Fifo_DMA(0);
rSPCON1|=(1<<7); // Rx dir (Clock Out Start)
while(rx_dmaDone){
if(Uart_GetKey())
break;
}
// for(i=0;i<7000;i++);
SPI1_Master_nSS_Con(1);
rx_ptr=(unsigned char *)(SPI_BUFFER1);
printf("Data compare !!\n");
ErrCnt=0;
for(i=0,j=0;i<76800;i++,j+=4) {
read_data = (U32)(*(rx_ptr+j+3)<<24|*(rx_ptr+j+2)<<16|*(rx_ptr+j+1)<<8|*(rx_ptr+j));
if(pspi_dma[i]!=read_data) {
printf("%d Ori [%08x]\t",i,pspi_dma[i]);
printf("Cpy [%08x]\t",read_data);
ErrCnt++;
printf("E");
getchar();
}
}
printf("Error Count : %d\n",ErrCnt);
rSPCON0 = 0x0008;
rSPFIC1 = 0x0;
rSPPIN1 = 0x02;
SPI_Port_Recovery();
}
void Test_Spi1_S_Tx_Fifo_DMA(void)
{
int i;
SPI_Port_Init();
rSPCON1=(1<<11)|(1<<10); // FIFO Clear
while((rSPCON1>>10)&0x3 > 0); // Wait for FIFO clear
SPI_Baud_Rate_Set(1000000);
SPI_Transfer_Format();
Set_Spi1_Tx_Fifo_DMA(0);
rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<0);//Feedback Clock Disable, Master Out Keep
rSPFIC1 = (rSPFIC1&~0xfff)|(2<<8);
rSPCON1 = (rSPCON1&~0xffff)|(1<<8)|(0<<7)|(0<<5)|(0<<4)|(0<<3)|(0<<0);//DMA,dis-SCK,slave
while(tx_dmaDone){
if(Uart_GetKey())
break;
}
while(((rSPSTA1>>4)&0x1)==0); // wait for fifo empty state
for(i=0;i<7000;i++);
rSPCON0 = 0x0008;
rSPFIC1 = 0x0;
rSPPIN1 = 0x02;
SPI_Port_Recovery();
}
void SPI_Port_Init(void)
{
rGPECON_saved = rGPECON;
rGPEUDP_saved = rGPEUDP;
rGPLCON_saved = rGPLCON;
rGPLUDP_saved = rGPLUDP;
rGPEUDP = 0xaaaaaaaa; // Disable pull-up/down function
rGPLUDP = 0xaaaaaaaa; // Disable pull-up/down function
rGPECON = (rGPECON&~(0x3f<<22))|(0x2a<<22); // GPE13,12,11 <= SPICLK0,SPIMOSI0,SPIMISO0
rGPLCON = (rGPLCON&~(0x3ff<<20))|(0x2aa<<20); // GPL14,13,12,11,10 <= SS1,SS0,SPIMISO1,SPIMOSI1,SPICLK1
printf("SPI Port Init\n");
}
void SPI_Port_Recovery(void)
{
rGPECON = rGPECON_saved;
rGPEUDP = rGPEUDP_saved;
rGPLCON = rGPLCON_saved;
rGPLUDP = rGPLUDP_saved;
printf("SPI Port Recovery\n");
}
void SPI1_Master_nSS_Con(U32 CSout)
{
#if 0
if(CSout==0) {
printf("CS1 Active(Low)\n");
}
else {
printf("CS1 Inactive(High)\n");
}
#endif
rSPPIN1=(rSPPIN1&~(1<<1))|(CSout<<1);
}
void SPI_Baud_Rate_Set(float BaudRate)
{
U32 PrescalerVal;
SystemCLK(0);
if(BaudRate>(PCLK/2)) {
printf("SPI Baud Rate is too big (<%.1f MHz)\n",(float)(PCLK)/2/1000000);
while(1);
}
PrescalerVal = (U32)(PCLK/2/BaudRate-1);
rSPPRE1 = PrescalerVal;
printf("BaudRate [%.3f MHz]\trSPPRE1 [0x%08x]\n",((float)PCLK/2/(PrescalerVal+1))/1000000,rSPPRE1);
printf("PCLK = %d\n",PCLK);
printf("PrescalerVal = %d\n",PrescalerVal);
}
void SPI_Transfer_Format(void)
{
#if 0
printf("SPI : Select Transfer Type\n[0] Low,A\t[1] Low,B\t[2] High,A\t[3] High,B\n");
switch(GetIntNum()) {
case 0 :
rSPCON1 = (rSPCON1 &~(3<<1))|(0<<2)|(0<<1);
printf("SPI CPOL=0, CPHA=0\n");
break;
case 1 :
rSPCON1 = (rSPCON1 &~(3<<1))|(0<<2)|(1<<1);
printf("SPI CPOL=0, CPHA=1\n");
break;
case 2 :
rSPCON1 = (rSPCON1 &~(3<<1))|(1<<2)|(0<<1);
printf("SPI CPOL=1, CPHA=0\n");
break;
case 3 :
rSPCON1 = (rSPCON1 &~(3<<1))|(1<<2)|(1<<1);
printf("SPI CPOL=1, CPHA=1\n");
break;
default :
rSPCON1 = (rSPCON1 &~(3<<1))|(0<<2)|(0<<1);
printf("SPI CPOL=0, CPHA=0\n");
}
#else
rSPCON1 = (rSPCON1 &~(3<<1))|(0<<2)|(0<<1);
printf("SPI CPOL=0, CPHA=0\n");
#endif
}