www.pudn.com > brent_kung_add.rar > fa1.v, change:2016-02-09,size:674b


`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date:    21:58:14 04/06/2014 
// Design Name: 
// Module Name:    fulladder 
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////

module fulladder(a,b,c,sum,carry);
parameter SIZE = 1;
input [SIZE-1:0] a,b;
input c;
output[SIZE-1:0] sum;
output carry;
assign sum = a ^ b ^ c;
assign carry = (a&b)| ((b&c) | (c&a));
endmodule