www.pudn.com > 1602_FPGA.rar > myfirst_niosii.lpc.html, change:2016-01-15,size:28638b


<TABLE> 
<TR  bgcolor="#C0C0C0"> 
<TH>Hierarchy</TH> 
<TH>Input</TH> 
<TH>Constant Input</TH> 
<TH>Unused Input</TH> 
<TH>Floating Input</TH> 
<TH>Output</TH> 
<TH>Constant Output</TH> 
<TH>Unused Output</TH> 
<TH>Floating Output</TH> 
<TH>Bidir</TH> 
<TH>Constant Bidir</TH> 
<TH>Unused Bidir</TH> 
<TH>Input only Bidir</TH> 
<TH>Output only Bidir</TH> 
</TR> 
<TR > 
<TD >u0|rst_controller|alt_rst_req_sync_uq1</TD> 
<TD >2</TD> 
<TD >1</TD> 
<TD >0</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|rst_controller|alt_rst_sync_uq1</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >1</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|rst_controller</TD> 
<TD >33</TD> 
<TD >30</TD> 
<TD >0</TD> 
<TD >30</TD> 
<TD >2</TD> 
<TD >30</TD> 
<TD >30</TD> 
<TD >30</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|irq_mapper</TD> 
<TD >3</TD> 
<TD >31</TD> 
<TD >2</TD> 
<TD >31</TD> 
<TD >32</TD> 
<TD >31</TD> 
<TD >31</TD> 
<TD >31</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|rsp_xbar_mux_001|arb|adder</TD> 
<TD >28</TD> 
<TD >14</TD> 
<TD >0</TD> 
<TD >14</TD> 
<TD >14</TD> 
<TD >14</TD> 
<TD >14</TD> 
<TD >14</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|rsp_xbar_mux_001|arb</TD> 
<TD >11</TD> 
<TD >0</TD> 
<TD >4</TD> 
<TD >0</TD> 
<TD >7</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|rsp_xbar_mux_001</TD> 
<TD >745</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >113</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|rsp_xbar_mux|arb|adder</TD> 
<TD >8</TD> 
<TD >4</TD> 
<TD >0</TD> 
<TD >4</TD> 
<TD >4</TD> 
<TD >4</TD> 
<TD >4</TD> 
<TD >4</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|rsp_xbar_mux|arb</TD> 
<TD >6</TD> 
<TD >0</TD> 
<TD >4</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|rsp_xbar_mux</TD> 
<TD >215</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >108</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|rsp_xbar_demux_006</TD> 
<TD >109</TD> 
<TD >1</TD> 
<TD >2</TD> 
<TD >1</TD> 
<TD >107</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|rsp_xbar_demux_005</TD> 
<TD >109</TD> 
<TD >1</TD> 
<TD >2</TD> 
<TD >1</TD> 
<TD >107</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|rsp_xbar_demux_004</TD> 
<TD >109</TD> 
<TD >1</TD> 
<TD >2</TD> 
<TD >1</TD> 
<TD >107</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|rsp_xbar_demux_003</TD> 
<TD >109</TD> 
<TD >1</TD> 
<TD >2</TD> 
<TD >1</TD> 
<TD >107</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|rsp_xbar_demux_002</TD> 
<TD >109</TD> 
<TD >1</TD> 
<TD >2</TD> 
<TD >1</TD> 
<TD >107</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|rsp_xbar_demux_001</TD> 
<TD >110</TD> 
<TD >4</TD> 
<TD >2</TD> 
<TD >4</TD> 
<TD >213</TD> 
<TD >4</TD> 
<TD >4</TD> 
<TD >4</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|rsp_xbar_demux</TD> 
<TD >110</TD> 
<TD >4</TD> 
<TD >2</TD> 
<TD >4</TD> 
<TD >213</TD> 
<TD >4</TD> 
<TD >4</TD> 
<TD >4</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|cmd_xbar_mux_006</TD> 
<TD >109</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >107</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|cmd_xbar_mux_005</TD> 
<TD >109</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >107</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|cmd_xbar_mux_004</TD> 
<TD >109</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >107</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|cmd_xbar_mux_003</TD> 
<TD >109</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >107</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|cmd_xbar_mux_002</TD> 
<TD >109</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >107</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|cmd_xbar_mux_001|arb|adder</TD> 
<TD >8</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >4</TD> 
<TD >2</TD> 
<TD >2</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|cmd_xbar_mux_001|arb</TD> 
<TD >6</TD> 
<TD >0</TD> 
<TD >1</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|cmd_xbar_mux_001</TD> 
<TD >215</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >108</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|cmd_xbar_mux|arb|adder</TD> 
<TD >8</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >4</TD> 
<TD >2</TD> 
<TD >2</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|cmd_xbar_mux|arb</TD> 
<TD >6</TD> 
<TD >0</TD> 
<TD >1</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|cmd_xbar_mux</TD> 
<TD >215</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >108</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|cmd_xbar_demux_001</TD> 
<TD >121</TD> 
<TD >49</TD> 
<TD >2</TD> 
<TD >49</TD> 
<TD >743</TD> 
<TD >49</TD> 
<TD >49</TD> 
<TD >49</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|cmd_xbar_demux</TD> 
<TD >116</TD> 
<TD >4</TD> 
<TD >7</TD> 
<TD >4</TD> 
<TD >213</TD> 
<TD >4</TD> 
<TD >4</TD> 
<TD >4</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|limiter_001</TD> 
<TD >216</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >220</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|limiter</TD> 
<TD >216</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >220</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|id_router_006|the_default_decode</TD> 
<TD >0</TD> 
<TD >7</TD> 
<TD >0</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|id_router_006</TD> 
<TD >102</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >107</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|id_router_005|the_default_decode</TD> 
<TD >0</TD> 
<TD >7</TD> 
<TD >0</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|id_router_005</TD> 
<TD >102</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >107</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|id_router_004|the_default_decode</TD> 
<TD >0</TD> 
<TD >7</TD> 
<TD >0</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|id_router_004</TD> 
<TD >102</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >107</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|id_router_003|the_default_decode</TD> 
<TD >0</TD> 
<TD >7</TD> 
<TD >0</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|id_router_003</TD> 
<TD >102</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >107</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|id_router_002|the_default_decode</TD> 
<TD >0</TD> 
<TD >7</TD> 
<TD >0</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|id_router_002</TD> 
<TD >102</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >107</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|id_router_001|the_default_decode</TD> 
<TD >0</TD> 
<TD >7</TD> 
<TD >0</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|id_router_001</TD> 
<TD >102</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >107</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|id_router|the_default_decode</TD> 
<TD >0</TD> 
<TD >7</TD> 
<TD >0</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >7</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|id_router</TD> 
<TD >102</TD> 
<TD >0</TD> 
<TD >2</TD> 
<TD >0</TD> 
<TD >107</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|addr_router_001|the_default_decode</TD> 
<TD >0</TD> 
<TD >10</TD> 
<TD >0</TD> 
<TD >10</TD> 
<TD >10</TD> 
<TD >10</TD> 
<TD >10</TD> 
<TD >10</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|addr_router_001</TD> 
<TD >102</TD> 
<TD >0</TD> 
<TD >5</TD> 
<TD >0</TD> 
<TD >107</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|addr_router|the_default_decode</TD> 
<TD >0</TD> 
<TD >10</TD> 
<TD >0</TD> 
<TD >10</TD> 
<TD >10</TD> 
<TD >10</TD> 
<TD >10</TD> 
<TD >10</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|addr_router</TD> 
<TD >102</TD> 
<TD >0</TD> 
<TD >5</TD> 
<TD >0</TD> 
<TD >107</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|lcd_data_s1_translator_avalon_universal_slave_0_agent_rsp_fifo</TD> 
<TD >142</TD> 
<TD >39</TD> 
<TD >0</TD> 
<TD >39</TD> 
<TD >101</TD> 
<TD >39</TD> 
<TD >39</TD> 
<TD >39</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|mm_interconnect_0|lcd_data_s1_translator_avalon_universal_slave_0_agent|uncompressor</TD> 
<TD >36</TD> 
<TD >1</TD> 
<TD >0</TD> 
<TD >1</TD> 
<TD >34</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
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<TD >u0|lcd_data</TD> 
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<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|jtag_uart|the_soc_system_jtag_uart_scfifo_w|wfifo|auto_generated|dpfifo|FIFOram|altsyncram1</TD> 
<TD >24</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >8</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|jtag_uart|the_soc_system_jtag_uart_scfifo_w|wfifo|auto_generated|dpfifo|FIFOram</TD> 
<TD >24</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >8</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|jtag_uart|the_soc_system_jtag_uart_scfifo_w|wfifo|auto_generated|dpfifo|fifo_state|count_usedw</TD> 
<TD >5</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >6</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|jtag_uart|the_soc_system_jtag_uart_scfifo_w|wfifo|auto_generated|dpfifo|fifo_state</TD> 
<TD >5</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >8</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|jtag_uart|the_soc_system_jtag_uart_scfifo_w|wfifo|auto_generated|dpfifo</TD> 
<TD >13</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >16</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|jtag_uart|the_soc_system_jtag_uart_scfifo_w|wfifo|auto_generated</TD> 
<TD >12</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >16</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|jtag_uart|the_soc_system_jtag_uart_scfifo_w</TD> 
<TD >12</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >16</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|jtag_uart</TD> 
<TD >38</TD> 
<TD >10</TD> 
<TD >23</TD> 
<TD >10</TD> 
<TD >34</TD> 
<TD >10</TD> 
<TD >10</TD> 
<TD >10</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0|cpu</TD> 
<TD >151</TD> 
<TD >0</TD> 
<TD >31</TD> 
<TD >0</TD> 
<TD >114</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
<TR > 
<TD >u0</TD> 
<TD >2</TD> 
<TD >1</TD> 
<TD >0</TD> 
<TD >1</TD> 
<TD >21</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >1</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
<TD >0</TD> 
</TR> 
</TABLE>