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/*******************************************************************************
Copyright(c) 2000 - 2002 Analog Devices. All Rights Reserved.
Developed by Joint Development Software Application Team, IPDC, Bangalore, India
for Blackfin DSPs ( Micro Signal Architecture 1.0 specification).
By using this module you agree to the terms of the Analog Devices License
Agreement for DSP Software.
********************************************************************************
Module Name : bpsk.asm
Label name : __bpsk
Version : 2.0
Change History :
Version Date Author Comments
2.0 01/09/2007 Tested with VDSP++4.5
compiler 7.2.3.2
1.3 11/18/2002 Swarnalatha Tested with VDSP++ 3.0
compiler 6.2.2 on
ADSP-21535 Rev.0.2
1.2 11/13/2002 Swarnalatha Tested with VDSP++ 3.0
on ADSP-21535 Rev. 0.2
1.1 03/05/2002 Sunder Modified to match
silicon cycle count
1.0 10/19/2001 Sunder Original
Description : This routine maps input bits to output symbols according to
the following rule:
BITS Symbols
0 -1
1 1
Assumptions : 1. The bitstream is stored in a character array where the
start of the bitstream is at the LSB of the first character
2. All the characters are full (i.e. the bitstream size is at
least a multiple of 8)
3. Since two characters from the input bitstream are read at a
time, the bitstream size should be a multiple of 16
Prototype : void __bpsk(int n, char in[], char out[]);
Registers Used : R0-R3, I0, L0, P0-P2, LC0, LC1.
Performance :
Code size : 48 Bytes
Cycle count : 144 Cycles (For no of characters, n = 4)
*******************************************************************************/
.section L1_code;
.global __bpsk;
.align 8;
__bpsk:
L0 = 0;
I0 = R1; //Address of input bitstream in I0
P1 = R0; //counter
P0 = R2; //address of output bitstream in P0
P2 = 16(Z); //inner loop counter
R3 = -1; //Symbol for bit '0' in bitstream
R0.L = W[I0++];
LSETUP(OUT_LOOP_START,OUT_LOOP_END) LC0 = P1 >> 1;
//Load N/2 where N is no. of chars in LC0
OUT_LOOP_START:
LSETUP(IN_LOOP_START,IN_LOOP_END) LC1 = P2;
IN_LOOP_START:
CC = BITTST(R0,0);
//Test the last bit
R2 = 1(Z);
IF !CC R2 = R3; //If bit is zero output -1 else 1
IN_LOOP_END:
R0 = R0 >> 1 || B[P0++] = R2;
OUT_LOOP_END:
R0.L = W[I0++];
RTS;
NOP; //to avoid one stall if LINK or UNLINK happens to be
//the next instruction after RTS in the memory.
__bpsk.end: