www.pudn.com > shiboqi.rar > fuzhi1_bb.v, change:2013-03-18,size:5128b


// megafunction wizard: %ROM: 1-PORT%VBB% 
// GENERATION: STANDARD 
// VERSION: WM1.0 
// MODULE: altsyncram  
 
// ============================================================ 
// File Name: fuzhi1.v 
// Megafunction Name(s): 
// 			altsyncram 
// 
// Simulation Library Files(s): 
// 			altera_mf 
// ============================================================ 
// ************************************************************ 
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! 
// 
// 9.1 Build 350 03/24/2010 SP 2 SJ Full Version 
// ************************************************************ 
 
//Copyright (C) 1991-2010 Altera Corporation 
//Your use of Altera Corporation's design tools, logic functions  
//and other software and tools, and its AMPP partner logic  
//functions, and any output files from any of the foregoing  
//(including device programming or simulation files), and any  
//associated documentation or information are expressly subject  
//to the terms and conditions of the Altera Program License  
//Subscription Agreement, Altera MegaCore Function License  
//Agreement, or other applicable license agreement, including,  
//without limitation, that your use is for the sole purpose of  
//programming logic devices manufactured by Altera and sold by  
//Altera or its authorized distributors.  Please refer to the  
//applicable agreement for further details. 
 
module fuzhi1 ( 
	address, 
	clock, 
	q); 
 
	input	[6:0]  address; 
	input	  clock; 
	output	[31:0]  q; 
`ifndef ALTERA_RESERVED_QIS 
// synopsys translate_off 
`endif 
	tri1	  clock; 
`ifndef ALTERA_RESERVED_QIS 
// synopsys translate_on 
`endif 
 
endmodule 
 
// ============================================================ 
// CNX file retrieval info 
// ============================================================ 
// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC "0" 
// Retrieval info: PRIVATE: AclrAddr NUMERIC "0" 
// Retrieval info: PRIVATE: AclrByte NUMERIC "0" 
// Retrieval info: PRIVATE: AclrOutput NUMERIC "0" 
// Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC "0" 
// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "8" 
// Retrieval info: PRIVATE: BlankMemory NUMERIC "0" 
// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0" 
// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0" 
// Retrieval info: PRIVATE: Clken NUMERIC "0" 
// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC "0" 
// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING "PORT_A" 
// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC "0" 
// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone II" 
// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "0" 
// Retrieval info: PRIVATE: JTAG_ID STRING "NONE" 
// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0" 
// Retrieval info: PRIVATE: MIFfilename STRING "fuzhi1.mif" 
// Retrieval info: PRIVATE: NUMWORDS_A NUMERIC "80" 
// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" 
// Retrieval info: PRIVATE: RegAddr NUMERIC "1" 
// Retrieval info: PRIVATE: RegOutput NUMERIC "1" 
// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" 
// Retrieval info: PRIVATE: SingleClock NUMERIC "1" 
// Retrieval info: PRIVATE: UseDQRAM NUMERIC "0" 
// Retrieval info: PRIVATE: WidthAddr NUMERIC "7" 
// Retrieval info: PRIVATE: WidthData NUMERIC "32" 
// Retrieval info: PRIVATE: rden NUMERIC "0" 
// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS" 
// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING "BYPASS" 
// Retrieval info: CONSTANT: INIT_FILE STRING "fuzhi1.mif" 
// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone II" 
// Retrieval info: CONSTANT: LPM_HINT STRING "ENABLE_RUNTIME_MOD=NO" 
// Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram" 
// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "80" 
// Retrieval info: CONSTANT: OPERATION_MODE STRING "ROM" 
// Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING "NONE" 
// Retrieval info: CONSTANT: OUTDATA_REG_A STRING "CLOCK0" 
// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "7" 
// Retrieval info: CONSTANT: WIDTH_A NUMERIC "32" 
// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "1" 
// Retrieval info: USED_PORT: address 0 0 7 0 INPUT NODEFVAL address[6..0] 
// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC clock 
// Retrieval info: USED_PORT: q 0 0 32 0 OUTPUT NODEFVAL q[31..0] 
// Retrieval info: CONNECT: @address_a 0 0 7 0 address 0 0 7 0 
// Retrieval info: CONNECT: q 0 0 32 0 @q_a 0 0 32 0 
// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0 
// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all 
// Retrieval info: GEN_FILE: TYPE_NORMAL fuzhi1.v TRUE 
// Retrieval info: GEN_FILE: TYPE_NORMAL fuzhi1.inc TRUE 
// Retrieval info: GEN_FILE: TYPE_NORMAL fuzhi1.cmp TRUE 
// Retrieval info: GEN_FILE: TYPE_NORMAL fuzhi1.bsf TRUE 
// Retrieval info: GEN_FILE: TYPE_NORMAL fuzhi1_inst.v TRUE 
// Retrieval info: GEN_FILE: TYPE_NORMAL fuzhi1_bb.v TRUE 
// Retrieval info: GEN_FILE: TYPE_NORMAL fuzhi1_waveforms.html TRUE 
// Retrieval info: GEN_FILE: TYPE_NORMAL fuzhi1_wave*.jpg FALSE 
// Retrieval info: LIB_FILE: altera_mf