www.pudn.com > BIOS-S3C2410.rar > usblib.c
/****************************************************************
NAME: usblib.c
DESC: S3C2410X USB library functions
HISTORY:
Mar.25.2002:purnnamu: ported for S3C2410X.
Mar.27.2002:purnnamu: DMA is enabled.
****************************************************************/
#include "option.h"
#include "2410addr.h"
#include "2410lib.h"
#include "DMAAdmin.h"
#include "def.h"
#include "2410usb.h"
#include "usblib.h"
#include "usbout.h"
#include "usbsetup.h"
#define USB_DOWN_DEV 0x200
#define USB_DOWN_ATTR ((USB_DOWN_DEV<<16)|SRC_LOC_APB|SRC_ADDR_FIXED|DST_LOC_AHB|DST_ADDR_INC|REQ_USB_EP3)
#if USBDMA_DEMAND
#define USB_DOWN_MODE (DEMAND_MODE|SYNC_APB|DONE_GEN_INT|TSZ_UNIT|SINGLE_SVC|HW_TRIG|RELOAD_OFF|DSZ_8b)
#else
#define USB_DOWN_MODE (HANDSHAKE_MODE|SYNC_APB|DONE_GEN_INT|TSZ_UNIT|SINGLE_SVC|HW_TRIG|RELOAD_OFF|DSZ_8b)
#endif
U32 UsbDevReq;
/*
void ConfigUsbd(void)
{
ReconfigUsbd();
// pISR_USBD =(unsigned)IsrUsbd;
// ClearPending(BIT_USBD);
// EnableIrq(BIT_USBD);
}
*/
void ReconfigUsbd(void)
{
// *** End point information ***
// EP0: control
// EP1: bulk in end point
// EP2: not used
// EP3: bulk out end point
// EP4: not used
rPWR_REG=PWR_REG_DEFAULT_VALUE; //disable suspend mode
rINDEX_REG=0;
rMAXP_REG=FIFO_SIZE_8; //EP0 max packit size = 8
rEP0_CSR=EP0_SERVICED_OUT_PKT_RDY|EP0_SERVICED_SETUP_END;
//EP0:clear OUT_PKT_RDY & SETUP_END
rINDEX_REG=1;
#if (EP1_PKT_SIZE==32)
rMAXP_REG=FIFO_SIZE_32; //EP1:max packit size = 32
#else
rMAXP_REG=FIFO_SIZE_64; //EP1:max packit size = 64
#endif
rIN_CSR1_REG=EPI_FIFO_FLUSH|EPI_CDT;
rIN_CSR2_REG=EPI_MODE_IN|EPI_IN_DMA_INT_MASK|EPI_BULK; //IN mode, IN_DMA_INT=masked
rOUT_CSR1_REG=EPO_CDT;
rOUT_CSR2_REG=EPO_BULK|EPO_OUT_DMA_INT_MASK;
rINDEX_REG=2;
rMAXP_REG=FIFO_SIZE_64; //EP2:max packit size = 64
rIN_CSR1_REG=EPI_FIFO_FLUSH|EPI_CDT|EPI_BULK; //EPI_BULK in IN_CSR1???
rIN_CSR2_REG=EPI_MODE_IN|EPI_IN_DMA_INT_MASK; //IN mode, IN_DMA_INT=masked, disable interrupt
rOUT_CSR1_REG=EPO_CDT;
rOUT_CSR2_REG=EPO_BULK|EPO_OUT_DMA_INT_MASK;
rINDEX_REG=3;
#if (EP3_PKT_SIZE==32)
rMAXP_REG=FIFO_SIZE_32; //EP3:max packit size = 32
#else
rMAXP_REG=FIFO_SIZE_64; //EP3:max packit size = 64
#endif
rIN_CSR1_REG=EPI_FIFO_FLUSH|EPI_CDT|EPI_BULK;
rIN_CSR2_REG=EPI_MODE_OUT|EPI_IN_DMA_INT_MASK; //OUT mode, IN_DMA_INT=masked
rOUT_CSR1_REG=EPO_CDT;
//clear OUT_PKT_RDY, data_toggle_bit.
//The data toggle bit should be cleared when initialization.
rOUT_CSR2_REG=EPO_BULK|EPO_OUT_DMA_INT_MASK;
rINDEX_REG=4;
rMAXP_REG=FIFO_SIZE_64; //EP4:max packit size = 64
rIN_CSR1_REG=EPI_FIFO_FLUSH|EPI_CDT|EPI_BULK;
rIN_CSR2_REG=EPI_MODE_OUT|EPI_IN_DMA_INT_MASK; //OUT mode, IN_DMA_INT=masked
rOUT_CSR1_REG=EPO_CDT;
//clear OUT_PKT_RDY, data_toggle_bit.
//The data toggle bit should be cleared when initialization.
rOUT_CSR2_REG=EPO_BULK|EPO_OUT_DMA_INT_MASK;
rEP_INT_REG=EP0_INT|EP1_INT|EP2_INT|EP3_INT|EP4_INT;
rUSB_INT_REG=RESET_INT|SUSPEND_INT|RESUME_INT;
//Clear all usbd pending bits
//EP0,1,3 & reset interrupt are enabled
rEP_INT_EN_REG=EP0_INT|EP1_INT|EP3_INT;
rUSB_INT_EN_REG=RESET_INT;
ep0State=EP0_STATE_INIT;
}
void RdPktEp0(U8 *buf,int num)
{
int i;
for(i=0;i