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; .\SmartC.SRC generated from: SmartC.c
; COMPILER INVOKED BY:
; C:\Keil\C51\BIN\C51.EXE SmartC.c BROWSE DEBUG OBJECTEXTEND SRC(.\SmartC.SRC)
$NOMOD51
NAME SMARA
P0 DATA 080H
P1 DATA 090H
P2 DATA 0A0H
P3 DATA 0B0H
T0 BIT 0B0H.4
AC BIT 0D0H.6
T1 BIT 0B0H.5
T2 BIT 090H.0
EA BIT 0A8H.7
IE DATA 0A8H
EXF2 BIT 0C8H.6
RD BIT 0B0H.7
ES BIT 0A8H.4
IP DATA 0B8H
RI BIT 098H.0
INT0 BIT 0B0H.2
CY BIT 0D0H.7
TI BIT 098H.1
INT1 BIT 0B0H.3
RCAP2H DATA 0CBH
PS BIT 0B8H.4
SP DATA 081H
T2EX BIT 090H.1
OV BIT 0D0H.2
RCAP2L DATA 0CAH
C_T2 BIT 0C8H.1
WR BIT 0B0H.6
RCLK BIT 0C8H.5
TCLK BIT 0C8H.4
SBUF DATA 099H
PCON DATA 087H
SCON DATA 098H
TMOD DATA 089H
TCON DATA 088H
IE0 BIT 088H.1
IE1 BIT 088H.3
B DATA 0F0H
CP_RL2 BIT 0C8H.0
ACC DATA 0E0H
ET0 BIT 0A8H.1
ET1 BIT 0A8H.3
TF0 BIT 088H.5
ET2 BIT 0A8H.5
TF1 BIT 088H.7
TF2 BIT 0C8H.7
RB8 BIT 098H.2
TH0 DATA 08CH
EX0 BIT 0A8H.0
IT0 BIT 088H.0
TH1 DATA 08DH
TB8 BIT 098H.3
EX1 BIT 0A8H.2
IT1 BIT 088H.2
TH2 DATA 0CDH
P BIT 0D0H.0
SM0 BIT 098H.7
TL0 DATA 08AH
SM1 BIT 098H.6
TL1 DATA 08BH
SM2 BIT 098H.5
TL2 DATA 0CCH
PT0 BIT 0B8H.1
PT1 BIT 0B8H.3
RS0 BIT 0D0H.3
PT2 BIT 0B8H.5
TR0 BIT 088H.4
RS1 BIT 0D0H.4
TR1 BIT 088H.6
TR2 BIT 0C8H.2
PX0 BIT 0B8H.0
PX1 BIT 0B8H.2
DPH DATA 083H
DPL DATA 082H
EXEN2 BIT 0C8H.3
REN BIT 098H.4
T2CON DATA 0C8H
RXD BIT 0B0H.0
TXD BIT 0B0H.1
F0 BIT 0D0H.5
OUT BIT 090H.3
LED_G BIT 090H.4
PSW DATA 0D0H
;TLL EQU 2DH ;45
;TLH EQU 42H ;66
;THL EQU 60H ;98
;THH EQU 70H ;129
;TDL EQU 80H ;136
;TDL1 EQU 30H ;42
TLL EQU 90
TLH EQU 132
THL EQU 196
THH EQU 255 ;129
TDL EQU 255 ;136
TDL1 EQU 84
?PR?EdgEm?SMARA SEGMENT CODE
?PR?_SmartCard?SMARA SEGMENT CODE
;?DT?_SmartCard?SMARA SEGMENT DATA OVERLAYABLE
PUBLIC _SmartCard
RSEG ?PR?_SmartCard?SMARA
_SmartCard:
USING 0
;READ RF CARD
;----------------------
;---- Variable 'v_achr?142' assigned to Register 'R2' ----
MOV R2,AR7
RD_D:
LCALL EDGEM ;确定数据流起始标志
JC RD_OK
RD_D0: CLR C
LJMP RD_D
RD_OK: MOV A,R2
RD_D1: MOV R0,A;读到变量存贮区中
;---- Variable 'i?143' assigned to Register 'R7' ----
RD_DL0: MOV R7,#0BH ;位计数－－R7*R6
RB_L: CLR A
MOV @R0,A
RD_DL1: MOV R6,#05H
;---------------------------------------
RD_DL2: JB OUT,RD_DL5
MOV A,#00H
RD_DL3: CJNE A,#TDL1,RD_DL4
LJMP RD_D0
RD_DL4: JB OUT,RD_DLK
INC A
SJMP RD_DL3
RD_DL5: MOV A,#00H
RDDL5: CJNE A,#TDL1,RD_DL6
LJMP RD_D0
RD_DL6: JNB OUT,RD_DLK
INC A
SJMP RDDL5
RD_DLK: MOV C,OUT
CPL C
MOV A,@R0
RLC A
MOV @R0,A
MOV R4,#TDL;延时TNEXT
DJNZ R4,$
;－－－－接收一位卡数据－－－－--------
DJNZ R6,RD_DL2
;--接收5位卡数据
INC R0
DJNZ R7,RB_L
;---接收5×11位卡数据 存放在11个字节中
SETB C ;设置读卡完成标志
RDRET:
NOP
RET
RSEG ?PR?EDGEM?SMARA
;----------------------------------
; 确定数据流起始标志
;----------------------------------
;---- Variable 'idptr?041' assigned to Register 'R6/R7' ----
EDGEM:
USING 0
MOV R4,#00H
EDGE0: MOV R5,#08H
NOP
DJNZ R4,EDGE1
EDGER: CLR C
RET
;-----------------------
;检测---1 TO 0 跳变,即接收数据[1],并用DPTR计时 220<=T<=280 检出1位数据1
EDGE1: JNB OUT,$
;MOV DPTR,#0000H
CLR A
MOV R6,A
MOV R7,A
EDGE2: ;INC DPTR
INC R7
CJNE R7,#00H,?C0032
INC R6
?C0032:
JB OUT,EDGE2 ;
MOV A,R6
JNZ EDGER
MOV A,R7
CLR C
SUBB A,#THL
JC EDGE0
MOV A,R7
CLR C
SUBB A,#THH
JNC EDGER
;检测---1 TO 0 跳变,即接收数据[1],并用DPTR计时 220<=T<=280 循环检测8位数据1
EDGE3: JNB OUT ,$
;MOV DPTR,#0000H
CLR A
MOV R6,A
MOV R7,A
EDGE4:
;INC DPTR
INC R7
CJNE R7,#00H,?C0033
INC R6
?C0033:
JB OUT,EDGE4
MOV A,R7
CLR C
SUBB A,#TLH ;判断过程，计算时间
JNC EDGE0
MOV A,R6
JNZ EDGER
MOV A,R7
CLR C
SUBB A,#TLL ;>188
JC EDGER
DJNZ R5,EDGE3
MOV R6,#TDL
DJNZ R6,$ ;delay 295 ; ;延时TNEXT
SETB C
RET
END