www.pudn.com > jtag_src.rar > ice.h


/* 
 * ice.h : the head file for ice.c 
 *  
 * This head file defines EmbeddedICE-RT registers 
 * 
 * Copyright (C) 2004, OPEN-JTAG, All rights reserved. 
 */ 
 
#ifndef XJTAG_ICE_H 
#define XJTAG_ICE_H 
 
/*  
 * The EmbeddedICE-RT includes following important registers to 
 * facilitate the bebug: 
 *	1). Debug control register 
 *	2). Debug status register 
 *	3).	Abort status register 
 *	4).	DCC control register 
 *	5). DCC data register 
 *	6). Wacthpoint address value and address mask registers 
 *	7). Wacthpoint data value and data mask registers 
 *	8). Wacthpoint control value and control mask registers 
 */  
 
//Mapping of EmbeddedICE-RT registers 
#define ARM7TDMI_ICE_DBGCTRL			0x00 	 
#define ARM7TDMI_ICE_DBGSTAT			0x01 	 
#define ARM7TDMI_ICE_ABTSTAT			0x02 	 
#define ARM7TDMI_ICE_DCCCTRL			0x04 
#define ARM7TDMI_ICE_DCCDATA			0x05 
#define ARM7TDMI_WP0_ADDRVAL			0x08 
#define ARM7TDMI_WP0_ADDRMSK			0x09 
#define ARM7TDMI_WP0_DATAVAL			0x0A 
#define ARM7TDMI_WP0_DATAMSK			0x0B 
#define ARM7TDMI_WP0_CTRLVAL			0x0C 
#define ARM7TDMI_WP0_CTRLMSK			0x0D 
#define ARM7TDMI_WP1_ADDRVAL			0x10 
#define ARM7TDMI_WP1_ADDRMSK			0x11 
#define ARM7TDMI_WP1_DATAVAL			0x12 
#define ARM7TDMI_WP1_DATAMSK			0x13 
#define ARM7TDMI_WP1_CTRLVAL			0x14 
#define ARM7TDMI_WP1_CTRLMSK			0x15 
 
// Bit width of EmbeddedICE-RT registers 
#define ARM7TDMI_REGLEN_ICE_INVALID		-1 
#define ARM7TDMI_REGLEN_ICE_DBGCTRL		6				 
#define ARM7TDMI_REGLEN_ICE_DBGSTAT		5	 
#define ARM7TDMI_REGLEN_ICE_ABTSTAT		1	 
#define ARM7TDMI_REGLEN_ICE_DCCCTRL		6	 
#define ARM7TDMI_REGLEN_ICE_DCCDATA		32	 
#define ARM7TDMI_REGLEN_WP0_ADDRVAL		32	 
#define ARM7TDMI_REGLEN_WP0_ADDRMSK		32	 
#define ARM7TDMI_REGLEN_WP0_DATAVAL		32	 
#define ARM7TDMI_REGLEN_WP0_DATAMSK		32	 
#define ARM7TDMI_REGLEN_WP0_CTRLVAL		9	 
#define ARM7TDMI_REGLEN_WP0_CTRLMSK		8	 
#define ARM7TDMI_REGLEN_WP1_ADDRVAL		32	 
#define ARM7TDMI_REGLEN_WP1_ADDRMSK		32	 
#define ARM7TDMI_REGLEN_WP1_DATAVAL		32	 
#define ARM7TDMI_REGLEN_WP1_DATAMSK		32	 
#define ARM7TDMI_REGLEN_WP1_CTRLVAL		9	 
#define ARM7TDMI_REGLEN_WP1_CTRLMSK		8	 
 
 
extern int arm7tdmi_ice_write(int ice_reg, u32 ice_val); 
extern int arm7tdmi_ice_read(int ice_reg, u32 *ice_val); 
 
#endif