www.pudn.com > TMS320F2812Sci.rar > DSP28_Sci.c

// 
//      TMDX ALPHA RELEASE 
//      Intended for product evaluation purposes 
// 
//########################################################################### 
// 
// FILE:	DSP28_Sci.c 
// 
// TITLE:	DSP28 SCI Initialization & Support Functions. 
// 
//########################################################################### 
// 
//  Ver | dd mmm yyyy | Who  | Description of changes 
// =====|=============|======|=============================================== 
//  0.55| 06 May 2002 | L.H. | EzDSP Alpha Release 
//  0.56| 20 May 2002 | L.H. | No change 
//  0.57| 27 May 2002 | L.H. | No change 
//########################################################################### 
 
#include "DSP28_Device.h" 
 
unsigned int * UART_MODE = (unsigned int *) 0x4010; 
 
//--------------------------------------------------------------------------- 
// InitSPI:  
//--------------------------------------------------------------------------- 
// This function initializes the SPI(s) to a known state. 
// 
void InitSci(void) 
{ 
	// Initialize SCI-A: 
//	*UART_MODE = 0x44; 
	 
	EALLOW; 
	GpioMuxRegs.GPFMUX.all = 0x0030; 
	GpioMuxRegs.GPGMUX.all = 0x0030; 
	GpioMuxRegs.GPAMUX.all = 0x0000;//|GpioMuxRegs.GPAMUX.all; 
	GpioMuxRegs.GPADIR.all=0xC000;//|GpioMuxRegs.GPADIR.all;    	// upper byte as output/low byte as input 
    GpioMuxRegs.GPAQUAL.all=0x0000; 
    GpioDataRegs.GPADAT.all=0x4000;   
	GpioMuxRegs.GPBMUX.all = 0x0000;//&GpioMuxRegs.GPBMUX.all; 
	GpioMuxRegs.GPBDIR.all=0xC000;//|GpioMuxRegs.GPBDIR.all;    	// upper byte as output/low byte as input 
    GpioMuxRegs.GPBQUAL.all=0x0000; 
    GpioDataRegs.GPBDAT.all=0x4000;      
	EDIS; 
	/* loopback   8 bit data */ 
	SciaRegs.SCICCR.all = 0x07; 
	 
	SciaRegs.SCICTL1.all = 0x03; 
	SciaRegs.SCICTL2.all = 0x03; 
	 
	SciaRegs.SCIHBAUD = 0x00; 
	SciaRegs.SCILBAUD = 0xF4; 
	 
	SciaRegs.SCICTL1.all = 0x23; 
	 
	PieCtrl.PIEIER9.bit.INTx1 = 1; 
	PieCtrl.PIEIER9.bit.INTx2 = 1; 
	//tbd... 
 	 
 
	// Initialize SCI-B: 
	ScibRegs.SCICCR.all = 0x07; 
	 
	ScibRegs.SCICTL1.all = 0x03; 
	ScibRegs.SCICTL2.all = 0x03; 
	 
	ScibRegs.SCIHBAUD = 0x00; 
	ScibRegs.SCILBAUD = 0xF4; 
	 
	ScibRegs.SCICTL1.all = 0x23; 
	 
	PieCtrl.PIEIER9.bit.INTx3 = 1; 
	PieCtrl.PIEIER9.bit.INTx4 = 1; 
 
	//tbd... 
} 
 
/******************************************************************************** 
	name:	int SciaTx_Ready(void) 
	input:	none 
	output:	i	1:	ready 
			0:	busy 
*********************************************************************************/ 
 
int SciaTx_Ready(void) 
{ 
	unsigned int i; 
	if(SciaRegs.SCICTL2.bit.TXRDY == 1) 
	{ 
		i = 1; 
	} 
	else 
	{ 
		i = 0; 
	} 
	return(i); 
} 
 
/******************************************************************************** 
	name:	int SciaRx_Ready(void) 
	input:	none 
	output:	i	1:	new data 
			0:	none 
*********************************************************************************/ 
 
int SciaRx_Ready(void) 
{ 
	unsigned int i; 
	if(SciaRegs.SCIRXST.bit.RXRDY == 1) 
	{ 
		i = 1; 
	} 
	else 
	{ 
		i = 0; 
	} 
	return(i); 
} 
/******************************************************************************** 
	name:	int SciaTx_Ready(void) 
	input:	none 
	output:	i	1:	ready 
			0:	busy 
*********************************************************************************/ 
 
int ScibTx_Ready(void) 
{ 
	unsigned int i; 
	if(ScibRegs.SCICTL2.bit.TXRDY == 1) 
	{ 
		i = 1; 
	} 
	else 
	{ 
		i = 0; 
	} 
	return(i); 
} 
 
/******************************************************************************** 
	name:	int SciaRx_Ready(void) 
	input:	none 
	output:	i	1:	new data 
			0:	none 
*********************************************************************************/ 
 
int ScibRx_Ready(void) 
{ 
	unsigned int i; 
	if(ScibRegs.SCIRXST.bit.RXRDY == 1) 
	{ 
		i = 1; 
	} 
	else 
	{ 
		i = 0; 
	} 
	return(i); 
} 
 
 
int SciRecv(int port, int *rc) 
{ 
	if(port == 1) 
	{ 
		if(SciaRecvTail != SciaRecvHeader) 
		{ 
			*rc = SciaRecvBuff[SciaRecvTail]; 
			SciaRecvTail ++; 
			if(SciaRecvTail >= SciBufferSize) 
				SciaRecvTail = 0; 
			return 1; 
		} 
		return 0; 
		 
	} 
	if(port == 2) 
	{ 
		if(ScibRecvTail != ScibRecvHeader) 
		{ 
			*rc = ScibRecvBuff[ScibRecvTail]; 
			ScibRecvTail ++; 
			if(ScibRecvTail >= SciBufferSize) 
				ScibRecvTail = 0; 
			return 1; 
		} 
		return 0; 
	} 
	return -1; 
} 
 
void SciSend(int port, int sc) 
{ 
	if(port == 1) 
	{ 
		PieCtrl.PIEIER9.bit.INTx2 = 1; 
		if(SciaSendHeader == SciaSendTail) 
		{ 
			if(SciaTx_Ready() == 1) 
				SciaRegs.SCITXBUF = sc; 
			else 
			{ 
				SciaSendBuff[SciaSendHeader++] = sc; 
				if(SciaSendHeader >= SciBufferSize) 
					SciaSendHeader = 0; 
			}	 
		} 
		else 
		{ 
			while((SciaSendHeader == (SciaSendTail-1))||	 
				  ((SciaSendHeader == (SciBufferSize-1))&&(SciaSendTail == 0)));	//wait for slot 
			SciaSendBuff[SciaSendHeader++] = sc; 
			if(SciaSendHeader >= SciBufferSize) 
				SciaSendHeader = 0; 
		} 
	} 
	if(port == 2) 
	{ 
		PieCtrl.PIEIER9.bit.INTx4 = 1; 
		if(ScibSendHeader == ScibSendTail) 
		{ 
			if(ScibTx_Ready() == 1) 
				ScibRegs.SCITXBUF = sc; 
			else 
			{ 
				ScibSendBuff[ScibSendHeader++] = sc; 
				if(ScibSendHeader >= SciBufferSize) 
					ScibSendHeader = 0; 
			}	 
		} 
		else 
		{ 
			while((ScibSendHeader == (ScibSendTail-1))||	 
				  ((ScibSendHeader == (SciBufferSize-1))&&(ScibSendTail == 0)));	//wait for slot 
			ScibSendBuff[ScibSendHeader++] = sc; 
			if(ScibSendHeader >= SciBufferSize) 
				ScibSendHeader = 0; 
		} 
	} 
	return ; 
} 
 
	 
//=========================================================================== 
// No more. 
//===========================================================================