www.pudn.com > UartLoop.rar > main.xst, change:2013-10-02,size:1074b


set -tmpdir "xst/projnav.tmp" 
set -xsthdpdir "xst" 
run 
-ifn main.prj 
-ifmt mixed 
-ofn main 
-ofmt NGC 
-p xc6slx9-3-tqg144 
-top main 
-opt_mode Speed 
-opt_level 1 
-power NO 
-iuc NO 
-keep_hierarchy No 
-netlist_hierarchy As_Optimized 
-rtlview Yes 
-glob_opt AllClockNets 
-read_cores YES 
-write_timing_constraints NO 
-cross_clock_analysis NO 
-hierarchy_separator / 
-bus_delimiter <> 
-case Maintain 
-slice_utilization_ratio 100 
-bram_utilization_ratio 100 
-dsp_utilization_ratio 100 
-lc Auto 
-reduce_control_sets Auto 
-fsm_extract YES -fsm_encoding Auto 
-safe_implementation No 
-fsm_style LUT 
-ram_extract Yes 
-ram_style Auto 
-rom_extract Yes 
-shreg_extract YES 
-rom_style Auto 
-auto_bram_packing NO 
-resource_sharing YES 
-async_to_sync NO 
-shreg_min_size 2 
-use_dsp48 Auto 
-iobuf YES 
-max_fanout 100000 
-bufg 16 
-register_duplication YES 
-register_balancing No 
-optimize_primitives NO 
-use_clock_enable Auto 
-use_sync_set Auto 
-use_sync_reset Auto 
-iob Auto 
-equivalent_register_removal YES 
-slice_utilization_ratio_maxmargin 5