www.pudn.com > UartLoop.rar > main.twx, change:2013-10-02,size:48217b


<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE twReport [
<!ELEMENT twReport (twHead?, (twWarn | twDebug | twInfo)*, twBody, twSum?,
					twDebug*, twFoot?, twClientInfo?)>
<!ATTLIST twReport version CDATA "10,4">
<!ELEMENT twHead (twExecVer?, twCopyright, twCmdLine?, twDesign?, twPCF?, twDevInfo, twRptInfo, twEnvVar*)>
<!ELEMENT twExecVer (#PCDATA)>
<!ELEMENT twCopyright (#PCDATA)>
<!ELEMENT twCmdLine (#PCDATA)>
<!ELEMENT twDesign (#PCDATA)>
<!ELEMENT twPCF (#PCDATA)>
<!ELEMENT twDevInfo (twDevName, twSpeedGrade, twSpeedVer?)>
<!ELEMENT twDevName (#PCDATA)>
<!ATTLIST twDevInfo arch CDATA #IMPLIED pkg CDATA #IMPLIED>
<!ELEMENT twSpeedGrade (#PCDATA)>
<!ELEMENT twSpeedVer (#PCDATA)>
<!ELEMENT twRptInfo (twItemLimit?, (twUnconst, twUnconstLimit?)?)>
<!ATTLIST twRptInfo twRptLvl (twErr | twVerbose | twTerseErr | twSum | twTimeGrp) #REQUIRED>
<!ATTLIST twRptInfo twAdvRpt  (TRUE | FALSE) "FALSE">
<!ATTLIST twRptInfo twTimeUnits (twPsec | twNsec | twUsec | twMsec | twSec) "twNsec">
<!ATTLIST twRptInfo twFreqUnits (twGHz | twMHz | twHz) "twMHz">
<!ATTLIST twRptInfo twReportMinPaths CDATA #IMPLIED>
<!ELEMENT twItemLimit (#PCDATA)>
<!ELEMENT twUnconst EMPTY>
<!ELEMENT twUnconstLimit (#PCDATA)>
<!ELEMENT twEnvVar EMPTY>
<!ATTLIST twEnvVar name CDATA #REQUIRED>
<!ATTLIST twEnvVar description CDATA #REQUIRED>
<!ELEMENT twWarn (#PCDATA)>
<!ELEMENT twInfo (#PCDATA)>
<!ELEMENT twDebug (#PCDATA)>
<!ELEMENT twBody (twDerating?, (twSumRpt | twVerboseRpt | twErrRpt | twTerseErrRpt | twTimeGrpRpt), twNonDedClks?)>
<!ATTLIST twBody twFastPaths CDATA #IMPLIED>
<!ELEMENT twDerating (twProc?, twTemp?, twVolt?)>
<!ELEMENT twProc (#PCDATA)>
<!ELEMENT twTemp (#PCDATA)>
<!ELEMENT twVolt (#PCDATA)>
<!ELEMENT twSumRpt (twConstRollupTable*, twConstList?, twConstSummaryTable?, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?)>
<!ELEMENT twErrRpt (twCycles?, (twConst | twTIG |  twConstRollupTable)*, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?, twTimeGrp*)>
<!ELEMENT twTerseErrRpt (twConstList, twUnmetConstCnt?, twDataSheet?)>
<!ELEMENT twVerboseRpt (twCycles?, (twConst | twTIG | twConstRollupTable)*, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?, twTimeGrp*)> 
<!ELEMENT twCycles (twSigConn+)>
<!ATTLIST twCycles twNum CDATA #REQUIRED>
<!ELEMENT twSigConn (twSig, twDriver, twLoad)>
<!ELEMENT twSig (#PCDATA)>
<!ELEMENT twDriver (#PCDATA)>
<!ELEMENT twLoad (#PCDATA)> 
<!ELEMENT twConst (twConstHead, ((twPathRpt?,twRacePathRpt?, twPathRptBanner?)* |  (twPathRpt*, twRacePathRpt?) |  twNetRpt* | twClkSkewLimit*))>
<!ATTLIST twConst twConstType (NET | 
							   NETDELAY | 
							   NETSKEW | 
							   PATH |
							   DEFPERIOD |
							   UNCONSTPATH |
							   DEFPATH | 
							   PATH2SETUP |
							   UNCONSTPATH2SETUP | 
							   PATHCLASS | 
							   PATHDELAY | 
							   PERIOD |
							   FREQUENCY |
							   PATHBLOCK |
							   OFFSET |
							   OFFSETIN |
							   OFFSETINCLOCK | 
							   UNCONSTOFFSETINCLOCK |
							   OFFSETINDELAY |
							   OFFSETINMOD |
							   OFFSETOUT |
							   OFFSETOUTCLOCK |
							   UNCONSTOFFSETOUTCLOCK | 
							   OFFSETOUTDELAY |
							   OFFSETOUTMOD| CLOCK_SKEW_LIMITS) #IMPLIED> 
<!ELEMENT twConstHead (twConstName, twItemCnt, twErrCntSetup, twErrCntEndPt?, twErrCntHold,
					   twEndPtCnt?,
					   twPathErrCnt?, (twMinPer| twMaxDel| twMaxFreq| twMaxNetDel| twMaxNetSkew| twMinOff| twMaxOff)*)>
<!ELEMENT twConstName (#PCDATA)>
<!ATTLIST twConstName UCFConstName CDATA #IMPLIED>
<!ATTLIST twConstHead uID CDATA #IMPLIED>
<!ELEMENT twItemCnt (#PCDATA)>
<!ELEMENT twErrCnt (#PCDATA)>
<!ELEMENT twErrCntEndPt (#PCDATA)>
<!ELEMENT twErrCntSetup (#PCDATA)>
<!ELEMENT twErrCntHold (#PCDATA)>
<!ATTLIST twErrCntHold twRaceChecked (TRUE | FALSE) "FALSE">
<!ELEMENT twEndPtCnt (#PCDATA)>
<!ELEMENT twPathErrCnt (#PCDATA)>
<!ELEMENT twMinPer (#PCDATA) >
<!ELEMENT twFootnote EMPTY>
<!ATTLIST twFootnote number CDATA #REQUIRED>
<!ELEMENT twMaxDel (#PCDATA)>
<!ELEMENT twMaxFreq (#PCDATA)>
<!ELEMENT twMinOff (#PCDATA)>
<!ELEMENT twMaxOff (#PCDATA)>
<!ELEMENT twTIG (twTIGHead, (twPathRpt*,twRacePathRpt?))>
<!ELEMENT twTIGHead (twTIGName, twInstantiated, twBlocked)>
<!ELEMENT twTIGName (#PCDATA)>
<!ELEMENT twInstantiated (#PCDATA)>
<!ELEMENT twBlocked (#PCDATA)>
<!ELEMENT twRacePathRpt (twRacePath+)>
<!ELEMENT twPathRpt (twUnconstPath | twConstPath | twUnconstOffIn | twConstOffIn | twUnconstOffOut | twConstOffOut | twModOffOut)>
<!ELEMENT twUnconstPath (twTotDel, twSrc, twDest,  (twDel, twSUTime)?, twTotPathDel?, twClkSkew?, tw2Phase?, twClkUncert?, twDetPath?)>
<!ATTLIST twUnconstPath twDataPathType CDATA #IMPLIED
						twSimpleMinPath CDATA #IMPLIED>
<!ELEMENT twTotDel (#PCDATA)>
<!ELEMENT twSrc (#PCDATA)>
<!ATTLIST twSrc BELType CDATA #IMPLIED>
<!ELEMENT twDest (#PCDATA)>
<!ATTLIST twDest BELType CDATA #IMPLIED>
<!ELEMENT twDel (#PCDATA)>
<!ELEMENT twSUTime (#PCDATA)>
<!ELEMENT twTotPathDel (#PCDATA)>
<!ELEMENT twClkSkew (#PCDATA)>
<!ATTLIST twClkSkew dest CDATA #IMPLIED src CDATA #IMPLIED>
<!ELEMENT twConstPath (twSlack, twSrc, twDest, twTotPathDel?, twClkSkew?, twDelConst, tw2Phase?, twClkUncert?, twDetPath?)>
<!ATTLIST twConstPath twDataPathType CDATA "twDataPathMaxDelay">
<!ATTLIST twConstPath constType (period | fromto | unknown) "unknown">
<!ELEMENT twSlack (#PCDATA)>
<!ELEMENT twDelConst (#PCDATA)>
<!ELEMENT tw2Phase EMPTY>
<!ELEMENT twClkUncert (#PCDATA)>
<!ATTLIST twClkUncert fSysJit CDATA #IMPLIED  fInputJit CDATA #IMPLIED
					  fDCMJit CDATA #IMPLIED
					  fPhaseErr CDATA #IMPLIED
					  sEqu CDATA #IMPLIED>
<!ELEMENT twRacePath (twSlack, twSrc, twDest, twClkSkew, twDelConst?, twClkUncert?, twDetPath)>
<!ELEMENT twPathRptBanner (#PCDATA)>
<!ATTLIST twPathRptBanner sType CDATA #IMPLIED iPaths CDATA #IMPLIED iCriticalPaths CDATA #IMPLIED>
<!ELEMENT twUnconstOffIn (twOff, twSrc, twDest, twGuaranteed?, twClkUncert?, (twDataPath, twClkPath)?)>
<!ATTLIST twUnconstOffIn twDataPathType CDATA #IMPLIED>
<!ELEMENT twOff (#PCDATA)>
<!ELEMENT twGuaranteed EMPTY>
<!ELEMENT twConstOffIn (twSlack, twSrc, twDest, ((twClkDel, twClkSrc, twClkDest) | twGuarInSetup), twOff, twOffSrc, twOffDest, twClkUncert?, (twDataPath, twClkPath)?)>
<!ATTLIST twConstOffIn twDataPathType CDATA "twDataPathMaxDelay">
<!ATTLIST twConstOffIn twDurationNotSpecified CDATA #IMPLIED>
<!ELEMENT twClkDel (#PCDATA)>
<!ELEMENT twClkSrc (#PCDATA)>
<!ELEMENT twClkDest (#PCDATA)>
<!ELEMENT twGuarInSetup (#PCDATA)>
<!ELEMENT twOffSrc (#PCDATA)>
<!ELEMENT twOffDest (#PCDATA)>
<!ELEMENT twUnconstOffOut (twOff, twSrc, twDest, twClkUncert?, (twClkPath, twDataPath)?)>
<!ATTLIST twUnconstOffOut twDataPathType CDATA #IMPLIED>
<!ELEMENT twConstOffOut (twSlack, twSrc, twDest, twClkDel, twClkSrc, twClkDest, twDataDel, twDataSrc, twDataDest, twOff, twOffSrc, twOffDest, twClkUncert?, (twClkPath, twDataPath)?)>
<!ATTLIST twConstOffOut twDataPathType CDATA "twDataPathMaxDelay">
<!ELEMENT twDataDel (#PCDATA)>
<!ELEMENT twDataSrc (#PCDATA)>
<!ELEMENT twDataDest (#PCDATA)>
<!ELEMENT twModOffOut (twSlack, twDest, twDataDel, twDataSrc, twDataDest, twClkUncert?, twDataPath?)>
<!ELEMENT twDetPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twDetPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twDataPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twDataPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twClkPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twClkPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twLogLvls (#PCDATA)>
<!ELEMENT twSrcSite (#PCDATA)>
<!ELEMENT twSrcClk (#PCDATA)>
<!ATTLIST twSrcClk twEdge (twRising | twFalling) "twRising">
<!ATTLIST twSrcClk twArriveTime CDATA #IMPLIED>
<!ATTLIST twSrcClk twClkRes CDATA #IMPLIED>
<!ELEMENT twPathDel (twSite, twDelType, twFanCnt?, twDelInfo?, twComp, twNet?, twBEL*)>
<!ATTLIST twPathDel twHoldTime (TRUE | FALSE) "FALSE">
<!ELEMENT twDelInfo (#PCDATA)>
<!ATTLIST twDelInfo twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ATTLIST twDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
<!ELEMENT twSite (#PCDATA)>
<!ELEMENT twDelType (#PCDATA)>
<!ELEMENT twFanCnt (#PCDATA)>
<!ELEMENT twComp (#PCDATA)>
<!ELEMENT twNet (#PCDATA)>
<!ELEMENT twBEL (#PCDATA)>
<!ELEMENT twLogDel (#PCDATA)>
<!ELEMENT twRouteDel (#PCDATA)>
<!ELEMENT twDestClk (#PCDATA)>
<!ATTLIST twDestClk twEdge (twRising | twFalling) "twRising">
<!ATTLIST twDestClk twArriveTime CDATA #IMPLIED>
<!ATTLIST twDestClk twClkRes CDATA #IMPLIED>
<!ELEMENT twPctLog (#PCDATA)>
<!ELEMENT twPctRoute (#PCDATA)>
<!ELEMENT twNetRpt (twDelNet | twSlackNet | twSkewNet)>
<!ELEMENT twDelNet (twDel, twNet, twDetNet?)>
<!ELEMENT twSlackNet (twSlack, twNet, twDel, twNotMet?, twTimeConst, twAbsSlack, twDetNet?)>
<!ELEMENT twTimeConst (#PCDATA)>
<!ELEMENT twAbsSlack (#PCDATA)>
<!ELEMENT twSkewNet (twSlack, twNet, twSkew, twNotMet?, twTimeConst, twAbsSlack, twDetSkewNet?)>
<!ELEMENT twSkew (#PCDATA)>
<!ELEMENT twDetNet (twNetDel*)>
<!ELEMENT twNetDel (twSrc, twDest, twNetDelInfo)>
<!ELEMENT twNetDelInfo (#PCDATA)>
<!ATTLIST twNetDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
<!ELEMENT twDetSkewNet (twNetSkew*)>
<!ELEMENT twNetSkew (twSrc, twDest, twNetDelInfo, twSkew)>
<!ELEMENT twClkSkewLimit  EMPTY>
<!ATTLIST twClkSkewLimit slack CDATA #IMPLIED skew CDATA #IMPLIED arrv1name CDATA #IMPLIED                      arrv1 CDATA #IMPLIED
		         arrv2name CDATA #IMPLIED arrv2 CDATA #IMPLIED uncert CDATA #IMPLIED>
<!ELEMENT twConstRollupTable (twConstRollup*)>
<!ATTLIST twConstRollupTable uID CDATA #IMPLIED>
<!ELEMENT twConstRollup  EMPTY>
<!ATTLIST twConstRollup name CDATA #IMPLIED fullName CDATA #IMPLIED type CDATA #IMPLIED                      requirement CDATA #IMPLIED prefType CDATA #IMPLIED actual CDATA #IMPLIED>
<!ATTLIST twConstRollup  actualRollup CDATA #IMPLIED                      errors CDATA #IMPLIED errorRollup CDATA #IMPLIED items CDATA #IMPLIED                      itemsRollup CDATA #IMPLIED>
<!ELEMENT twConstList (twConstListItem)*>
<!ELEMENT twConstListItem (twConstName, twNotMet?, twReqVal?, twActVal?, twLogLvls?)> 
<!ATTLIST twConstListItem twUnits (twTime | twFreq) "twTime">
<!ELEMENT twNotMet EMPTY>
<!ELEMENT twReqVal (#PCDATA)>
<!ELEMENT twActVal (#PCDATA)>
<!ELEMENT twConstSummaryTable (twConstStats|twConstSummary)*>
<!ATTLIST twConstSummaryTable twEmptyConstraints CDATA #IMPLIED>
<!ELEMENT twConstStats (twConstName)>
<!ATTLIST twConstStats twUnits (twTime | twFreq) "twTime">
<!ATTLIST twConstStats twRequired CDATA #IMPLIED>
<!ATTLIST twConstStats twActual CDATA #IMPLIED>
<!ATTLIST twConstStats twSlack CDATA #IMPLIED>
<!ATTLIST twConstStats twLogLvls CDATA #IMPLIED>
<!ATTLIST twConstStats twErrors CDATA #IMPLIED>
<!ATTLIST twConstStats twPCFIndex CDATA #IMPLIED>
<!ATTLIST twConstStats twAbsSlackIndex CDATA #IMPLIED>
<!ATTLIST twConstStats twTCType CDATA #IMPLIED>
<!ELEMENT twConstSummary (twConstName, twConstData?, twConstData*)>
<!ATTLIST twConstSummary PCFIndex CDATA #IMPLIED  slackIndex CDATA #IMPLIED>
<!ELEMENT twConstData EMPTY>
<!ATTLIST twConstData type CDATA #IMPLIED  units (MHz | ns) "ns" slack CDATA #IMPLIED
					  best CDATA #IMPLIED requested CDATA #IMPLIED
					  errors CDATA #IMPLIED
					  score CDATA #IMPLIED>
<!ELEMENT twTimeGrpRpt (twTimeGrp)*>
<!ELEMENT twTimeGrp (twTimeGrpName, twCompList?, twBELList?, twMacList?, twBlockList?, twSigList?, twPinList?)>
<!ELEMENT twTimeGrpName (#PCDATA)>
<!ELEMENT twCompList (twCompName+)>
<!ELEMENT twCompName (#PCDATA)>
<!ELEMENT twSigList (twSigName+)>
<!ELEMENT twSigName (#PCDATA)>
<!ELEMENT twBELList (twBELName+)>
<!ELEMENT twBELName (#PCDATA)>
<!ELEMENT twBlockList (twBlockName+)>
<!ELEMENT twBlockName (#PCDATA)>
<!ELEMENT twMacList (twMacName+)>
<!ELEMENT twMacName (#PCDATA)>
<!ELEMENT twPinList (twPinName+)>
<!ELEMENT twPinName (#PCDATA)>
<!ELEMENT twUnmetConstCnt (#PCDATA)>
<!ELEMENT twDataSheet (twSUH2ClkList*, (twClk2PadList|twClk2OutList)*, twClk2SUList*, twPad2PadList?, twOffsetTables?)>
<!ATTLIST twDataSheet twNameLen CDATA #REQUIRED>
<!ELEMENT twSUH2ClkList (twDest, twSUH2Clk+)>
<!ATTLIST twSUH2ClkList twDestWidth CDATA #IMPLIED>
<!ATTLIST twSUH2ClkList twPhaseWidth CDATA #IMPLIED>
<!ELEMENT twSUH2Clk (twSrc, twSUHTime, twSUHTime?)> 
<!ELEMENT twSUHTime (twSU2ClkTime?,twH2ClkTime?)>
<!ATTLIST twSUHTime twInternalClk CDATA #IMPLIED>
<!ATTLIST twSUHTime twClkPhase CDATA #IMPLIED>
<!ELEMENT twSU2ClkTime (#PCDATA)>
<!ATTLIST twSU2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twH2ClkTime (#PCDATA)>
<!ATTLIST twH2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twClk2PadList (twSrc, twClk2Pad+)>
<!ELEMENT twClk2Pad (twDest, twTime)>
<!ELEMENT twTime (#PCDATA)>
<!ATTLIST twTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twClk2OutList (twSrc, twClk2Out+)>
<!ATTLIST twClk2OutList twDestWidth CDATA #REQUIRED>
<!ATTLIST twClk2OutList twPhaseWidth CDATA #REQUIRED>
<!ELEMENT twClk2Out EMPTY>
<!ATTLIST twClk2Out twOutPad CDATA #REQUIRED>
<!ATTLIST twClk2Out twMinTime CDATA #REQUIRED>
<!ATTLIST twClk2Out twMinEdge CDATA #REQUIRED>
<!ATTLIST twClk2Out twMaxTime CDATA #REQUIRED>
<!ATTLIST twClk2Out twMaxEdge CDATA #REQUIRED>
<!ATTLIST twClk2Out twInternalClk CDATA #REQUIRED>
<!ATTLIST twClk2Out twClkPhase CDATA #REQUIRED>
<!ELEMENT twClk2SUList (twDest, twClk2SU+)>
<!ATTLIST twClk2SUList twDestWidth CDATA #IMPLIED>
<!ELEMENT twClk2SU (twSrc, twRiseRise?, twFallRise?, twRiseFall?, twFallFall?)>
<!ELEMENT twRiseRise (#PCDATA)>
<!ELEMENT twFallRise (#PCDATA)>
<!ELEMENT twRiseFall (#PCDATA)>
<!ELEMENT twFallFall (#PCDATA)>
<!ELEMENT twPad2PadList (twPad2Pad+)>
<!ATTLIST twPad2PadList twSrcWidth CDATA #IMPLIED>
<!ATTLIST twPad2PadList twDestWidth CDATA #IMPLIED>
<!ELEMENT twPad2Pad (twSrc, twDest, twDel)>
<!ELEMENT twOffsetTables (twOffsetInTable*,twOffsetOutTable*)>
<!ELEMENT twOffsetInTable (twConstName, twOffInTblRow*)>
<!ATTLIST twOffsetInTable twDestWidth CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstWindow CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstSetup CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstHold CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstSetupSlack CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstHoldSlack CDATA #IMPLIED>
<!ELEMENT twOffsetOutTable (twConstName, twOffOutTblRow*)>
<!ATTLIST twOffsetOutTable twDestWidth CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twMinSlack CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twMaxSlack CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twRelSkew CDATA #IMPLIED>
<!ELEMENT twOffInTblRow (twSrc, twSUHSlackTime*)>       
<!ELEMENT twSUHSlackTime (twSU2ClkTime?,twH2ClkTime?)>
<!ATTLIST twSUHSlackTime twSetupSlack CDATA #IMPLIED  twHoldSlack CDATA #IMPLIED>
<!ELEMENT twOffOutTblRow EMPTY>
<!ATTLIST twOffOutTblRow twOutPad CDATA #IMPLIED>
<!ATTLIST twOffOutTblRow twSlack CDATA #IMPLIED>
<!ATTLIST twOffOutTblRow twRelSkew CDATA #IMPLIED>
<!ELEMENT twNonDedClks ((twWarn | twInfo), twNonDedClk+)>
<!ELEMENT twNonDedClk (#PCDATA)>
<!ELEMENT twSum ( twErrCnt, twScore, twConstCov, twStats)>
<!ELEMENT twScore (#PCDATA)>
<!ELEMENT twConstCov (twPathCnt, twNetCnt, twConnCnt, twPct?)>
<!ELEMENT twPathCnt (#PCDATA)>
<!ELEMENT twNetCnt (#PCDATA)>
<!ELEMENT twConnCnt (#PCDATA)>
<!ELEMENT twPct (#PCDATA)>
<!ELEMENT twStats ( twMinPer?, twFootnote?, twMaxFreq?, twMaxCombDel?, twMaxFromToDel?, twMaxNetDel?, twMaxNetSkew?, twMaxInAfterClk?, twMinInBeforeClk?, twMaxOutBeforeClk?, twMinOutAfterClk?, (twInfo | twWarn)*)>
<!ELEMENT twMaxCombDel (#PCDATA)>
<!ELEMENT twMaxFromToDel (#PCDATA)>
<!ELEMENT twMaxNetDel (#PCDATA)>
<!ELEMENT twMaxNetSkew (#PCDATA)>
<!ELEMENT twMaxInAfterClk (#PCDATA)>
<!ELEMENT twMinInBeforeClk (#PCDATA)>
<!ELEMENT twMaxOutBeforeClk (#PCDATA)>
<!ELEMENT twMinOutAfterClk (#PCDATA)>
<!ELEMENT twFoot (twFootnoteExplanation*, twTimestamp)>
<!ELEMENT twTimestamp (#PCDATA)>
<!ELEMENT twFootnoteExplanation EMPTY>
<!ATTLIST twFootnoteExplanation number CDATA #REQUIRED>
<!ATTLIST twFootnoteExplanation text CDATA #REQUIRED>
<!ELEMENT twClientInfo (twClientName, twAttrList?)>
<!ELEMENT twClientName (#PCDATA)>
<!ELEMENT twAttrList (twAttrListItem)*>
<!ELEMENT twAttrListItem (twName, twValue*)>
<!ELEMENT twName (#PCDATA)>
<!ELEMENT twValue (#PCDATA)>
]>
<twReport><twHead anchorID="1"><twExecVer>Release 12.4 Trace  (nt)</twExecVer><twCopyright>Copyright (c) 1995-2010 Xilinx, Inc.  All rights reserved.</twCopyright><twCmdLine>d:\Xilinx\12.4\ISE_DS\ISE\bin\nt\unwrapped\trce.exe -intstyle ise -v 3 -s 3 -n
3 -fastpaths -xml main.twx main.ncd -o main.twr main.pcf

</twCmdLine><twDesign>main.ncd</twDesign><twDesignPath>main.ncd</twDesignPath><twPCF>main.pcf</twPCF><twPcfPath>main.pcf</twPcfPath><twDevInfo arch="spartan6" pkg="tqg144"><twDevName>xc6slx9</twDevName><twDevRange>C</twDevRange><twSpeedGrade>-3</twSpeedGrade><twSpeedVer>PRELIMINARY 1.15 2010-12-02</twSpeedVer><twQuadDly>1</twQuadDly></twDevInfo><twRptInfo twRptLvl="twVerbose" twReportMinPaths="true"  dlyHyperLnks="t" ><twEndptLimit>3</twEndptLimit></twRptInfo><twEnvVar name="NONE" description="No environment variables were set" /></twHead><twInfo anchorID="2">INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.</twInfo><twInfo anchorID="3">INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model.  For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet.</twInfo><twBody><twVerboseRpt><twConst anchorID="4" twConstType="PERIOD" ><twConstHead uID="1"><twConstName UCFConstName="" ScopeName="">TS_clk = PERIOD TIMEGRP "clk" 20 ns HIGH 50%;</twConstName><twItemCnt>739</twItemCnt><twErrCntSetup>0</twErrCntSetup><twErrCntEndPt>0</twErrCntEndPt><twErrCntHold twRaceChecked="TRUE">0</twErrCntHold><twErrCntPinLimit>0</twErrCntPinLimit><twEndPtCnt>294</twEndPtCnt><twPathErrCnt>0</twPathErrCnt><twMinPer>3.522</twMinPer></twConstHead><twPathRptBanner iPaths="4" iCriticalPaths="0" sType="EndPoint">Paths for end point U2/Dsin_8 (SLICE_X4Y17.A4), 4 paths
</twPathRptBanner><twPathRpt anchorID="5"><twConstPath anchorID="6" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>16.478</twSlack><twSrc BELType="FF">U2/C2_0</twSrc><twDest BELType="FF">U2/Dsin_8</twDest><twTotPathDel>3.475</twTotPathDel><twClkSkew dest = "0.281" src = "0.293">0.012</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="15" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>U2/C2_0</twSrc><twDest BELType='FF'>U2/Dsin_8</twDest><twLogLvls>3</twLogLvls><twSrcSite>SLICE_X7Y18.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">Clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X7Y18.AQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.391</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/C2_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X7Y18.D2</twSite><twDelType>net</twDelType><twFanCnt>7</twFanCnt><twDelInfo twEdge="twRising">0.611</twDelInfo><twComp>U2/C2<0></twComp></twPathDel><twPathDel><twSite>SLICE_X7Y18.D</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.259</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/Msub_C2[2]_GND_3_o_sub_16_OUT_xor<1>11</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y18.B3</twSite><twDelType>net</twDelType><twFanCnt>4</twFanCnt><twDelInfo twEdge="twRising">1.286</twDelInfo><twComp>U2/C2[2]_GND_3_o_sub_16_OUT<1></twComp></twPathDel><twPathDel><twSite>SLICE_X4Y18.B</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.203</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<0></twComp><twBEL>U2/Mshreg_C2[2]_DBin[3][7]_wide_mux_14_OUT_7_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y17.A4</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.436</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<7></twComp></twPathDel><twPathDel><twSite>SLICE_X4Y17.CLK</twSite><twDelType>Tas</twDelType><twDelInfo twEdge="twRising">0.289</twDelInfo><twComp>U2/Dsin<8></twComp><twBEL>U2/Mmux_PWR_4_o_PWR_4_o_mux_16_OUT81</twBEL><twBEL>U2/Dsin_8</twBEL></twPathDel><twLogDel>1.142</twLogDel><twRouteDel>2.333</twRouteDel><twTotDel>3.475</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">Clk_BUFGP</twDestClk><twPctLog>32.9</twPctLog><twPctRoute>67.1</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="7"><twConstPath anchorID="8" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>16.836</twSlack><twSrc BELType="FF">U2/C2_1</twSrc><twDest BELType="FF">U2/Dsin_8</twDest><twTotPathDel>3.117</twTotPathDel><twClkSkew dest = "0.281" src = "0.293">0.012</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="15" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>U2/C2_1</twSrc><twDest BELType='FF'>U2/Dsin_8</twDest><twLogLvls>3</twLogLvls><twSrcSite>SLICE_X7Y18.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">Clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X7Y18.BQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.391</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/C2_1</twBEL></twPathDel><twPathDel><twSite>SLICE_X7Y18.D4</twSite><twDelType>net</twDelType><twFanCnt>6</twFanCnt><twDelInfo twEdge="twRising">0.253</twDelInfo><twComp>U2/C2<1></twComp></twPathDel><twPathDel><twSite>SLICE_X7Y18.D</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.259</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/Msub_C2[2]_GND_3_o_sub_16_OUT_xor<1>11</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y18.B3</twSite><twDelType>net</twDelType><twFanCnt>4</twFanCnt><twDelInfo twEdge="twRising">1.286</twDelInfo><twComp>U2/C2[2]_GND_3_o_sub_16_OUT<1></twComp></twPathDel><twPathDel><twSite>SLICE_X4Y18.B</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.203</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<0></twComp><twBEL>U2/Mshreg_C2[2]_DBin[3][7]_wide_mux_14_OUT_7_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y17.A4</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.436</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<7></twComp></twPathDel><twPathDel><twSite>SLICE_X4Y17.CLK</twSite><twDelType>Tas</twDelType><twDelInfo twEdge="twRising">0.289</twDelInfo><twComp>U2/Dsin<8></twComp><twBEL>U2/Mmux_PWR_4_o_PWR_4_o_mux_16_OUT81</twBEL><twBEL>U2/Dsin_8</twBEL></twPathDel><twLogDel>1.142</twLogDel><twRouteDel>1.975</twRouteDel><twTotDel>3.117</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">Clk_BUFGP</twDestClk><twPctLog>36.6</twPctLog><twPctRoute>63.4</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="9"><twConstPath anchorID="10" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>17.475</twSlack><twSrc BELType="FF">U2/C2_0</twSrc><twDest BELType="FF">U2/Dsin_8</twDest><twTotPathDel>2.478</twTotPathDel><twClkSkew dest = "0.281" src = "0.293">0.012</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="15" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>U2/C2_0</twSrc><twDest BELType='FF'>U2/Dsin_8</twDest><twLogLvls>3</twLogLvls><twSrcSite>SLICE_X7Y18.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">Clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X7Y18.AQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.391</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/C2_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X7Y18.A6</twSite><twDelType>net</twDelType><twFanCnt>7</twFanCnt><twDelInfo twEdge="twRising">0.136</twDelInfo><twComp>U2/C2<0></twComp></twPathDel><twPathDel><twSite>SLICE_X7Y18.A</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.259</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/s[0]_C2[2]_wide_mux_25_OUT<0>1_INV_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y18.B2</twSite><twDelType>net</twDelType><twFanCnt>4</twFanCnt><twDelInfo twEdge="twRising">0.764</twDelInfo><twComp>U2/s[0]_C2[2]_wide_mux_25_OUT<0></twComp></twPathDel><twPathDel><twSite>SLICE_X4Y18.B</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.203</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<0></twComp><twBEL>U2/Mshreg_C2[2]_DBin[3][7]_wide_mux_14_OUT_7_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y17.A4</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.436</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<7></twComp></twPathDel><twPathDel><twSite>SLICE_X4Y17.CLK</twSite><twDelType>Tas</twDelType><twDelInfo twEdge="twRising">0.289</twDelInfo><twComp>U2/Dsin<8></twComp><twBEL>U2/Mmux_PWR_4_o_PWR_4_o_mux_16_OUT81</twBEL><twBEL>U2/Dsin_8</twBEL></twPathDel><twLogDel>1.142</twLogDel><twRouteDel>1.336</twRouteDel><twTotDel>2.478</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">Clk_BUFGP</twDestClk><twPctLog>46.1</twPctLog><twPctRoute>53.9</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="4" iCriticalPaths="0" sType="EndPoint">Paths for end point U2/Dsin_5 (SLICE_X5Y18.B3), 4 paths
</twPathRptBanner><twPathRpt anchorID="11"><twConstPath anchorID="12" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>16.495</twSlack><twSrc BELType="FF">U2/C2_0</twSrc><twDest BELType="FF">U2/Dsin_5</twDest><twTotPathDel>3.457</twTotPathDel><twClkSkew dest = "0.280" src = "0.293">0.013</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="16" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>U2/C2_0</twSrc><twDest BELType='FF'>U2/Dsin_5</twDest><twLogLvls>3</twLogLvls><twSrcSite>SLICE_X7Y18.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">Clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X7Y18.AQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.391</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/C2_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X7Y18.D2</twSite><twDelType>net</twDelType><twFanCnt>7</twFanCnt><twDelInfo twEdge="twRising">0.611</twDelInfo><twComp>U2/C2<0></twComp></twPathDel><twPathDel><twSite>SLICE_X7Y18.D</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.259</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/Msub_C2[2]_GND_3_o_sub_16_OUT_xor<1>11</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y18.B3</twSite><twDelType>net</twDelType><twFanCnt>4</twFanCnt><twDelInfo twEdge="twRising">1.286</twDelInfo><twComp>U2/C2[2]_GND_3_o_sub_16_OUT<1></twComp></twPathDel><twPathDel><twSite>SLICE_X4Y18.BMUX</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.261</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<0></twComp><twBEL>U2/Mshreg_C2[2]_DBin[3][7]_wide_mux_14_OUT_4_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y18.B3</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.327</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<4></twComp></twPathDel><twPathDel><twSite>SLICE_X5Y18.CLK</twSite><twDelType>Tas</twDelType><twDelInfo twEdge="twRising">0.322</twDelInfo><twComp>U2/Dsin<7></twComp><twBEL>U2/Mmux_PWR_4_o_PWR_4_o_mux_16_OUT51</twBEL><twBEL>U2/Dsin_5</twBEL></twPathDel><twLogDel>1.233</twLogDel><twRouteDel>2.224</twRouteDel><twTotDel>3.457</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">Clk_BUFGP</twDestClk><twPctLog>35.7</twPctLog><twPctRoute>64.3</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="13"><twConstPath anchorID="14" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>16.853</twSlack><twSrc BELType="FF">U2/C2_1</twSrc><twDest BELType="FF">U2/Dsin_5</twDest><twTotPathDel>3.099</twTotPathDel><twClkSkew dest = "0.280" src = "0.293">0.013</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="16" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>U2/C2_1</twSrc><twDest BELType='FF'>U2/Dsin_5</twDest><twLogLvls>3</twLogLvls><twSrcSite>SLICE_X7Y18.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">Clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X7Y18.BQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.391</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/C2_1</twBEL></twPathDel><twPathDel><twSite>SLICE_X7Y18.D4</twSite><twDelType>net</twDelType><twFanCnt>6</twFanCnt><twDelInfo twEdge="twRising">0.253</twDelInfo><twComp>U2/C2<1></twComp></twPathDel><twPathDel><twSite>SLICE_X7Y18.D</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.259</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/Msub_C2[2]_GND_3_o_sub_16_OUT_xor<1>11</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y18.B3</twSite><twDelType>net</twDelType><twFanCnt>4</twFanCnt><twDelInfo twEdge="twRising">1.286</twDelInfo><twComp>U2/C2[2]_GND_3_o_sub_16_OUT<1></twComp></twPathDel><twPathDel><twSite>SLICE_X4Y18.BMUX</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.261</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<0></twComp><twBEL>U2/Mshreg_C2[2]_DBin[3][7]_wide_mux_14_OUT_4_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y18.B3</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.327</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<4></twComp></twPathDel><twPathDel><twSite>SLICE_X5Y18.CLK</twSite><twDelType>Tas</twDelType><twDelInfo twEdge="twRising">0.322</twDelInfo><twComp>U2/Dsin<7></twComp><twBEL>U2/Mmux_PWR_4_o_PWR_4_o_mux_16_OUT51</twBEL><twBEL>U2/Dsin_5</twBEL></twPathDel><twLogDel>1.233</twLogDel><twRouteDel>1.866</twRouteDel><twTotDel>3.099</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">Clk_BUFGP</twDestClk><twPctLog>39.8</twPctLog><twPctRoute>60.2</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="15"><twConstPath anchorID="16" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>17.492</twSlack><twSrc BELType="FF">U2/C2_0</twSrc><twDest BELType="FF">U2/Dsin_5</twDest><twTotPathDel>2.460</twTotPathDel><twClkSkew dest = "0.280" src = "0.293">0.013</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="16" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>U2/C2_0</twSrc><twDest BELType='FF'>U2/Dsin_5</twDest><twLogLvls>3</twLogLvls><twSrcSite>SLICE_X7Y18.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">Clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X7Y18.AQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.391</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/C2_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X7Y18.A6</twSite><twDelType>net</twDelType><twFanCnt>7</twFanCnt><twDelInfo twEdge="twRising">0.136</twDelInfo><twComp>U2/C2<0></twComp></twPathDel><twPathDel><twSite>SLICE_X7Y18.A</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.259</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/s[0]_C2[2]_wide_mux_25_OUT<0>1_INV_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y18.B2</twSite><twDelType>net</twDelType><twFanCnt>4</twFanCnt><twDelInfo twEdge="twRising">0.764</twDelInfo><twComp>U2/s[0]_C2[2]_wide_mux_25_OUT<0></twComp></twPathDel><twPathDel><twSite>SLICE_X4Y18.BMUX</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.261</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<0></twComp><twBEL>U2/Mshreg_C2[2]_DBin[3][7]_wide_mux_14_OUT_4_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y18.B3</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.327</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<4></twComp></twPathDel><twPathDel><twSite>SLICE_X5Y18.CLK</twSite><twDelType>Tas</twDelType><twDelInfo twEdge="twRising">0.322</twDelInfo><twComp>U2/Dsin<7></twComp><twBEL>U2/Mmux_PWR_4_o_PWR_4_o_mux_16_OUT51</twBEL><twBEL>U2/Dsin_5</twBEL></twPathDel><twLogDel>1.233</twLogDel><twRouteDel>1.227</twRouteDel><twTotDel>2.460</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">Clk_BUFGP</twDestClk><twPctLog>50.1</twPctLog><twPctRoute>49.9</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="4" iCriticalPaths="0" sType="EndPoint">Paths for end point U2/Dsin_7 (SLICE_X5Y18.D2), 4 paths
</twPathRptBanner><twPathRpt anchorID="17"><twConstPath anchorID="18" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>16.840</twSlack><twSrc BELType="FF">U2/C2_0</twSrc><twDest BELType="FF">U2/Dsin_7</twDest><twTotPathDel>3.112</twTotPathDel><twClkSkew dest = "0.280" src = "0.293">0.013</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="15" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>U2/C2_0</twSrc><twDest BELType='FF'>U2/Dsin_7</twDest><twLogLvls>3</twLogLvls><twSrcSite>SLICE_X7Y18.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">Clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X7Y18.AQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.391</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/C2_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X7Y18.D2</twSite><twDelType>net</twDelType><twFanCnt>7</twFanCnt><twDelInfo twEdge="twRising">0.611</twDelInfo><twComp>U2/C2<0></twComp></twPathDel><twPathDel><twSite>SLICE_X7Y18.D</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.259</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/Msub_C2[2]_GND_3_o_sub_16_OUT_xor<1>11</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y18.A3</twSite><twDelType>net</twDelType><twFanCnt>4</twFanCnt><twDelInfo twEdge="twRising">0.733</twDelInfo><twComp>U2/C2[2]_GND_3_o_sub_16_OUT<1></twComp></twPathDel><twPathDel><twSite>SLICE_X4Y18.A</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.203</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<0></twComp><twBEL>U2/Mshreg_C2[2]_DBin[3][7]_wide_mux_14_OUT_6_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y18.D2</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.593</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<6></twComp></twPathDel><twPathDel><twSite>SLICE_X5Y18.CLK</twSite><twDelType>Tas</twDelType><twDelInfo twEdge="twRising">0.322</twDelInfo><twComp>U2/Dsin<7></twComp><twBEL>U2/Mmux_PWR_4_o_PWR_4_o_mux_16_OUT71</twBEL><twBEL>U2/Dsin_7</twBEL></twPathDel><twLogDel>1.175</twLogDel><twRouteDel>1.937</twRouteDel><twTotDel>3.112</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">Clk_BUFGP</twDestClk><twPctLog>37.8</twPctLog><twPctRoute>62.2</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="19"><twConstPath anchorID="20" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>17.198</twSlack><twSrc BELType="FF">U2/C2_1</twSrc><twDest BELType="FF">U2/Dsin_7</twDest><twTotPathDel>2.754</twTotPathDel><twClkSkew dest = "0.280" src = "0.293">0.013</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="15" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>U2/C2_1</twSrc><twDest BELType='FF'>U2/Dsin_7</twDest><twLogLvls>3</twLogLvls><twSrcSite>SLICE_X7Y18.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">Clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X7Y18.BQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.391</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/C2_1</twBEL></twPathDel><twPathDel><twSite>SLICE_X7Y18.D4</twSite><twDelType>net</twDelType><twFanCnt>6</twFanCnt><twDelInfo twEdge="twRising">0.253</twDelInfo><twComp>U2/C2<1></twComp></twPathDel><twPathDel><twSite>SLICE_X7Y18.D</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.259</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/Msub_C2[2]_GND_3_o_sub_16_OUT_xor<1>11</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y18.A3</twSite><twDelType>net</twDelType><twFanCnt>4</twFanCnt><twDelInfo twEdge="twRising">0.733</twDelInfo><twComp>U2/C2[2]_GND_3_o_sub_16_OUT<1></twComp></twPathDel><twPathDel><twSite>SLICE_X4Y18.A</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.203</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<0></twComp><twBEL>U2/Mshreg_C2[2]_DBin[3][7]_wide_mux_14_OUT_6_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y18.D2</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.593</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<6></twComp></twPathDel><twPathDel><twSite>SLICE_X5Y18.CLK</twSite><twDelType>Tas</twDelType><twDelInfo twEdge="twRising">0.322</twDelInfo><twComp>U2/Dsin<7></twComp><twBEL>U2/Mmux_PWR_4_o_PWR_4_o_mux_16_OUT71</twBEL><twBEL>U2/Dsin_7</twBEL></twPathDel><twLogDel>1.175</twLogDel><twRouteDel>1.579</twRouteDel><twTotDel>2.754</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">Clk_BUFGP</twDestClk><twPctLog>42.7</twPctLog><twPctRoute>57.3</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="21"><twConstPath anchorID="22" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>17.412</twSlack><twSrc BELType="FF">U2/C2_0</twSrc><twDest BELType="FF">U2/Dsin_7</twDest><twTotPathDel>2.540</twTotPathDel><twClkSkew dest = "0.280" src = "0.293">0.013</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="15" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>U2/C2_0</twSrc><twDest BELType='FF'>U2/Dsin_7</twDest><twLogLvls>3</twLogLvls><twSrcSite>SLICE_X7Y18.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">Clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X7Y18.AQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.391</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/C2_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X7Y18.A6</twSite><twDelType>net</twDelType><twFanCnt>7</twFanCnt><twDelInfo twEdge="twRising">0.136</twDelInfo><twComp>U2/C2<0></twComp></twPathDel><twPathDel><twSite>SLICE_X7Y18.A</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.259</twDelInfo><twComp>U2/C2<2></twComp><twBEL>U2/s[0]_C2[2]_wide_mux_25_OUT<0>1_INV_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y18.A2</twSite><twDelType>net</twDelType><twFanCnt>4</twFanCnt><twDelInfo twEdge="twRising">0.636</twDelInfo><twComp>U2/s[0]_C2[2]_wide_mux_25_OUT<0></twComp></twPathDel><twPathDel><twSite>SLICE_X4Y18.A</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.203</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<0></twComp><twBEL>U2/Mshreg_C2[2]_DBin[3][7]_wide_mux_14_OUT_6_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y18.D2</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.593</twDelInfo><twComp>U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<6></twComp></twPathDel><twPathDel><twSite>SLICE_X5Y18.CLK</twSite><twDelType>Tas</twDelType><twDelInfo twEdge="twRising">0.322</twDelInfo><twComp>U2/Dsin<7></twComp><twBEL>U2/Mmux_PWR_4_o_PWR_4_o_mux_16_OUT71</twBEL><twBEL>U2/Dsin_7</twBEL></twPathDel><twLogDel>1.175</twLogDel><twRouteDel>1.365</twRouteDel><twTotDel>2.540</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">Clk_BUFGP</twDestClk><twPctLog>46.3</twPctLog><twPctRoute>53.7</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner sType="PathClass">Hold Paths: TS_clk = PERIOD TIMEGRP "clk" 20 ns HIGH 50%;
</twPathRptBanner><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point U2/Dsin_1 (SLICE_X6Y17.A6), 1 path
</twPathRptBanner><twPathRpt anchorID="23"><twConstPath anchorID="24" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>0.412</twSlack><twSrc BELType="FF">U2/Dsin_1</twSrc><twDest BELType="FF">U2/Dsin_1</twDest><twTotPathDel>0.412</twTotPathDel><twClkSkew>0.000</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15" twPathCritProcCorner=" at Fast Process Corner"><twSrc BELType='FF'>U2/Dsin_1</twSrc><twDest BELType='FF'>U2/Dsin_1</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X6Y17.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="20.000">Clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X6Y17.AQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twFalling">0.200</twDelInfo><twComp>U2/Dsin<3></twComp><twBEL>U2/Dsin_1</twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y17.A6</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twFalling">0.022</twDelInfo><twComp>U2/Dsin<1></twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>SLICE_X6Y17.CLK</twSite><twDelType>Tah</twDelType><twDelInfo twEdge="twFalling">0.190</twDelInfo><twComp>U2/Dsin<3></twComp><twBEL>U2/Mmux_PWR_4_o_PWR_4_o_mux_16_OUT11</twBEL><twBEL>U2/Dsin_1</twBEL></twPathDel><twLogDel>0.390</twLogDel><twRouteDel>0.022</twRouteDel><twTotDel>0.412</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">Clk_BUFGP</twDestClk><twPctLog>94.7</twPctLog><twPctRoute>5.3</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point U2/Dsin_3 (SLICE_X6Y17.D6), 1 path
</twPathRptBanner><twPathRpt anchorID="25"><twConstPath anchorID="26" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>0.416</twSlack><twSrc BELType="FF">U2/Dsin_3</twSrc><twDest BELType="FF">U2/Dsin_3</twDest><twTotPathDel>0.416</twTotPathDel><twClkSkew>0.000</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15" twPathCritProcCorner=" at Fast Process Corner"><twSrc BELType='FF'>U2/Dsin_3</twSrc><twDest BELType='FF'>U2/Dsin_3</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X6Y17.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="20.000">Clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X6Y17.DQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twFalling">0.200</twDelInfo><twComp>U2/Dsin<3></twComp><twBEL>U2/Dsin_3</twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y17.D6</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twFalling">0.026</twDelInfo><twComp>U2/Dsin<3></twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>SLICE_X6Y17.CLK</twSite><twDelType>Tah</twDelType><twDelInfo twEdge="twFalling">0.190</twDelInfo><twComp>U2/Dsin<3></twComp><twBEL>U2/Mmux_PWR_4_o_PWR_4_o_mux_16_OUT31</twBEL><twBEL>U2/Dsin_3</twBEL></twPathDel><twLogDel>0.390</twLogDel><twRouteDel>0.026</twRouteDel><twTotDel>0.416</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">Clk_BUFGP</twDestClk><twPctLog>93.8</twPctLog><twPctRoute>6.3</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point U1/Dout_0 (SLICE_X2Y18.A6), 1 path
</twPathRptBanner><twPathRpt anchorID="27"><twConstPath anchorID="28" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>0.422</twSlack><twSrc BELType="FF">U1/Dout_0</twSrc><twDest BELType="FF">U1/Dout_0</twDest><twTotPathDel>0.422</twTotPathDel><twClkSkew>0.000</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15" twPathCritProcCorner=" at Fast Process Corner"><twSrc BELType='FF'>U1/Dout_0</twSrc><twDest BELType='FF'>U1/Dout_0</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X2Y18.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="20.000">Clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X2Y18.AQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twFalling">0.200</twDelInfo><twComp>U1/Dout<1></twComp><twBEL>U1/Dout_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X2Y18.A6</twSite><twDelType>net</twDelType><twFanCnt>3</twFanCnt><twDelInfo twEdge="twFalling">0.032</twDelInfo><twComp>U1/Dout<0></twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>SLICE_X2Y18.CLK</twSite><twDelType>Tah</twDelType><twDelInfo twEdge="twFalling">0.190</twDelInfo><twComp>U1/Dout<1></twComp><twBEL>U1/Dout_0_dpot</twBEL><twBEL>U1/Dout_0</twBEL></twPathDel><twLogDel>0.390</twLogDel><twRouteDel>0.032</twRouteDel><twTotDel>0.422</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">Clk_BUFGP</twDestClk><twPctLog>92.4</twPctLog><twPctRoute>7.6</twPctRoute></twDetPath></twConstPath></twPathRpt><twPinLimitRpt anchorID="29"><twPinLimitBanner>Component Switching Limit Checks: TS_clk = PERIOD TIMEGRP "clk" 20 ns HIGH 50%;</twPinLimitBanner><twPinLimit anchorID="30" type="MINPERIOD" name="Tbcper_I" slack="18.270" period="20.000" constraintValue="20.000" deviceLimit="1.730" freqLimit="578.035" physResource="Clk_BUFGP/BUFG/I0" logResource="Clk_BUFGP/BUFG/I0" locationPin="BUFGMUX_X3Y8.I0" clockNet="Clk_BUFGP/IBUFG"/><twPinLimit anchorID="31" type="MINPERIOD" name="Tcp" slack="19.000" period="20.000" constraintValue="20.000" deviceLimit="1.000" freqLimit="1000.000" physResource="U1/RxdD2/CLK" logResource="U1/Mshreg_RxdD2/CLK" locationPin="SLICE_X0Y12.CLK" clockNet="Clk_BUFGP"/><twPinLimit anchorID="32" type="MINPERIOD" name="Tcp" slack="19.000" period="20.000" constraintValue="20.000" deviceLimit="1.000" freqLimit="1000.000" physResource="U2/C2[2]_DBin[3][7]_wide_mux_14_OUT<0>/CLK" logResource="U2/Mshreg_C2[2]_DBin[3][7]_wide_mux_14_OUT_5_0/CLK" locationPin="SLICE_X4Y18.CLK" clockNet="Clk_BUFGP"/></twPinLimitRpt></twConst><twUnmetConstCnt anchorID="33">0</twUnmetConstCnt><twDataSheet anchorID="34" twNameLen="15"><twClk2SUList anchorID="35" twDestWidth="3"><twDest>Clk</twDest><twClk2SU><twSrc>Clk</twSrc><twRiseRise>3.522</twRiseRise></twClk2SU></twClk2SUList><twOffsetTables></twOffsetTables></twDataSheet></twVerboseRpt></twBody><twSum anchorID="36"><twErrCnt>0</twErrCnt><twScore>0</twScore><twSetupScore>0</twSetupScore><twHoldScore>0</twHoldScore><twConstCov><twPathCnt>739</twPathCnt><twNetCnt>0</twNetCnt><twConnCnt>428</twConnCnt></twConstCov><twStats anchorID="37"><twMinPer>3.522</twMinPer><twFootnote number="1" /><twMaxFreq>283.930</twMaxFreq></twStats></twSum><twFoot><twFootnoteExplanation  number="1" text="The minimum period statistic assumes all single cycle delays."></twFootnoteExplanation><twTimestamp>Wed Oct 02 21:30:14 2013 </twTimestamp></twFoot><twClientInfo anchorID="38"><twClientName>Trace</twClientName><twAttrList><twAttrListItem><twName>Trace Settings</twName><twValue>

Peak Memory Usage: 121 MB
</twValue></twAttrListItem></twAttrList></twClientInfo></twReport>