www.pudn.com > UartLoop.rar > main.bld, change:2013-10-02,size:1075b


Release 12.4 ngdbuild M.81d (nt)
Copyright (c) 1995-2010 Xilinx, Inc.  All rights reserved.

Command Line: d:\Xilinx\12.4\ISE_DS\ISE\bin\nt\unwrapped\ngdbuild.exe -intstyle 
ise -dd _ngo -nt timestamp -uc F:/USB2.0/Tutorial_01/UartLoop/SRC/sp6-dp.ucf -p 
xc6slx9-tqg144-3 main.ngc main.ngd

Reading NGO file "F:/USB2.0/Tutorial_01/UartLoop/UartLoop/main.ngc" ...
Gathering constraint information from source properties...
Done.

Annotating constraints to design from ucf file 
"F:/USB2.0/Tutorial_01/UartLoop/SRC/sp6-dp.ucf" ...
Resolving constraint associations...
Checking Constraint Associations...
Done...

Checking expanded design ...

Partition Implementation Status
-------------------------------

  No Partitions were found in this design.

-------------------------------

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings:   0

Total memory usage is 84748 kilobytes

Writing NGD file "main.ngd" ...
Total REAL time to NGDBUILD completion:  5 sec
Total CPU time to NGDBUILD completion:   3 sec

Writing NGDBUILD log file "main.bld"...