www.pudn.com > DesignOfCarLight.rar > back_light.vhd

LIBRARY IEEE; 
USE IEEE.STD_LOGIC_1164.ALL; 
 
ENTITY back_light IS 
  PORT( 
       clk            : IN STD_LOGIC; 
       lights_control : IN STD_LOGIC_VECTOR( 2 DOWNTO 0); 
       lights         : OUT STD_LOGIC_VECTOR( 2 DOWNTO 0) 
      ); 
end back_light; 
  
ARCHITECTURE arch_back_light OF back_light IS 
TYPE  state1 IS(s0,s1,s2,s3); 
TYPE  state2 IS(t0,t1); 
SIGNAL presentstate1 : state1; 
SIGNAL presentstate2 : state2; 
 
BEGIN 
  PROCESS( clk, presentstate1  ) 
   BEGIN 
    if(clk'event and clk = '1') then 
    if( lights_control  = "000") THEN 
      lights <= "000"; 
     
    elsif( lights_control = "001") THEN 
      case presentstate1 IS 
        WHEN s0 => 
           lights <= "001"; 
           presentstate1 <= s1; 
        WHEN s1 => 
           lights <= "011"; 
           presentstate1 <= s2; 
        WHEN s2 => 
           lights <= "111"; 
           presentstate1 <= s3; 
        WHEN s3 => 
           lights <= "000"; 
           presentstate1 <= s0; 
     end case; 
      
     elsif( lights_control  = "010") THEN 
       case presentstate2 IS 
         WHEN t0 => 
             lights <= "000"; 
             presentstate2 <= t1; 
         WHEN t1 => 
             lights <= "111"; 
             presentstate2 <= t0; 
        end case; 
     
    elsif( lights_control = "100" ) THEN 
      lights <= "111"; 
    end if; 
 end if; 
  END process; 
end arch_back_light;