www.pudn.com > SEEDVPM642_D1.zip > dm642main.c

/********************************************************************/ 
/*  Copyright 2004 by SEED Incorporated.							*/ 
/*  All rights reserved. Property of SEED Incorporated.				*/ 
/*  Restricted rights to use, duplicate or disclose this code are	*/ 
/*  granted through contract.									    */ 
/*  															    */ 
/********************************************************************/ 
#include  
#include  
#include  
#include  
#include  
#include  
#include "iic.h" 
#include "vportcap.h" 
#include "vportdis.h" 
#include "sa7121h.h" 
 
/*SEEDDM642的emifa的设置结构*/ 
EMIFA_Config Seeddm642ConfigA ={ 
	   0x00052078,/*gblctl EMIFA(B)global control register value */ 
	   			  /*将CLK6、4、1使能；将MRMODE置1；使能EK2EN,EK2RATE*/ 
	   0xffffffd3,/*cectl0 CE0 space control register value*/ 
	   			  /*将CE0空间设为SDRAM*/ 
	   0x73a28e01,/*cectl1 CE1 space control register value*/ 
	   			  /*Read hold: 1 clock; 
	   			    MTYPE : 0000,选择8位的异步接口 
	   			    Read strobe ：001110；14个clock宽度 
	   			    TA：2 clock; Read setup 2 clock; 
	   			    Write hold :2 clock; Write strobe: 14 clock 
	   			    Write setup :7 clock 
	   			    --					 --------------- 
	   			  	  \		 14c		/1c 
	   			 	   \----------------/ */ 
	   0x22a28a22, /*cectl2 CE2 space control register value*/ 
       0x22a28a42, /*cectl3 CE3 space control register value*/ 
	   0x57115000, /*sdctl SDRAM control register value*/ 
	   0x0000081b, /*sdtim SDRAM timing register value*/ 
	   0x001faf4d, /*sdext SDRAM extension register value*/ 
	   0x00000002, /*cesec0 CE0 space secondary control register value*/ 
	   0x00000002, /*cesec1 CE1 space secondary control register value*/ 
	   0x00000002, /*cesec2 CE2 space secondary control register value*/ 
	   0x00000073 /*cesec3 CE3 space secondary control register value*/	 
}; 
 
/*SEEDDM642的IIC的设置结构*/ 
I2C_Config SEEDDM642IIC_Config = { 
    0,  /* master mode,  i2coar;采用主模式   */ 
    0,  /* no interrupt, i2cimr;只写，不读，采用无中断方式*/ 
    (20-5), /* scl low time, i2cclkl;  */ 
    (20-5), /* scl high time,i2cclkh;  */ 
    1,  /* configure later, i2ccnt;*/ 
    0,  /* configure later, i2csar;*/ 
    0x4ea0, /* master tx mode,     */ 
            /* i2c runs free,      */ 
            /* 8-bit data + NACK   */ 
            /* no repeat mode      */ 
    (75-1), /* 4MHz clock, i2cpsc  */ 
}; 
 
CHIP_Config SEEDDM642percfg = { 
	CHIP_VP2+\ 
	CHIP_VP1+\ 
	CHIP_VP0+\ 
	CHIP_I2C 
}; 
 
I2C_Handle hSeeddm642i2c; 
int portNumber; 
extern SA7121H_ConfParams sa7121hPAL[45]; 
extern SA7121H_ConfParams sa7121hNTSC[45]; 
Uint8 vFromat = 0; 
Uint8 temp = 0; 
Uint8 misc_ctrl = 0x6D; 
Uint8 output_format = 0x47; 
// 地址为0 for cvbs port1,选择复合信号做为输入 
Uint8 input_sel = 0x00; 
/*地址为0xf，将Pin27设置成为CAPEN功能*/	 
Uint8 pin_cfg = 0x02; 
/*地址为1B*/ 
Uint8 chro_ctrl_2 = 0x14; 
/*图像句柄的声明*/ 
VP_Handle vpHchannel0; 
VP_Handle vpHchannel1; 
VP_Handle vpHchannel2; 
extern far void vectors(); 
 
/*此程序可将四个采集口的数据经过Video Port0送出*/ 
void main() 
{ 
	Uint8 addrI2C; 
/*-------------------------------------------------------*/ 
/* perform all initializations                           */ 
/*-------------------------------------------------------*/ 
	/*Initialise CSL，初始化CSL库*/ 
	CSL_init(); 
	CHIP_config(&SEEDDM642percfg); 
/*----------------------------------------------------------*/ 
	/*EMIFA的初始化，将CE0设为SDRAM空间，CE1设为异步空间 
	 注，DM642支持的是EMIFA，而非EMIF*/ 
	EMIFA_config(&Seeddm642ConfigA); 
/*----------------------------------------------------------*/ 
	/*中断向量表的初始化*/ 
	//Point to the IRQ vector table 
    IRQ_setVecs(vectors); 
    IRQ_nmiEnable(); 
    IRQ_globalEnable(); 
    IRQ_map(IRQ_EVT_VINT0, 11); 
    IRQ_map(IRQ_EVT_VINT1, 12); 
    IRQ_reset(IRQ_EVT_VINT0); 
    IRQ_reset(IRQ_EVT_VINT1);	 
/*----------------------------------------------------------*/	 
	/*进行IIC的初始化*/ 
	hSeeddm642i2c = I2C_open(I2C_PORT0,I2C_OPEN_RESET); 
	I2C_config(hSeeddm642i2c,&SEEDDM642IIC_Config); 
/*----------------------------------------------------------*/ 
	/*进行TVP5150pbs的初始化*/ 
	/*选择TVP5150，设置第三通路*/ 
	GPIO_RSET(GPGC,0x0);/*将GPIO0不做为GPINT使用*/ 
	GPIO_RSET(GPDIR,0x1);/*将GPIO0做为输出*/ 
	GPIO_RSET(GPVAL,0x0);/*GPIO0输出为高，选择IIC1总线，配置 
						   第二路，即为U21*/ 
	addrI2C = 0xB8 >>1; 
    _IIC_write(hSeeddm642i2c, addrI2C,0x00, input_sel); 
//    _IIC_write(hSeeddm642i2c, addrI2C,0x04, temp); 
    _IIC_write(hSeeddm642i2c, addrI2C,0x03, misc_ctrl); 
    _IIC_write(hSeeddm642i2c, addrI2C,0x0D, output_format); 
    _IIC_write(hSeeddm642i2c, addrI2C,0x0F, pin_cfg); 
    _IIC_write(hSeeddm642i2c, addrI2C,0x1B, chro_ctrl_2); 
    /*回读当前摄像设备的格式*/ 
    _IIC_read(hSeeddm642i2c, addrI2C,0x8c, vFromat); 
    vFromat = vFromat & 0xf;	   
/*----------------------------------------------------------*/	 
	/*进行SAA7121H的初始化*/ 
//	GPIO_RSET(GPVAL,0x0);/*GPIO0输出为低，选择IIC1总线，配置图像输出*/						   
//	addrI2C = 0xB8 >>1; 
	/*将第0路的视频输入口的数据口设为高阻状态*/ 
//	_IIC_write(hSeeddm642i2c, addrI2C,0x03, 0x); 
	/*视频输入口0选择模式为PAL或是NTSC，为图像输出提供时序信号*/ 
	/*配置SAA7121H*/ 
//	addrI2C = 0x88 >>1;					       
//	for(i = 0;i<43 ;i++) 
//	{ 
//		_IIC_write(hSeeddm642i2c, addrI2C,sa7121hNTSC[i].regsubaddr, (sa7121hNTSC[i].regvule)); 
//	}	 
/*----------------------------------------------------------*/ 
	/*初始化Video Port*/ 
	/*将Vedio Port1设为采集输入*/ 
	portNumber = 0; 
	vpHchannel1 = bt656_8bit_ncfc(portNumber); 
	bt656_capture_start(vpHchannel1); 
	for(;;) 
	{} 
/*----------------------------------------------------------*/ 
	/*采集与回放*/	 
}