www.pudn.com > vxworks0108.rar > vg4Intr.h

/* vg4Intr.h - MPC107 EPIC and M1543C-8259 definitions */


/*
Description:

Contains structure typedefs and device-specific defines for the Motorola EPIC
and the ALI M1543C.
*/


#ifndef INCvg4Intrh
#define INCvg4Intrh

#ifdef __cplusplus
extern "C" {
#endif

/* includes */

#include "pciConfigLib.h"
#include "mpc107.h"

/* structures */

typedef struct intHandlerDesc           /* interrupt handler desciption */
    {
    VOIDFUNCPTR                 vec;    /* interrupt vector */
    int                         arg;    /* interrupt handler argument */
    struct intHandlerDesc *     next;   /* next interrupt handler & argument */
    } INT_HANDLER_DESC;

typedef struct localIntData
    {
    UCHAR       epicVec;
    UCHAR       ibcVec;
    INT8        cpuCtrlReg;
    int         temp;
    UINT32      regAddr;
    UINT32      regVal;
    } LOCAL_INT_DATA;




/*
 *  IBC Extensions to Standard PCI Config Header register offsets
 */
#define PCI_CFG_IBC_PIRT1       0x48
#define PCI_CFG_IBC_PIRT2       0x49
#define PCI_CFG_IBC_PIRT3       0x4A
#define PCI_CFG_IBC_PIRT4       0x4B
#define PCI_CFG_IBC_PILET       0x4C

#define PCI_CFG_IBC_SIRQCR      0x70


/* default definitions */

#define CAST

#define PIC_ADRS(base,reg)   (CAST (base+(reg*PIC_REG_ADDR_INTERVAL)))

/* register definitions */

#define PIC_port1(base) PIC_ADRS(base,0x00) /* port 1. */
#define PIC_port2(base) PIC_ADRS(base,0x01) /* port 2. */

/* alias */

#define PIC_IMASK(base) PIC_port2(base)     /* Interrupt mask. */
#define PIC_IACK(base)  PIC_port1(base)     /* Interrupt acknowledge. */

#define PIC_ISR_MASK(base) PIC_port1(base)  /* in-service register mask */
#define PIC_IRR_MASK(base) PIC_port1(base)  /* interrupt request reg */

/*
 *  Non-PCI Config Header register definitions
 *
 *  These are mapped to ISA I/O Space
 */
#define M1543C_INT1_CTRL        (CPU_PCI_ISA_IO_ADRS + 0x0020)  /* PIC1 */
#define M1543C_INT1_MASK        (CPU_PCI_ISA_IO_ADRS + 0x0021)
#define M1543C_INT1_ELC         (CPU_PCI_ISA_IO_ADRS + 0x04d0)
#define M1543C_INT2_CTRL        (CPU_PCI_ISA_IO_ADRS + 0x00a0)  /* PIC2 */
#define M1543C_INT2_MASK        (CPU_PCI_ISA_IO_ADRS + 0x00a1)
#define M1543C_INT2_ELC         (CPU_PCI_ISA_IO_ADRS + 0x04d1)

/* programmable interrupt controller (PIC) */

#define PIC_OCW3_SEL         0x08      /* Select OCW3 */
#define PIC_IRR_READ         0x02      /* Read IRR (Int. req. reg.) */
#define PIC_ISR_READ         0x03      /* Read ISR (In service reg.) */

/* Hardware access methods */

#ifndef IBC_BYTE_OUT
#   define IBC_BYTE_OUT(reg,data) (sysOutByte (reg,data))
#endif

#ifndef IBC_BYTE_IN
#   define IBC_BYTE_IN(reg,pData) (*pData = sysInByte(reg))
#endif

#ifndef CPU_INT_LOCK
#   define CPU_INT_LOCK(x) (*x = intLock ())
#endif

#ifndef CPU_INT_UNLOCK
#   define CPU_INT_UNLOCK(data) (intUnlock (data))
#endif



#ifdef __cplusplus
}
#endif

#endif  /* INCvg4Intrh */