www.pudn.com > beipin_quartII.rar > bp2.qsf

# Copyright (C) 1991-2006 Altera Corporation 
# Your use of Altera Corporation's design tools, logic functions  
# and other software and tools, and its AMPP partner logic  
# functions, and any output files any of the foregoing  
# (including device programming or simulation files), and any  
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License  
# Subscription Agreement, Altera MegaCore Function License  
# Agreement, or other applicable license agreement, including,  
# without limitation, that your use is for the sole purpose of  
# programming logic devices manufactured by Altera and sold by  
# Altera or its authorized distributors.  Please refer to the  
# applicable agreement for further details. 
 
 
# The default values for assignments are stored in the file 
#		bp2_assignment_defaults.qdf 
# If this file doesn't exist, and for assignments not listed, see file 
#		assignment_defaults.qdf 
 
# Altera recommends that you do not modify this file. This 
# file is updated automatically by the Quartus II software 
# and any changes you make may be lost or overwritten. 
 
 
set_global_assignment -name FAMILY MAX7000S 
set_global_assignment -name DEVICE "EPM7128SLC84-10" 
set_global_assignment -name TOP_LEVEL_ENTITY bp2 
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "5.1 SP1" 
set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:46:27  MARCH 18, 2006" 
set_global_assignment -name LAST_QUARTUS_VERSION "5.1 SP1" 
set_global_assignment -name VHDL_FILE "D:\\fpga\\bp2\\bp2.vhd" 
set_global_assignment -name VECTOR_WAVEFORM_FILE bp2.vwf 
set_global_assignment -name SIMULATION_VDB_RESULT_FLUSH OFF 
set_global_assignment -name VECTOR_INPUT_SOURCE bp2.vwf 
set_global_assignment -name GLITCH_DETECTION ON