www.pudn.com > sd(sd_4_data_mode).rar > sd_mem.h


/* Copyright 2002, ESS Technology, Inc.				*/ 
/* SCCSID @(#)sd_mem.h	1.8 11/01/03 */ 
 
 
#ifndef _SD_MEM_H_ 
#define _SD_MEM_H_ 
 
/******************************************************************/ 
/*                                                                */ 
/*      SD IO defined at "mem_dev.h"                              */ 
/*                                                                */ 
/******************************************************************/ 
 
 
/************************************************************************** 
 * SD related constants and macros 
 **************************************************************************/ 
#define SD_ACCEPTABLE_OCR	(0x007c<<16) /* 3.0 < Vdd < 3.5 */ 
#define SD_MAX_RETRIES		2 
 
/* SD communication states */ 
#define SD_IDLE			0x0 
#define HOST2SD_8CYCLES		0x1 
#define HOST2SD_START		0x2 
#define HOST2SD_CMD		0x3 
#define HOST2SD_CRC7		0x4 
#define HOST2SD_WAIT		0x5 
#define HOST2SD_DATA1		0x6 
#define HOST2SD_DATA4		0x7 
#define HOST2SD_CRC16_DATA	0x8 
#define HOST2SD_CHECK_BUSY	0x9 
#define SD2HOST_NODATA		0xa 
#define SD2HOST_DATA1		0xb 
#define SD2HOST_DATA4		0xc 
#define SD2HOST_CRC7_NODATA	0xd 
#define SD2HOST_CRC16_DATA	0xe 
 
/* SD Card internal states */ 
#define SD_STATE_IDLE		0x0 
#define SD_STATE_READY		0x1 
#define SD_STATE_IDENT		0x2 
#define SD_STATE_STBY		0x3 
#define SD_STATE_TRAN		0x4 
#define SD_STATE_DATA		0x5 
#define SD_STATE_RCV		0x6 
#define SD_STATE_PRG		0x7 
#define SD_STATE_DIS		0x8 
 
/* SD command responses */ 
#define SD_NR	0x0	/* No response */ 
#define SD_R1	0x1 
#define SD_R2	0x2 
#define SD_R3	0x3 
#define SD_R1b	0x4 
#define SD_R6	0x6 
 
/* SD responses for commands that drive data  */ 
#define SD_USE_DAT_RD	0x20 /* data line(s) for read */ 
#define SD_NR_RD	(SD_NR|SD_USE_DAT_RD) 
#define SD_R1_RD	(SD_R1|SD_USE_DAT_RD) 
#define SD_R1b_RD	(SD_R1b|SD_USE_DAT_RD) 
#define SD_R2_RD	(SD_R2|SD_USE_DAT_RD) 
#define SD_R3_RD	(SD_R3|SD_USE_DAT_RD) 
#define SD_R6_RD	(SD_R6|SD_USE_DAT_RD) 
 
#define SD_USE_DAT_WR	0x10 /* data line(s) for write */ 
#define SD_NR_WR	(SD_NR|SD_USE_DAT_WR) 
#define SD_R1_WR	(SD_R1|SD_USE_DAT_WR) 
#define SD_R1b_WR	(SD_R1b|SD_USE_DAT_WR) 
#define SD_R2_WR	(SD_R2|SD_USE_DAT_WR) 
#define SD_R3_WR	(SD_R3|SD_USE_DAT_WR) 
#define SD_R6_WR	(SD_R6|SD_USE_DAT_WR) 
 
/* SD command classes */ 
#define SD_CL0		0	/* basic */ 
#define SD_CL1		1	/* reserved */ 
#define SD_CL2		2	/* block read */ 
#define SD_CL3		3	/* reserved */ 
#define SD_CL4		4	/* block write */ 
#define SD_CL5		5	/* erase */ 
#define SD_CL6		6	/* write protection */ 
#define SD_CL7		7	/* lock card */ 
#define SD_CL8		8	/* application specific */ 
#define SD_CL9		9	/* reserved */ 
#define SD_CL10		10	/* reserved */ 
#define SD_CL11		11	/* reserved */ 
#define SD_CLX		12	/* No class defined */ 
 
/* Command format:  
 *	[start[47]|xmit[46]|index[45:40]|arg[39:8]|crc[7:1]|end[0]] 
 */ 
#define SD_CMD_LENGTH		48	/* bits */ 
#define SD_CMD_INDEX_LENGTH	6	/* bits */ 
#define SD_CMD_ARG_LENGTH	32	/* bits */ 
#define SD_CMD_CRC_LENGTH	7	/* bits */ 
#define SD_CMD_START_BIT	0x0 
#define SD_CMD_END_BIT		0x1 
#define SD_CMD_HOST_XMIT_BIT	0x1 
 
/* CMD INDEX */ 
#define SD_CMD_GO_IDLE_STATE		0	/* class 0 */ 
#define SD_CMD_MMC_SEND_OP_COND		1	/* class 0 */ 
#define SD_CMD_ALL_SEND_CID		2	/* class 0-R2 */ 
#define SD_CMD_SEND_REL_ADDR		3	/* class 0-R6 */ 
#define SD_CMD_SET_DSR			4	/* class 0 */ 
#define SD_CMD_RESERVED5		5	/* class 0 */ 
#define SD_CMD_RESERVED6		6	/* class 0 */ 
#define SD_CMD_SELECT_CARD		7	/* class 0-R1b */ 
#define SD_CMD_RESERVED8		8	/* class 0 */ 
#define SD_CMD_SEND_CSD			9	/* class 0-R2 */ 
#define SD_CMD_SEND_CID			10	/* class 0-R2 */ 
#define SD_CMD_RESERVED11		11	/* class 0 */ 
#define MMC_CMD_READ_UNTIL_STOP         11      /* class 1-R1 */ 
#define SD_CMD_STOP_TRANSMIT		12	/* class 0-R1b */ 
#define SD_CMD_SEND_STATUS		13	/* class 0-R1 */ 
#define SD_CMD_RESERVED14		14	/* class 0 */ 
#define SD_CMD_GO_INACTIVE_STATE	15	/* class 0 */ 
#define SD_CMD_SET_BLOCKLEN		16	/* class 2-R1 */ 
#define SD_CMD_READ_SINGLE_BLOCK	17	/* class 2-R1 */ 
#define SD_CMD_READ_MULTI_BLOCK		18	/* class 2-R1 */ 
#define SD_CMD_RESERVED19		19	/* class 2 */ 
#define SD_CMD_RESERVED20		20	/* class 2 */ 
#define SD_CMD_RESERVED21		21	/* class 2 */ 
#define SD_CMD_RESERVED22		22	/* class 2 */ 
#define SD_CMD_RESERVED23		23	/* class 2 */ 
#define MMC_CMD_SET_BLOCK_COUNT         23      /* class 2- R1 */ 
#define SD_CMD_WRITE_BLOCK		24	/* class 4-R1 */ 
#define SD_CMD_WRITE_MULTI_BLOCK	25	/* class 4-R1 */ 
#define SD_CMD_RESERVED26		26	/* class 4 */ 
#define SD_CMD_PROGRAM_CSD		27	/* class 4-R1 */ 
#define SD_CMD_SET_WRITE_PROT		28	/* class 6-R1b */ 
#define SD_CMD_CLR_WRITE_PROT		29	/* class 6-R1b */ 
#define SD_CMD_SEND_WRITE_PROT		30	/* class 6-R1 */ 
#define SD_CMD_RESERVED31		31	/* class 6 */ 
#define SD_CMD_ERASE_WR_BLK_START	32	/* class 5-R1 */ 
#define SD_CMD_ERASE_WR_BLK_END		33	/* class 5-R1 */ 
#define SD_CMD_RESERVED34		34	/* class 5 */ 
#define SD_CMD_RESERVED35		35	/* class 5 */ 
#define SD_CMD_RESERVED36		36	/* class 5 */ 
#define SD_CMD_RESERVED37		37	/* class 5 */ 
#define SD_CMD_ERASE			38	/* class 5-R1b */ 
#define SD_CMD_RESERVED39		39	/* class 5 */ 
#define SD_CMD_INVALID			40	/* class 5 */ 
#define SD_CMD_RESERVED41		41	/* class 5 */ 
#define SD_CMD_LOCK_UNLOCK		42	/* class 7-R1 */ 
#define SD_CMD_RESERVED43		43	/* class 7 */ 
#define SD_CMD_RESERVED44		44	/* class 7 */ 
#define SD_CMD_RESERVED45		45	/* class 7 */ 
#define SD_CMD_RESERVED46		46	/* class 7 */ 
#define SD_CMD_RESERVED47		47	/* class 7 */ 
#define SD_CMD_RESERVED48		48	/* class 7 */ 
#define SD_CMD_RESERVED49		49	/* class 7 */ 
#define SD_CMD_RESERVED50		50	/* class 7 */ 
#define SD_CMD_RESERVED51		51	/* class 7 */ 
#define SD_CMD_RESERVED52		52	/* class 7 */ 
#define SD_CMD_RESERVED53		53	/* class 7 */ 
#define SD_CMD_RESERVED54		54	/* class 7 */ 
#define SD_CMD_APP_CMD			55	/* class 8-R1 */ 
#define SD_CMD_GEN_CMD			56	/* class 8-R1 */ 
#define SD_CMD_RESERVED57		57	/* class 8 */ 
#define SD_CMD_RESERVED58		58	/* class 8 */ 
#define SD_CMD_RESERVED59		59	/* class 8 */ 
#define SD_CMD_RESERVED60		60	/* class 8 */ 
#define SD_CMD_RESERVED61		61	/* class 8 */ 
#define SD_CMD_RESERVED62		62	/* class 8 */ 
#define SD_CMD_RESERVED63		63	/* class 8 */ 
#define SD_CMD_EMPTY			SD_CMD_RESERVED63 
 
/* ACMD INDEX (application specific.. 
 * must be preceded by SD_CMD_APP_CMD)  
 */ 
#define ACMD_MARKER			0x80 
#define SD_ACMD_SET_BUS_WIDTH		(6|ACMD_MARKER) /* R1 */ 
#define SD_ACMD_SD_STATUS		(13|ACMD_MARKER) /* R1 */ 
#define SD_ACMD_RESERVED17		(17|ACMD_MARKER) 
#define SD_ACMD_RESERVED18		(18|ACMD_MARKER) 
#define SD_ACMD_RESERVED19		(19|ACMD_MARKER) 
#define SD_ACMD_RESERVED20		(20|ACMD_MARKER) 
#define SD_ACMD_RESERVED21		(21|ACMD_MARKER) 
#define SD_ACMD_SEND_NUM_WR_BLOCKS	(22|ACMD_MARKER) /* R1 */ 
#define SD_ACMD_SET_WR_BLK_ERASE_CNT	(23|ACMD_MARKER) /* R1 */ 
#define SD_ACMD_RESERVED24		(24|ACMD_MARKER) 
#define SD_ACMD_RESERVED25		(25|ACMD_MARKER) 
#define SD_ACMD_RESERVED26		(26|ACMD_MARKER) 
#define SD_ACMD_RESERVED38		(38|ACMD_MARKER) 
#define SD_ACMD_RESERVED39		(39|ACMD_MARKER) 
#define SD_ACMD_RESERVED40		(40|ACMD_MARKER) 
#define SD_ACMD_SD_SEND_OP_COND		(41|ACMD_MARKER) /* R3 */ 
#define SD_ACMD_SET_CLR_CARD_DETECT	(42|ACMD_MARKER) /* R1 */ 
#define SD_ACMD_RESERVED43		(43|ACMD_MARKER) 
#define SD_ACMD_RESERVED49		(49|ACMD_MARKER) 
#define SD_ACMD_SEND_SCR		(51|ACMD_MARKER) /* R1 */ 
 
/* Command/Response delay info */ 
#define SD_NCR_MIN		2	/* clock cycles*/ 
#define SD_NCR_MAX		64	/* clock cycles*/ 
#define SD_NID_MIN		5	/* clock cycles*/ 
#define SD_NID_MAX		15	/* clock cycles*/ 
#define SD_NAC_MIN		2	/* clock cycles*/ 
#define SD_NRC_MIN		8	/* clock cycles*/ 
#define SD_NCC_MIN		8	/* clock cycles*/ 
#define SD_NWR_MIN		2	/* clock cycles*/ 
 
/* SD_card_info.type..*/ 
#define SD_IO		3 /* not yet */ 
#define SD_MEM		2 
#define SD_MMC		1 
#define SD_UNKNOWN	0 
 
/* Response, R1 format (normal).. 
 *     [start[47]|xmit[46]|index[45:40]|stat[39:8]|crc[7:1]|end[0]] 
 */ 
#define SD_R1_LENGTH		48	/* bits */ 
#define SD_R1_INDEX_LENGTH	6	/* bits */ 
#define SD_R1_STATUS_LENGTH	32	/* bits */ 
#define SD_R1_CRC_LENGTH	7	/* bits */ 
#define SD_R1_START_BIT		0x0 
#define SD_R1_END_BIT		0x1 
#define SD_R1_CARD_XMIT_BIT	0x0 
 
/* Response, R2 format (CID, CSD register).. 
 *     [start[135]|xmit[134]|res[133:128]|reg[127:1]|end[0]] 
 */ 
#define SD_R2_LENGTH		136	/* bits */ 
#define SD_R2_RESERVED_LENGTH	6	/* bits */ 
#define SD_R2_REG_LENGTH	127	/* bits */ 
#define SD_R2_START_BIT		0x0 
#define SD_R2_END_BIT		0x1 
#define SD_R2_CARD_XMIT_BIT	0x0 
 
/* Response, R3 format (OCR register).. 
 *     [start[47]|xmit[46]|res1[45:40]|reg[39:8]|res2[7:1]|end[0]] 
 */ 
#define SD_R3_LENGTH		48	/* bits */ 
#define SD_R3_RESERVED_LENGTH1	6	/* bits */ 
#define SD_R3_REG_LENGTH	32	/* bits */ 
#define SD_R3_RESERVED_LENGTH2	7	/* bits */ 
#define SD_R3_START_BIT		0x0 
#define SD_R3_END_BIT		0x1 
#define SD_R3_CARD_XMIT_BIT	0x0 
 
/* Response, R6 format (RCA register).. 
 * [start[47]|xmit[46]|index[45:40]|RCA[39:24]|stat[23:8]|crc[7:1]|end[0]] 
 */ 
#define SD_R6_LENGTH		48	/* bits */ 
#define SD_R6_INDEX_LENGTH	6	/* bits */ 
#define SD_R6_RCA_LENGTH	16	/* bits */ 
#define SD_R6_STATUS_LENGTH	16	/* bits */ 
#define SD_R6_CRC_LENGTH	7	/* bits */ 
#define SD_R6_START_BIT		0x0 
#define SD_R6_END_BIT		0x1 
#define SD_R6_CARD_XMIT_BIT	0x0 
 
 
/************************************************************************** 
 * SD structures  
 **************************************************************************/ 
typedef struct { /* ref. p.49-52..SD Physical Layer */ 
    unsigned out_of_range	:1; 
    unsigned addr_error		:1; 
    unsigned block_len_error	:1; 
    unsigned erase_seq_error	:1; 
    unsigned erase_param	:1; 
    unsigned wp_violation	:1; 
    unsigned card_locked	:1; 
    unsigned lock_failed	:1; 
    unsigned com_crc_error	:1; 
    unsigned illegal_cmd	:1; 
    unsigned ecc_failed		:1; 
    unsigned cc_error		:1; 
    unsigned error		:1; 
    unsigned reserved_18_17	:2; 
    unsigned cid_csd_overwr	:1; 
    unsigned wp_erase_skip	:1; 
    unsigned ecc_disable	:1; 
    unsigned erase_reset	:1; 
    unsigned current_state	:4; 
    unsigned ready_for_data	:1; 
    unsigned reserved_7_6	:2; 
    unsigned app_cmd		:1; 
    unsigned reserved_4		:1; 
    unsigned ake_seq_error	:1; 
    unsigned reserved_2_0	:3; 
} SD_CARD_STATUS; 
 
typedef struct { /* ref. p.52-53..SD Physical Layer */ 
    unsigned dat_bus_width	:2;     
    unsigned secured_mode	:1; 
    unsigned reserved_508_496	:13; 
    unsigned sd_card_type	:16; 
 
    unsigned protected_size	:32; 
 
#if 0 /* only 64 of 512 bits used */ 
    unsigned reserved_447_312	:136; /* illustrative..not for compile! */ 
    unsigned reserved_311_0	:312; /* illustrative..not for compile! */ 
#endif 
} SD_STATUS; 
 
typedef struct { /* ref. p.61..SD Physical Layer */ 
    unsigned card_ready		:1; 
    unsigned reserved_30_24	:7; 
    unsigned vdd35_36		:1; 
    unsigned vdd34_35		:1; 
    unsigned vdd33_34		:1; 
    unsigned vdd32_33		:1; 
    unsigned vdd31_32		:1; 
    unsigned vdd30_31		:1; 
    unsigned vdd29_30		:1; 
    unsigned vdd28_29		:1; 
    unsigned vdd27_28		:1; 
    unsigned vdd26_27		:1; 
    unsigned vdd25_26		:1; 
    unsigned vdd24_25		:1; 
    unsigned vdd23_24		:1; 
    unsigned vdd22_23		:1; 
    unsigned vdd21_22		:1; 
    unsigned vdd20_21		:1; 
    unsigned vdd19_20		:1; 
    unsigned vdd18_19		:1; 
    unsigned vdd17_18		:1; 
    unsigned vdd16_17		:1; 
    unsigned reserved_3_0	:4; 
} SD_OCR; 
 
typedef struct { /* ref. p.62-63..SD Physical Layer */ 
    unsigned mid		:8; 
    unsigned oid_15_8		:8; /* oid[1] ascii..2B */ 
    unsigned oid_7_0		:8; /* oid[0] ascii */ 
    unsigned pnm_39_32		:8; /* pnm[4] ascii..5B */ 
 
    unsigned pnm_31_24		:8; /* pnm[3] ascii */  
    unsigned pnm_23_16		:8; /* pnm[2] ascii */   
    unsigned pnm_15_8		:8; /* pnm[1] ascii */   
    unsigned pnm_7_0		:8; /* pnm[0] ascii */   
 
    unsigned prv		:8; /* BCD */ 
    unsigned psn_31_8		:24; /* psn crossed DW boundary */ 
 
    unsigned psn_7_0		:8; /* psn crossed DW boundary */ 
    unsigned reserved_23_20	:4; 
    unsigned mdt		:12;/* [y[11:4] | m[3:0]]..y: 0->2000; m: 1->January */ 
    unsigned crc		:7; 
    unsigned reserved_0		:1;     
} SD_CID; 
 
typedef struct { /* ref. p.63-71..SD Physical Layer */ 
    unsigned version		:2;  
    unsigned reserved_125_119	:7;  
    unsigned taac_value		:4; /* ref. p.65 */  
    unsigned taac_unit		:3; /* ref. p.65 */  
    unsigned nsac		:8; /* N*100 clock cycles */ 
    unsigned reserved_103	:1;  
    unsigned tran_spd_value	:4; /* ref. p.65 */  
    unsigned tran_spd_unit	:3; /* ref. p.65 */  
 
    unsigned ccc		:12; /* supported command classes */ 
    unsigned rd_blk_len		:4; 
    unsigned rd_blk_len_partial	:1; 
    unsigned wr_blk_misalign	:1; 
    unsigned rd_blk_misalign	:1; 
    unsigned dsr_imp		:1; 
    unsigned reserved_75_74	:2; 
    unsigned c_size_11_2	:10; /* c_size crossed DW boundary */ 
 
    unsigned c_size_1_0		:2; /* c_size crossed DW boundary */ 
    unsigned vdd_r_curr_min	:3; 
    unsigned vdd_r_curr_max	:3; 
    unsigned vdd_w_curr_min	:3; 
    unsigned vdd_w_curr_max	:3; 
    unsigned c_size_mult	:3; 
    unsigned erase_blk_en	:1; 
    unsigned sector_size	:7; 
    unsigned wp_grp_size	:7; 
 
    unsigned wp_grp_enable	:1; 
    unsigned reserved_30_29	:2; 
    unsigned r2w_factor		:3; 
    unsigned wr_blk_len		:4; 
    unsigned wr_blk_partial	:1; 
    unsigned reserved_20_16	:5; 
    unsigned file_format_grp	:1; 
    unsigned copy		:1; 
    unsigned perm_wr_protect	:1; 
    unsigned tmp_wr_protect	:1; 
    unsigned file_format	:2; 
    unsigned reserved_9_8	:2; 
    unsigned crc		:7; 
    unsigned reserved_0		:1; 
} SD_CSD; 
 
typedef struct { /* ref. p.72-73..SD Physical Layer */ 
    unsigned scr_struct		:4; 
    unsigned sd_spec		:4; 
    unsigned dat_stat_aft_erase	:1; 
    unsigned sd_security	:3; 
    unsigned sd_bus_widths	:4; 
    unsigned reserved_47_32	:16; 
 
#if 0 /* use 32 of 64 bits */ 
    unsigned reserved_31_0	:32;  
#endif 
} SD_SCR; 
 
typedef struct {  
    unsigned com_state		:4; /* value <= 0xf */ 
    unsigned response_recv	:1; 
    unsigned response_expected	:3; 
    unsigned cmd		:8; 
    unsigned cur_blk_size	:4; /* size = 2^value (bytes) */  
    unsigned data_width		:1; /* 0:1bit, 1:4bits*/ 
    unsigned use_data		:2; /* 1:write, 2:read, 0:no data */ 
    unsigned cmd_sent 		:1; /* 1:cmd completed */  
    unsigned retry_cnt		:8; 
 
    uint wait_nclk; 
    uint arg; 
    uint data_cnt; 
    uint data_len;             /* length to be xmited in bytes */ 
    uint *rd_dest_ptr; 
    int  *wr_src_ptr; 
    int result;               /* 0: success, -1: failed */ 
#if SD_CHECK_RECV_CRC 
    uint crc7_err_cnt; 
    uint crc16_err_cnt; 
#endif 
} SD_XMIT_STATUS; 
 
typedef struct {  
    uchar cmd; 
    uint  arg; 
} SD_CMD_Q; 
 
typedef struct {  
    uchar type; 
    uchar inserted; 
    uint n_wr_max; /* min: 2 clk cycles */ 
    uint n_ac_max; /* min: 2 clk cycles */ 
    uint capacity; /* in Bytes */ 
} SD_CINFO; 
 
 
/************************************************************************** 
 * Public SD variables 
 **************************************************************************/ 
EXPORT SD_CINFO SD_card_info; 
EXPORT SD_XMIT_STATUS SD_xmit_info; 
 
/************************************************************************** 
 * Public SD functions 
 **************************************************************************/ 
EXPORT void SD_service(void); 
EXPORT int SD_identify_device(void); 
EXPORT void SD_init(void); 
EXPORT void SD_enable_io(int); 
EXPORT void SD_reset(void); 
EXPORT int SD_set_bus_width(int); 
EXPORT int SD_read_blk(int, int, uint *, int); 
EXPORT int SD_read_nblk(int, int, uint *, int); 
EXPORT int SD_send_cmd(int, uint, int); 
EXPORT int SD_send_acmd(int, uint, int); 
EXPORT int SD_clk_restricted_cmd(int, uint); 
EXPORT int SD_get_next_cmd(void); 
EXPORT unsigned int SD_boot_setup(void); 
EXPORT int SD_read_sector_lba(short *, int, int, int); 
 
#endif /*  _SD_MEM_H_ */