www.pudn.com > RL78_G14-Demo.rar > G14_AD.map, change:2013-04-25,size:6284b


 
 
 
78K0R Linker V1.61                            Date: 6 Apr 2013 Page:   1 
 
Command:   -yD:\Install\Renesas Electronics\CubeSuite+\Device\RL78\Devic 
           efile -_msgoff -oDefaultBuild\G14_AD.lmf -gi00000000000000000 
           000h -go84h,7E00h,512 -gb0FFFFF8H -mi0 -s -pDefaultBuild\G14_ 
           AD.map D:\Install\Renesas Electronics\CubeSuite+\CA78K0R\V1.4 
           1\lib78k0r\s0rll.rel DefaultBuild\main.rel -bcl78m -bcl78mf - 
           iD:\Install\Renesas Electronics\CubeSuite+\CA78K0R\V1.41\lib7 
           8k0r 
Para-file: 
Out-file:  DefaultBuild\G14_AD.lmf 
Map-file:  DefaultBuild\G14_AD.map 
Direc-file: 
Directive: 
 
 
*** Link information *** 
 
    28 output segment(s) 
  5A8H byte(s) real data 
   216 symbol(s) defined 
 
 
*** Memory map *** 
 
 
  SPACE=REGULAR 
 
  MEMORY=ROM 
  BASE ADDRESS=00000H   SIZE=08000H 
         OUTPUT   INPUT    INPUT      BASE      SIZE 
         SEGMENT  SEGMENT  MODULE     ADDRESS 
         @@VECT00                     00000H    00002H  CSEG AT 
                  @@VECT00 @cstart    00000H    00002H 
         @@CNST                       00002H    00000H  CSEG UNITP 
                  @@CNST   @cstart    00002H    00000H 
                  @@CNST   main       00002H    00000H 
         @@CNSTL                      00002H    00000H  CSEG PAGE64KP 
                  @@CNSTL  @cstart    00002H    00000H 
         @@CNSTL                      00002H    00000H  CSEG PAGE64KP 
                  @@CNSTL  main       00002H    00000H 
         @@RLINIT                     00002H    00000H  CSEG UNIT64KP 
                  @@RLINIT @cstart    00002H    00000H 
                  @@RLINIT main       00002H    00000H 
                  @@RLINIT @rom       00002H    00000H 
         @@R_INIS                     00002H    00000H  CSEG UNIT64KP 
                  @@R_INIS @cstart    00002H    00000H 
                  @@R_INIS main       00002H    00000H 
                  @@R_INIS @rom       00002H    00000H 
         @@CALT                       00002H    00000H  CSEG 
                  @@CALT   @cstart    00002H    00000H 
                  @@CALT   main       00002H    00000H 
         ??NMIROM                     00002H    00002H  CSEG 
         @@R_INIT                     00004H    00014H  CSEG UNIT64KP 
                  @@R_INIT @cstart    00004H    00000H 
                  @@R_INIT main       00004H    00014H 
                  @@R_INIT @rom       00018H    00000H 
* gap *                               00018H    0001CH 
         @@VECT34                     00034H    00002H  CSEG AT 
                  @@VECT34 main       00034H    00002H 
* gap *                               00036H    0008AH 
         ?CSEGOB0                     000C0H    00004H  CSEG OPT_BYTE 
         @@CODE                       000C4H    00000H  CSEG BASE 
                  @@CODE   main       000C4H    00000H 
         ?CSEGSI                      000C4H    0000AH  CSEG 
         ?OCDSTAD                     000CEH    0000AH  CSEG 
         @@LCODE                      000D8H    00192H  CSEG BASE 
                  @@LCODE  @cstart    000D8H    000ACH 
                  @@LCODE  @lmul      00184H    00021H 
                  @@LCODE  @isdiv     001A5H    00022H 
                  @@LCODE  @iudiv     001C7H    00010H 
                  @@LCODE  @lsdiv     001D7H    00039H 
                  @@LCODE  @ludiv     00210H    00027H 
                  @@LCODE  @isrem     00237H    00021H 
                  @@LCODE  @iurem     00258H    00012H 
         @@BASE                       0026AH    00030H  CSEG BASE 
                  @@BASE   main       0026AH    00030H 
         @@CODEL                      0029AH    00197H  CSEG 
                  @@CODEL  main       0029AH    00197H 
         @@LCODEL                     00431H    0001DH  CSEG 
                  @@LCODEL @hdwinit   00431H    00001H 
                  @@LCODEL exit       00432H    0001CH 
* gap *                               0044EH    079B2H 
         ??OCDROM                     07E00H    00200H  CSEG 
 
  MEMORY=RAM 
  BASE ADDRESS=FEF00H   SIZE=01100H 
         OUTPUT   INPUT    INPUT      BASE      SIZE 
         SEGMENT  SEGMENT  MODULE     ADDRESS 
         @@DATA                       FEF00H    000BAH  DSEG BASEP 
                  @@DATA   @cstart    FEF00H    000BAH 
                  @@DATA   main       FEFBAH    00000H 
                  @@DATA   @rom       FEFBAH    00000H 
         @@INIT                       FEFBAH    00014H  DSEG BASEP 
                  @@INIT   @cstart    FEFBAH    00000H 
                  @@INIT   main       FEFBAH    00014H 
                  @@INIT   @rom       FEFCEH    00000H 
         @@INIS                       FEFCEH    00000H  DSEG UNITP 
                  @@INIS   @cstart    FEFCEH    00000H 
                  @@INIS   main       FEFCEH    00000H 
                  @@INIS   @rom       FEFCEH    00000H 
         @@DATS                       FEFCEH    00000H  DSEG UNITP 
                  @@DATS   @cstart    FEFCEH    00000H 
                  @@DATS   main       FEFCEH    00000H 
                  @@DATS   @rom       FEFCEH    00000H 
         @@INITL                      FEFCEH    00000H  DSEG UNIT64KP 
                  @@INITL  @cstart    FEFCEH    00000H 
                  @@INITL  main       FEFCEH    00000H 
                  @@INITL  @rom       FEFCEH    00000H 
         @@DATAL                      FEFCEH    00000H  DSEG UNIT64KP 
                  @@DATAL  @cstart    FEFCEH    00000H 
                  @@DATAL  main       FEFCEH    00000H 
                  @@DATAL  @rom       FEFCEH    00000H 
         @@BITS                       FEFCEH    00000H  BSEG 
                  @@BITS   @cstart    FEFCEH.0  00000H.0 
                  @@BITS   main       FEFCEH.0  00000H.0 
* gap *                               FEFCEH    00F06H 
         @@SEGREG                     FFED4H    00004H  DSEG AT 
                  @@SEGREG @SEGREG    FFED4H    00004H 
         @@RTARG0                     FFED8H    00008H  DSEG AT 
                  @@RTARG0 @RTARG0    FFED8H    00008H 
* gap *                               FFEE0H    00020H 
* gap (Not Free Area) *               FFF00H    00100H 
 
 
 Target chip : R5F104LC 
 Device file : V1.20