www.pudn.com > Dm642_Encoder.rar > C64_EMIF.C

//#include  
#include "intr.h"  
#include  
 
#define MEM_CE0A  0x80000000 
#define MEM_TEST  0x80000004 
#define MEM_CE1A  0x90000000 
#define MEM_CE3A  0xB0000000 
 
init_emif() 
{ 
 
#define EMIFA_GCTL       0x01800000 
#define EMIFA_CE1        0x01800004 
#define EMIFA_CE0        0x01800008 
#define EMIFA_CE2        0x01800010 
#define EMIFA_CE3        0x01800014 
#define EMIFA_SDRAMCTL   0x01800018 
#define EMIFA_SDRAMREF   0x0180001c 
#define EMIFA_SDRAMEXT   0x01800020 
#define EMIFA_CE1SECCTL  0x01800044 
#define EMIFA_CE0SECCTL  0x01800048 
#define EMIFA_CE2SECCTL  0x01800050 
#define EMIFA_CE3SECCTL  0x01800054 
 
#define EMIFB_GCTL       0x01A80000 
#define EMIFB_CE1        0x01A80004 
#define EMIFB_CE0        0x01A80008 
#define EMIFB_CE2        0x01A80010 
#define EMIFB_CE3        0x01A80014 
#define EMIFB_SDRAMCTL   0x01A80018 
#define EMIFB_SDRAMREF   0x01A8001c 
#define EMIFB_SDRAMEXT   0x01A80020 
#define EMIFB_CE1SECCTL  0x01A80044 
#define EMIFB_CE0SECCTL  0x01A80048 
#define EMIFB_CE2SECCTL  0x01A80050 
#define EMIFB_CE3SECCTL  0x01A80054 
// Put your memory system initialization here    
 
	*(int *)EMIFA_GCTL     = 0x000827fc;  
	 
	///EMIFA CE0 SDRAM 
	*(int *)EMIFA_CE0      = 0x0000c0e0; 
	*(int *)EMIFA_CE1      = 0x3233c8c3;//*0x2222c8c2;/*0x111104c1*/ 
	*(int *)EMIFA_CE2      = 0x1111ffc3; 
	*(int *)EMIFA_CE3      = 0x111104c1;//0x2222c8c2;//0x1111c1c1;//0x3233c8c3;/*0x2222c8c2;//ffffffc3;//2222c8c2;*/ 
	*(int *)EMIFA_SDRAMCTL = 0x47116000; 
	*(int *)EMIFA_SDRAMREF = 0x00000600; 
	*(int *)EMIFA_SDRAMEXT = 0x00054549; 
//	*(int *)EMIFA_CE0SECCTL= 0x2 
	 
	*(int *)EMIFB_GCTL     = 0x000827d4;  
		///EMIFB CE0 CPLD, 8 Bit 
	*(int *)EMIFB_CE0      = 0xffffff0F; 
	///EMIFB CE1 FLASH, 8 Bit 
	*(int *)EMIFB_CE1      = 0x4aa2e603; 
} 
 
initgpio() 
{   
#define GPEN             0x01B00000 
#define GPDIR            0x01B00004 
#define GPVAL            0x01B00008 
#define GPDH             0x01B00010 
#define GPHM             0x01B00014 
#define GPDL             0x01B00018 
#define GPLM             0x01B0001c 
#define GPGC             0x01B00020 
#define GPPOL            0x01B00024 
	*(int*)GPEN=0x00f9; 
	*(int*)GPDIR=0x00000040; 
	return; 
} 
void Delay() 
{ 
    long i,j=0,k;  
    for (i=0;i<=10;i++) 
    { 
      for  (k=0;k<=100;k++) 
        { 
        } 
    }      
} 
 
void main(void) 
{      
    int i=0,k; 
    int *p,*p1; 
    initgpio(); 
    init_emif(); 
    p=(int *)0xb0000000; 
    p1=(int *)0xb0200000; 
    while(1) 
	{ 
//	Delay(); 
	*p=i; 
	*p1=i; 
	p++; 
	p1++; 
	i++; 
	}   
}