www.pudn.com > DE2_TV.rar > MAC_3.v

module MAC_3 (	iDA_0,iDA_1,iDA_2, 
				iPA_0,iPA_1,iPA_2, 
				oDATA,iRESET,iCLK); 
 
	input	[7:0] iDA_0,iDA_1,iDA_2; 
	input	[17:0] iPA_2,iPA_1,iPA_0; 
	output	[27:0] oDATA; 
	input	iRESET,iCLK; 
 
	altmult_add	ALTMULT_ADD_component ( 
				.dataa ({iDA_2,iDA_1,iDA_0}), 
				.datab ({iPA_2,iPA_1,iPA_0}), 
				.clock0 (iCLK), 
				.aclr3 (iRESET), 
				.result (oDATA) 
				); 
	defparam 
		ALTMULT_ADD_component.input_register_b2 = "CLOCK0", 
		ALTMULT_ADD_component.input_register_a1 = "CLOCK0", 
		ALTMULT_ADD_component.multiplier_register0 = "CLOCK0", 
		ALTMULT_ADD_component.signed_pipeline_aclr_b = "ACLR3", 
		ALTMULT_ADD_component.input_register_a2 = "CLOCK0", 
		ALTMULT_ADD_component.multiplier_register1 = "CLOCK0", 
		ALTMULT_ADD_component.addnsub_multiplier_pipeline_aclr1 = "ACLR3", 
		ALTMULT_ADD_component.multiplier_register2 = "CLOCK0", 
		ALTMULT_ADD_component.signed_register_a = "UNREGISTERED", 
		ALTMULT_ADD_component.number_of_multipliers = 3, 
		ALTMULT_ADD_component.multiplier_aclr0 = "ACLR3", 
		ALTMULT_ADD_component.signed_register_b = "UNREGISTERED", 
		ALTMULT_ADD_component.lpm_type = "altmult_add", 
		ALTMULT_ADD_component.multiplier_aclr1 = "ACLR3", 
		ALTMULT_ADD_component.input_aclr_b0 = "ACLR3", 
		ALTMULT_ADD_component.output_register = "CLOCK0", 
		ALTMULT_ADD_component.width_result = 28, 
		ALTMULT_ADD_component.representation_a = "UNSIGNED", 
		ALTMULT_ADD_component.signed_pipeline_register_a = "CLOCK0", 
		ALTMULT_ADD_component.input_source_b0 = "DATAB", 
		ALTMULT_ADD_component.multiplier_aclr2 = "ACLR3", 
		ALTMULT_ADD_component.input_aclr_b1 = "ACLR3", 
		ALTMULT_ADD_component.input_aclr_a0 = "ACLR3", 
		ALTMULT_ADD_component.addnsub_multiplier_register1 = "UNREGISTERED", 
		ALTMULT_ADD_component.representation_b = "SIGNED", 
		ALTMULT_ADD_component.signed_pipeline_register_b = "CLOCK0", 
		ALTMULT_ADD_component.input_source_b1 = "DATAB", 
		ALTMULT_ADD_component.input_source_a0 = "DATAA", 
		ALTMULT_ADD_component.input_aclr_b2 = "ACLR3", 
		ALTMULT_ADD_component.input_aclr_a1 = "ACLR3", 
//		ALTMULT_ADD_component.dedicated_multiplier_circuitry = "AUTO", 
		ALTMULT_ADD_component.dedicated_multiplier_circuitry = "NO", 
		ALTMULT_ADD_component.input_source_b2 = "DATAB", 
		ALTMULT_ADD_component.input_source_a1 = "DATAA", 
		ALTMULT_ADD_component.input_aclr_a2 = "ACLR3", 
		ALTMULT_ADD_component.output_aclr = "ACLR3", 
		ALTMULT_ADD_component.input_source_a2 = "DATAA", 
		ALTMULT_ADD_component.intended_device_family = "Stratix II", 
		ALTMULT_ADD_component.addnsub_multiplier_pipeline_register1 = "CLOCK0", 
		ALTMULT_ADD_component.width_a = 8, 
		ALTMULT_ADD_component.input_register_b0 = "CLOCK0", 
		ALTMULT_ADD_component.width_b = 18, 
		ALTMULT_ADD_component.input_register_b1 = "CLOCK0", 
		ALTMULT_ADD_component.input_register_a0 = "CLOCK0", 
		ALTMULT_ADD_component.multiplier1_direction = "ADD", 
		ALTMULT_ADD_component.signed_pipeline_aclr_a = "ACLR3"; 
 
endmodule