www.pudn.com > dm642video-driver.rar > evmdm642_vdisparamsSVGA.c

/* 
 *  Copyright 2003 by Texas Instruments Incorporated. 
 *  All rights reserved. Property of Texas Instruments Incorporated. 
 *  Restricted rights to use, duplicate or disclose this code are 
 *  granted through contract. 
 *   
 */ 
/* "@(#) DDK 1.10.00.21 06-26-03 (ddk-b10)" */ 
#include  
#include  
#include   
#include  
 
#include "evmdm642_vdisparams.h" 
 
#define LINE_SZ   800 
#define NUM_LINES 600 
 
VPORTDIS_Params EVMDM642_vDisParamsChan = { 
    VPORT_MODE_RAW_16BIT, /* dmode:3       */ 
    VPORT_FLDOP_PROGRESSIVE,/* fldOp:3       */ 
 
    VPORT_SCALING_DISABLE,     /* scale:1       */     
    VPORT_RESMPL_DISABLE,      /* resmpl:1      */       
    VPORTDIS_DEFVAL_ENABLE,    /* defValEn:1    */ 
    VPORTDIS_BPK_10BIT_NORMAL, /*bpk10Bit:1 */ 
     
    VPORTDIS_VCTL1_HSYNC,  /* vctl1Config:2 */ 
    VPORTDIS_VCTL2_VSYNC,  /* vctl2Config:2 */ 
    VPORTDIS_VCTL3_CBLNK,  /* vctl3Config:1 */ 
    VPORTDIS_EXC_DISABLE,  /* extCtl:3      */ 
                
    1056,                   /* frmHSize */ 
    628,                   /* frmVSize */ 
 
    0,                     /* imgHOffsetFld1 */ 
    0,                     /* imgVOffsetFld1 */ 
    LINE_SZ,               /* imgHSizeFld1   */ 
    NUM_LINES,             /* imgVSizeFld1   */ 
     
    0,                     /* imgHOffsetFld2 */ 
    0,                     /* imgVOffsetFld2 */ 
    0,                     /* imgHSizeFld2   */ 
    0,                     /* imgVSizeFld2   */ 
 
    800,                   /* hBlnkStart      */                     
    0,                     /* hBlnkStop       */                     
     
    0,                     /* vBlnkXStartFld1 */                     
    1,                     /* vBlnkYStartFld1 */                     
    0,                     /* vBlnkXStopFld1  */                     
    29,                    /* vBlnkYStopFld1  */                     
     
    0,                     /* vBlnkXStartFld2 */                     
    0,                     /* vBlnkYStartFld2 */                     
    0,                     /* vBlnkXStopFld2  */                     
    0,                     /* vBlnkYStopFld2  */                     
     
    0,                     /* xStartFld1 */                          
    1,                     /* yStartFld1 */                          
     
    0,                     /* xStartFld2 */                          
    0,                     /* yStartFld2 */                          
 
    840-3,                 /* hSyncStart */                          
    968-3,                     /* hSyncStop  */                          
 
    840-3,                 /* vSyncXStartFld1 */                     
    2,                     /* vSyncYStartFld1 */                     
    840-3,                 /* vSyncXStopFld1  */                     
    6,                     /* vSyncYStopFld1  */                     
 
    0,                     /* vSyncXStartFld2 */                     
    0,                     /* vSyncYStartFld2 */                     
    0,                     /* vSyncXStopFld2  */                     
    0,                     /* vSyncYStopFld2  */                     
 
    0x10,                   /* yClipLow        */                     
    0xf0,                   /* yClipHigh       */                     
     
    0x10,                   /* cClipLow        */                     
    0xf0,                   /* cClipHigh       */                     
     
    0x0,                    /*VPDIS_DefVal     */                     
    0x0, 
    0x0, 
 
    VPORTDIS_RGBX_DISABLE,  /*rawPk_3_4 disable raw 3/4 packing for RGB output*/ 
    1,                     /* incPix, for raw mode only */           
    (LINE_SZ>>3),          /*thrld     */ 
 
    3,                     /*numFrmBufs*/ 
    128,                     /*alignment */ 
    VPORT_FLDS_MERGED,     /*mergeFlds */ 
    NULL,                  /*segId     */             
    EDMA_OPT_PRI_HIGH,     /*edmaPri   */ 
    8                      /* irqId    */     
}; 
 
 
VPORT_PortParams EVMDM642_vDisParamsPort = { 
    FALSE,                      /*  enableDualChan;     */  
    VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 1 polarity    */ 
    VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 2 polarity    */ 
    VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 3 polarity    */ 
    &SAA7105_Fxns, 
    INV, 
};     
           
SAA7105_ConfParams EVMDM642_vDisParamsSAA7105 = { 
  SAA7105_AFMT_RGB, 
  SAA7105_MODE_SVGA, 
  SAA7105_IFMT_RGB565, 
  TRUE, 
  FALSE, 
  INV,                   /*handleI2C */ 
};