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--com9s.vhd	9's generator 
library ieee ; 
use ieee.std_logic_1164.all; 
entity com9s is 
port( 
  a : in std_logic_vector(3 downto 0);--輸入 
  sel : in std_logic;--取補致能，1=>取補，0=>不變 
  z : out std_logic_vector(3 downto 0));--取9補輸出 
end com9s; 
architecture behavior of com9s is  
begin  
  process (sel,a) 
  begin 
    if sel='1' then 
      z(3)<=(not a(3)) and (not a(2)) and (not a(1));                   
      z(2)<=a(2) xor a(1); 
      z(1)<=a(1); 
      z(0)<=not a(0); 
    else    
      z<=a; 
    end if; 
  end process; 
end behavior;