www.pudn.com > vXworksBSPfors3c44b0.rar > s3c44b0x.h
/* s3c44b0x.h - header for Samsung s3c44b0x with ARM7 core */
/*
modification history
--------------------
01o,23jul04,a_m BSP定制 for 多刃剑开发板
*/
#ifndef __INCs3c44b0xh
#define __INCs3c44b0xh
#ifdef __cplusplus
extern "C" {
#endif
/* System */
#define S3C44B0X_SYSCFG (0x1c00000)
/* Cache */
#define S3C44B0X_NCACHBE0 (0x1c00004)
#define S3C44B0X_NCACHBE1 (0x1c00008)
/* Bus control */
#define S3C44B0X_SBUSCON (0x1c40000)
/* Memory control */
#define S3C44B0X_BWSCON (0x1c80000)
#define S3C44B0X_BANKCON0 (0x1c80004)
#define S3C44B0X_BANKCON1 (0x1c80008)
#define S3C44B0X_BANKCON2 (0x1c8000c)
#define S3C44B0X_BANKCON3 (0x1c80010)
#define S3C44B0X_BANKCON4 (0x1c80014)
#define S3C44B0X_BANKCON5 (0x1c80018)
#define S3C44B0X_BANKCON6 (0x1c8001c)
#define S3C44B0X_BANKCON7 (0x1c80020)
#define S3C44B0X_REFRESH (0x1c80024)
#define S3C44B0X_BANKSIZE (0x1c80028)
#define S3C44B0X_MRSRB6 (0x1c8002c)
#define S3C44B0X_MRSRB7 (0x1c80030)
/* Clock & Power management */
#define S3C44B0X_PLLCON (0x1d80000)
#define S3C44B0X_CLKCON (0x1d80004)
#define S3C44B0X_CLKSLOW (0x1d80008)
#define S3C44B0X_LOCKTIME (0x1d8000c)
/* Interrupt */
#define S3C44B0X_INTCON (0x1e00000)
#define S3C44B0X_INTPEND (0x1e00004)
#define S3C44B0X_INTMODE (0x1e00008)
#define S3C44B0X_INTMASK (0x1e0000c)
#define S3C44B0X_INTNUMLEVELS 26
#define S3C44B0X_INTMASK_VAL 0x03ffffff
#define S3C44B0X_INTMODEIRQ 0x00
#define S3C44B0X_INTENB S3C44B0X_INTMASK
#define S3C44B0X_INTDIS S3C44B0X_INTMASK
#define S3C44B0X_I_PSLV (0x1e00010)
#define S3C44B0X_I_PMST (0x1e00014)
#define S3C44B0X_I_CSLV (0x1e00018)
#define S3C44B0X_I_CMST (0x1e0001c)
#define S3C44B0X_I_ISPR (0x1e00020)
#define S3C44B0X_I_ISPC (0x1e00024)
#define S3C44B0X_F_ISPR (0x1e00038)
#define S3C44B0X_F_ISPC (0x1e0003c)
/* WATCHDOG */
#define S3C44B0X_WTCON (0x1d30000)
#define S3C44B0X_WTDAT (0x1d30004)
#define S3C44B0X_WTCNT (0x1d30008)
/* definitions for the UART */
#define SERIAL_A_BASE_ADR (0x1d00000)/* UART A base address */
#define SERIAL_B_BASE_ADR (0x1d04000)/* UART B base address */
/* I/O PORT */
/* I/O PORT */
#define rPCONA (*(volatile unsigned *)0x1d20000)
#define rPDATA (*(volatile unsigned *)0x1d20004)
#define rPCONB (*(volatile unsigned *)0x1d20008)
#define rPDATB (*(volatile unsigned *)0x1d2000c)
#define rPCONC (*(volatile unsigned *)0x1d20010)
#define rPDATC (*(volatile unsigned *)0x1d20014)
#define rPUPC (*(volatile unsigned *)0x1d20018)
#define rPCOND (*(volatile unsigned *)0x1d2001c)
#define rPDATD (*(volatile unsigned *)0x1d20020)
#define rPUPD (*(volatile unsigned *)0x1d20024)
#define rPCONE (*(volatile unsigned *)0x1d20028)
#define rPDATE (*(volatile unsigned *)0x1d2002c)
#define rPUPE (*(volatile unsigned *)0x1d20030)
#define rPCONF (*(volatile unsigned *)0x1d20034)
#define rPDATF (*(volatile unsigned *)0x1d20038)
#define rPUPF (*(volatile unsigned *)0x1d2003c)
#define rPCONG (*(volatile unsigned *)0x1d20040)
#define rPDATG (*(volatile unsigned *)0x1d20044)
#define rPUPG (*(volatile unsigned *)0x1d20048)
#define rSPUCR (*(volatile unsigned *)0x1d2004c)
#define rEXTINT (*(volatile unsigned *)0x1d20050)
#define rEXTINTPND (*(volatile unsigned *)0x1d20054)
#define NETBASE ((volatile unsigned char *)(0x6000000))
#define CPLDREG1 ((volatile unsigned char *)(0xa200000))
#define CPLDREG2 ((volatile unsigned char *)(0xa210000))
#define CPLDREG3 ((volatile unsigned char *)(0xa220000))
#define CPLDREG4 ((volatile unsigned char *)(0xa230000))
#define CPLDREG5 ((volatile unsigned char *)(0xa240000))
#define REG8(addr) *((volatile unsigned char * const) (addr))
#define REG16(addr) *((volatile unsigned short * const) (addr))
#define REG32(addr) *((volatile unsigned long * const) (addr))
#ifdef __cplusplus
}
#endif
#endif /* __INCs3c44b0xh */