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--************************************************************
--************************************************************
--*----------------------------------------------------------*
--*|Version :1.0 |
--*|Date of Last Revision :12/23/1998 |
--*----------------------------------------------------------*
--************************************************************
-- Copyright (C) 1999 Drey Enterprises Inc. All Rights Reserved.
--************************************************************
-- Warning: This file is protected by Federal Copyright Law,
-- with all rights reserved. It is unlawful to reproduce
-- any parts of this file, in any form, without expressed
-- written permission from Drey Enterprises Inc. This Copyright
-- is actively enforced.
--************************************************************
--************************************************************
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
entity rad2_romaddr_cmpt is
port(
N_select :in std_logic_vector(2 downto 0);
iteration :in std_logic_vector(3 downto 0);
rom_cntr :in std_logic_vector(6 downto 0);
rom_addr :out std_logic_vector(6 downto 0)
);
end rad2_romaddr_cmpt;
architecture structure of rad2_romaddr_cmpt is
signal new_iteration :std_logic_vector(3 downto 0);
signal offset :std_logic_vector(3 downto 0);
begin
process(N_select)
begin
case N_select is
when "000" => offset <= "0111";
when "001" => offset <= "0110";
when "010" => offset <= "0101";
when "011" => offset <= "0100";
when "100" => offset <= "0011";
when "101" => offset <= "0010";
when "110" => offset <= "0001";
when others => offset <= "0000";
end case;
end process;
new_iteration <= iteration + offset;
process(new_iteration,rom_cntr)
begin
case new_iteration is
when "0000" => rom_addr <= rom_cntr;
when "0001" => rom_addr <= rom_cntr(5 downto 0) & '0';
when "0010" => rom_addr <= rom_cntr(4 downto 0) & "00";
when "0011" => rom_addr <= rom_cntr(3 downto 0) & "000";
when "0100" => rom_addr <= rom_cntr(2 downto 0) & "0000";
when "0101" => rom_addr <= rom_cntr(1 downto 0) & "00000";
when "0110" => rom_addr <= rom_cntr(0) & "000000";
when others => rom_addr <= "0000000";
end case;
end process;
end structure;