www.pudn.com > JPEGMotion.rar > JPEGMAIN.asm, change:2004-11-04,size:34633b
;******************************************************************************
;* TMS320C6x C/C++ Codegen PC Version 4.36 *
;* Date/Time created: Thu Nov 04 18:17:30 2004 *
;******************************************************************************
;******************************************************************************
;* GLOBAL FILE PARAMETERS *
;* *
;* Architecture : TMS320C64xx *
;* Optimization : Enabled at level 3 *
;* Optimizing for : Speed *
;* Based on options: -o3, no -ms *
;* Endian : Little *
;* Interrupt Thrshld : Disabled *
;* Memory Model : Large *
;* Calls to RTS : Far *
;* Pipelining : Enabled *
;* Speculative Load : Enabled *
;* Memory Aliases : Presume not aliases (optimistic) *
;* Debug Info : No Debug Info *
;* *
;******************************************************************************
.asg A15, FP
.asg B14, DP
.asg B15, SP
.global $bss
; c:\ti\c6000\cgtools\bin\opt6x.exe -t -DI0 -v6400 -q -O3 C:\DOCUME~1\ADMINI~1\LOCALS~1\Temp\TI1456_2 C:\DOCUME~1\ADMINI~1\LOCALS~1\Temp\TI1456_5 -w C:/ti/boards/evmdm642/examples/Demojpeg_motionB/obj/
.sect ".text"
.global _main
;******************************************************************************
;* FUNCTION NAME: _main *
;* *
;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,B0,B1,B2,B3,B4,B5, *
;* B6,B7,B8,B9,B13,SP,A16,A17,A18,A19,A20,A21,A22, *
;* A23,A24,A25,A26,A27,A28,A29,A30,A31,B16,B17,B18, *
;* B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30, *
;* B31 *
;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,B0,B1,B2,B3,B4,B5, *
;* B6,B7,B8,B9,B13,SP,A16,A17,A18,A19,A20,A21,A22, *
;* A23,A24,A25,A26,A27,A28,A29,A30,A31,B16,B17,B18, *
;* B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30, *
;* B31 *
;* Local Frame Size : 8 Args + 0 Auto + 8 Save = 16 byte *
;******************************************************************************
_main:
;** --------------------------------------------------------------------------*
MVKL .S1 _EVMDM642_fpgaLoad,A3 ; |18|
MVKH .S1 _EVMDM642_fpgaLoad,A3 ; |18|
STW .D2T1 A10,*SP--(16) ; |16|
CALL .S2X A3 ; |18|
STW .D2T2 B13,*+SP(12) ; |16|
MV .L2 B3,B13 ; |16|
ADDKPC .S2 RL0,B3,0 ; |18|
ZERO .D1 A4 ; |18|
MVKH .S1 0x90040000,A4 ; |18|
RL0: ; CALL OCCURS ; |18|
MVKL .S1 _CSLDM642_LIB_,A3 ; |144|
MVKH .S1 _CSLDM642_LIB_,A3 ; |144|
NOP 1
CALL .S2X A3 ; |144|
ADDKPC .S2 RL1,B3,4 ; |144|
RL1: ; CALL OCCURS ; |144|
MVKL .S2 __CSL_init,B4 ; |156|
MVKH .S2 __CSL_init,B4 ; |156|
CALL .S2 B4 ; |156|
MVK .D1 0xffffffff,A4 ; |156|
ADDKPC .S2 RL2,B3,3 ; |156|
RL2: ; CALL OCCURS ; |156|
MVKL .S1 _CACHE_clean,A3 ; |21|
MVKH .S1 _CACHE_clean,A3 ; |21|
ZERO .S1 A6 ; |21|
CALL .S2X A3 ; |21|
ZERO .D2 B4 ; |21|
MVK .D1 0x1,A4 ; |21|
ADDKPC .S2 RL3,B3,2 ; |21|
RL3: ; CALL OCCURS ; |21|
MVKL .S1 _CACHE_setL2Mode,A3 ; |22|
MVKH .S1 _CACHE_setL2Mode,A3 ; |22|
MVK .D1 0x3,A4 ; |22|
CALL .S2X A3 ; |22|
ADDKPC .S2 RL4,B3,4 ; |22|
RL4: ; CALL OCCURS ; |22|
MVKL .S1 0x1848200,A3 ; |350|
MVKH .S1 0x1848200,A3 ; |350|
LDW .D1T1 *A3,A3 ; |350|
MVKL .S2 0x1848200,B4 ; |351|
MVKL .S2 0x1848200,B5 ; |350|
MVKH .S2 0x1848200,B5 ; |350|
MVKH .S2 0x1848200,B4 ; |351|
OR .D1 1,A3,A3 ; |350|
STW .D2T1 A3,*B5 ; |350|
LDW .D2T2 *B4,B4 ; |351|
NOP 4
AND .D2 1,B4,B0 ; |351|
[ B0] B .S1 L4 ; |351|
[!B0] MVKL .S1 0x1848200,A3 ; |351| (P) <0,0>
[!B0] MVKH .S1 0x1848200,A3 ; |351| (P) <0,1>
[!B0] LDW .D1T1 *A3,A4 ; |351| (P) <0,2> ^
|| [ B0] MVKL .S1 0x1848204,A3 ; |350|
[ B0] MVKH .S1 0x1848204,A3 ; |350|
[ B0] LDW .D1T1 *A3,A3 ; |350|
; BRANCH OCCURS ; |351|
;** --------------------------------------------------------------------------*
MVK .D2 0x1,B0
NOP 1
AND .D1 1,A4,A0 ; |351| (P) <0,7> ^
|| MVKL .S1 0x1848200,A3 ; |351| (P) <1,0>
;*----------------------------------------------------------------------------*
;* SOFTWARE PIPELINE INFORMATION
;*
;* Loop source line : 351
;* Loop closing brace source line : 351
;* Known Minimum Trip Count : 1
;* Known Max Trip Count Factor : 1
;* Loop Carried Dependency Bound(^) : 7
;* Unpartitioned Resource Bound : 2
;* Partitioned Resource Bound(*) : 2
;* Resource Partition:
;* A-side B-side
;* .L units 0 0
;* .S units 2* 1
;* .D units 1 0
;* .M units 0 0
;* .X cross paths 0 0
;* .T address paths 1 0
;* Long read paths 0 0
;* Long write paths 0 0
;* Logical ops (.LS) 0 0 (.L or .S unit)
;* Addition ops (.LSD) 1 1 (.L or .S or .D unit)
;* Bound(.L .S .LS) 1 1
;* Bound(.L .S .D .LS .LSD) 2* 1
;*
;* Searching for software pipeline schedule at ...
;* ii = 7 Schedule found with 3 iterations in parallel
;*
;* Register Usage Table:
;* +-----------------------------------------------------------------+
;* |AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA|BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB|
;* |00000000001111111111222222222233|00000000001111111111222222222233|
;* |01234567890123456789012345678901|01234567890123456789012345678901|
;* |--------------------------------+--------------------------------|
;* 0: |* ** |* |
;* 1: | ** |* |
;* 2: | * |* |
;* 3: | * |* |
;* 4: | * |* |
;* 5: | * |* |
;* 6: | * |* |
;* +-----------------------------------------------------------------+
;*
;* Done
;*
;* Loop is interruptible
;* Collapsed epilog stages : 2
;* Prolog not removed
;* Collapsed prolog stages : 0
;*
;* Minimum required memory pad : 0 bytes
;*
;* Minimum safe trip count : 1
;*----------------------------------------------------------------------------*
;* SETUP CODE
;*
;* MVK 0x1,B0
;* ZERO A4
;*
;* SINGLE SCHEDULED ITERATION
;*
;* C41:
;* 0 MVKL .S1 0x1848200,A3 ; |351|
;* 1 MVKH .S1 0x1848200,A3 ; |351|
;* 2 [ B0] LDW .D1T1 *A3,A4 ; |351| ^
;* 3 NOP 4
;* 7 AND .D1 1,A4,A0 ; |351| ^
;* 8 [ A0] ZERO .D2 B0 ; ^
;* 9 [ B0] B .S2 C41 ; |351|
;* 10 NOP 5
;* ; BRANCH OCCURS ; |351|
;*----------------------------------------------------------------------------*
L1: ; PIPED LOOP PROLOG
;** --------------------------------------------------------------------------*
L2: ; PIPED LOOP KERNEL
[ A0] ZERO .D2 B0 ; <0,8> ^
|| MVKH .S1 0x1848200,A3 ; |351| <1,1>
[ B0] BNOP .S2 L2,4 ; |351| <0,9>
|| [ B0] LDW .D1T1 *A3,A4 ; |351| <1,2> ^
AND .D1 1,A4,A0 ; |351| <1,7> ^
|| MVKL .S1 0x1848200,A3 ; |351| <2,0>
;** --------------------------------------------------------------------------*
L3: ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
MVKL .S1 0x1848204,A3 ; |350|
MVKH .S1 0x1848204,A3 ; |350|
LDW .D1T1 *A3,A3 ; |350|
;** --------------------------------------------------------------------------*
L4:
MVKL .S2 0x1848204,B5 ; |350|
MVKL .S2 0x1848204,B4 ; |351|
MVKH .S2 0x1848204,B5 ; |350|
MVKH .S2 0x1848204,B4 ; |351|
OR .D1 1,A3,A3 ; |350|
STW .D2T1 A3,*B5 ; |350|
LDW .D2T2 *B4,B4 ; |351|
NOP 4
AND .D2 1,B4,B0 ; |351|
[ B0] B .S1 L8 ; |351|
[ B0] MVKL .S2 _DAT_open,B5 ; |26|
|| [!B0] MVKL .S1 0x1848204,A3 ; |351| (P) <0,0>
[ B0] MVKH .S2 _DAT_open,B5 ; |26|
|| [!B0] MVKH .S1 0x1848204,A3 ; |351| (P) <0,1>
[!B0] LDW .D1T1 *A3,A4 ; |351| (P) <0,2> ^
NOP 2
; BRANCH OCCURS ; |351|
;** --------------------------------------------------------------------------*
MVK .D2 0x1,B0
MVKL .S1 0x1848204,A3 ; |351| (P) <1,0>
AND .D1 1,A4,A0 ; |351| (P) <0,7> ^
;*----------------------------------------------------------------------------*
;* SOFTWARE PIPELINE INFORMATION
;*
;* Loop source line : 351
;* Loop closing brace source line : 351
;* Known Minimum Trip Count : 1
;* Known Max Trip Count Factor : 1
;* Loop Carried Dependency Bound(^) : 7
;* Unpartitioned Resource Bound : 2
;* Partitioned Resource Bound(*) : 2
;* Resource Partition:
;* A-side B-side
;* .L units 0 0
;* .S units 2* 1
;* .D units 1 0
;* .M units 0 0
;* .X cross paths 0 0
;* .T address paths 1 0
;* Long read paths 0 0
;* Long write paths 0 0
;* Logical ops (.LS) 0 0 (.L or .S unit)
;* Addition ops (.LSD) 1 1 (.L or .S or .D unit)
;* Bound(.L .S .LS) 1 1
;* Bound(.L .S .D .LS .LSD) 2* 1
;*
;* Searching for software pipeline schedule at ...
;* ii = 7 Schedule found with 3 iterations in parallel
;*
;* Register Usage Table:
;* +-----------------------------------------------------------------+
;* |AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA|BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB|
;* |00000000001111111111222222222233|00000000001111111111222222222233|
;* |01234567890123456789012345678901|01234567890123456789012345678901|
;* |--------------------------------+--------------------------------|
;* 0: |* ** |* |
;* 1: | ** |* |
;* 2: | * |* |
;* 3: | * |* |
;* 4: | * |* |
;* 5: | * |* |
;* 6: | * |* |
;* +-----------------------------------------------------------------+
;*
;* Done
;*
;* Loop is interruptible
;* Collapsed epilog stages : 2
;* Prolog not removed
;* Collapsed prolog stages : 0
;*
;* Minimum required memory pad : 0 bytes
;*
;* Minimum safe trip count : 1
;*----------------------------------------------------------------------------*
;* SETUP CODE
;*
;* MVK 0x1,B0
;* ZERO A4
;*
;* SINGLE SCHEDULED ITERATION
;*
;* C19:
;* 0 MVKL .S1 0x1848204,A3 ; |351|
;* 1 MVKH .S1 0x1848204,A3 ; |351|
;* 2 [ B0] LDW .D1T1 *A3,A4 ; |351| ^
;* 3 NOP 4
;* 7 AND .D1 1,A4,A0 ; |351| ^
;* 8 [ A0] ZERO .D2 B0 ; ^
;* 9 [ B0] B .S2 C19 ; |351|
;* 10 NOP 5
;* ; BRANCH OCCURS ; |351|
;*----------------------------------------------------------------------------*
L5: ; PIPED LOOP PROLOG
;** --------------------------------------------------------------------------*
L6: ; PIPED LOOP KERNEL
[ A0] ZERO .D2 B0 ; <0,8> ^
|| MVKH .S1 0x1848204,A3 ; |351| <1,1>
[ B0] BNOP .S2 L6,4 ; |351| <0,9>
|| [ B0] LDW .D1T1 *A3,A4 ; |351| <1,2> ^
AND .D1 1,A4,A0 ; |351| <1,7> ^
|| MVKL .S1 0x1848204,A3 ; |351| <2,0>
;** --------------------------------------------------------------------------*
L7: ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
MVKL .S2 _DAT_open,B5 ; |26|
MVKH .S2 _DAT_open,B5 ; |26|
;** --------------------------------------------------------------------------*
L8:
CALL .S2 B5 ; |26|
ADDKPC .S2 RL5,B3,1 ; |26|
MVK .D1 0x1,A6 ; |26|
MVK .D2 0x3,B4 ; |26|
ZERO .S1 A4 ; |26|
RL5: ; CALL OCCURS ; |26|
MVKL .S2 0x184200c,B4 ; |368|
MVKH .S2 0x184200c,B4 ; |368|
LDW .D2T2 *B4,B4 ; |368|
MVKL .S1 0x184200c,A3 ; |368|
MVKH .S1 0x184200c,A3 ; |368|
ZERO .D1 A4 ; |360|
MVKH .S1 0x1840000,A4 ; |360|
MVKL .S2 0x1842004,B4 ; |364|
|| OR .D2 7,B4,B5 ; |368|
STW .D1T2 B5,*A3 ; |368|
|| MVKH .S2 0x1842004,B4 ; |364|
LDW .D2T2 *B4,B4 ; |364|
NOP 2
MVKL .S1 0x1842004,A3 ; |364|
MVKH .S1 0x1842004,A3 ; |364|
OR .D2 7,B4,B4 ; |364|
MVKL .S1 _ACPY2_6X1X_init,A3 ; |33|
|| STW .D1T2 B4,*A3 ; |364|
LDW .D1T1 *A4,A4 ; |360|
|| MVKH .S1 _ACPY2_6X1X_init,A3 ; |33|
ZERO .D2 B4 ; |360|
CALL .S2X A3 ; |33|
MVKH .S2 0x1840000,B4 ; |360|
ADDKPC .S2 RL6,B3,0 ; |33|
EXTU .S1 A4,3,3,A4 ; |360|
SET .S1 A4,29,29,A4 ; |360|
STW .D2T1 A4,*B4 ; |360|
RL6: ; CALL OCCURS ; |33|
MVKL .S1 _DMAN_init,A3 ; |34|
MVKH .S1 _DMAN_init,A3 ; |34|
NOP 1
CALL .S2X A3 ; |34|
ADDKPC .S2 RL7,B3,4 ; |34|
RL7: ; CALL OCCURS ; |34|
MVKL .S1 _DMAN_setup,A3 ; |35|
MVKH .S1 _DMAN_setup,A3 ; |35|
MVKL .S1 _intHeap,A4 ; |35|
MVKH .S1 _intHeap,A4 ; |35|
|| CALL .S2X A3 ; |35|
LDW .D1T1 *A4,A4 ; |35|
ADDKPC .S2 RL8,B3,3 ; |35|
RL8: ; CALL OCCURS ; |35|
MVKL .S2 _CHAN_init,B4 ; |38|
MVKH .S2 _CHAN_init,B4 ; |38|
CALL .S2 B4 ; |38|
ADDKPC .S2 RL9,B3,4 ; |38|
RL9: ; CALL OCCURS ; |38|
MVKL .S1 _ICC_init,A3 ; |39|
MVKH .S1 _ICC_init,A3 ; |39|
NOP 1
CALL .S2X A3 ; |39|
ADDKPC .S2 RL10,B3,4 ; |39|
RL10: ; CALL OCCURS ; |39|
MVKL .S1 _SCOM_init,A3 ; |40|
MVKH .S1 _SCOM_init,A3 ; |40|
NOP 1
CALL .S2X A3 ; |40|
ADDKPC .S2 RL11,B3,4 ; |40|
RL11: ; CALL OCCURS ; |40|
MVKL .S2 _intHeap,B4 ; |43|
MVKH .S2 _intHeap,B4 ; |43|
MVKL .S1 _CHAN_setup,A3 ; |43|
|| LDW .D2T2 *B4,B5 ; |43|
MVKL .S2 _extHeap,B4 ; |43|
|| MVKH .S1 _CHAN_setup,A3 ; |43|
MVKH .S2 _extHeap,B4 ; |43|
CALL .S2X A3 ; |43|
LDW .D2T2 *B4,B4 ; |43|
MV .D1X B5,A4 ; |43|
MVK .L2 0x1,B6 ; |43|
ZERO .S1 A8 ; |43|
ZERO .D2 B8 ; |43|
|| MV .D1X B5,A6 ; |43|
|| ADDKPC .S2 RL12,B3,0 ; |43|
RL12: ; CALL OCCURS ; |43|
MVKL .S1 _UTL_setLogs,A3 ; |46|
MVKH .S1 _UTL_setLogs,A3 ; |46|
MVKL .S1 _trace,A4 ; |46|
CALL .S2X A3 ; |46|
MVKH .S1 _trace,A4 ; |46|
MV .D1 A4,A6 ; |46|
MV .D2X A4,B6 ; |46|
MV .D2X A4,B4 ; |46|
ADDKPC .S2 RL13,B3,0 ; |46|
RL13: ; CALL OCCURS ; |46|
MVKL .S2 _tskVideoInputInit,B4 ; |48|
MVKH .S2 _tskVideoInputInit,B4 ; |48|
CALL .S2 B4 ; |48|
ADDKPC .S2 RL14,B3,4 ; |48|
RL14: ; CALL OCCURS ; |48|
MVKL .S2 _tskVideoOutputInit,B4 ; |49|
MVKH .S2 _tskVideoOutputInit,B4 ; |49|
CALL .S2 B4 ; |49|
ADDKPC .S2 RL15,B3,4 ; |49|
RL15: ; CALL OCCURS ; |49|
;** --------------------------------------------------------------------------*
MVKL .S2 _EVMDM642_rset,B5 ; |51|
MVKH .S2 _EVMDM642_rset,B5 ; |51|
CALL .S2 B5 ; |51|
MVK .S2 0x20,B4 ; |51|
ADDKPC .S2 RL16,B3,2 ; |51|
MVK .S1 0x10,A4 ; |51|
RL16: ; CALL OCCURS ; |51|
MVKL .S1 _EVMDM642_rset,A3 ; |52|
MVKH .S1 _EVMDM642_rset,A3 ; |52|
MVK .S1 0x10,A4 ; |52|
CALL .S2X A3 ; |52|
MVK .D2 0x8,B4 ; |52|
ADDKPC .S2 RL17,B3,3 ; |52|
RL17: ; CALL OCCURS ; |52|
MVKL .S2 _EVMDM642_rget,B4 ; |53|
MVKH .S2 _EVMDM642_rget,B4 ; |53|
CALL .S2 B4 ; |53|
MVK .S1 0x13,A4 ; |53|
ADDKPC .S2 RL18,B3,3 ; |53|
RL18: ; CALL OCCURS ; |53|
EXTU .S1 A4,25,31,A0 ; |53|
[ A0] BNOP .S1 L10,1 ; |53|
MVK .S1 0x40,A10 ; |53|
[ A0] MVKL .S1 _tskVideoInputStart,A3 ; |55|
[!A0] MVKL .S2 _EVMDM642_rget,B4 ; |53|
|| [ A0] MVKH .S1 _tskVideoInputStart,A3 ; |55|
[!A0] MVKH .S2 _EVMDM642_rget,B4 ; |53|
; BRANCH OCCURS ; |53|
;*----------------------------------------------------------------------------*
;* SOFTWARE PIPELINE INFORMATION
;* Disqualified loop: Loop contains a call
;*----------------------------------------------------------------------------*
L9:
CALL .S2 B4 ; |53|
ADDKPC .S2 RL19,B3,3 ; |53|
MVK .S1 0x13,A4 ; |53|
RL19: ; CALL OCCURS ; |53|
AND .D1 A10,A4,A0 ; |53|
[!A0] BNOP .S1 L9,2 ; |53|
[ A0] MVKL .S1 _tskVideoInputStart,A3 ; |55|
|| [!A0] MVKL .S2 _EVMDM642_rget,B4 ; |53|
[ A0] MVKH .S1 _tskVideoInputStart,A3 ; |55|
|| [!A0] MVKH .S2 _EVMDM642_rget,B4 ; |53|
NOP 1
; BRANCH OCCURS ; |53|
;** --------------------------------------------------------------------------*
L10:
CALL .S2X A3 ; |55|
ADDKPC .S2 RL20,B3,4 ; |55|
RL20: ; CALL OCCURS ; |55|
MVKL .S1 _tskVideoOutputStart,A3 ; |56|
MVKH .S1 _tskVideoOutputStart,A3 ; |56|
NOP 1
CALL .S2X A3 ; |56|
ADDKPC .S2 RL21,B3,4 ; |56|
RL21: ; CALL OCCURS ; |56|
MVKL .S1 _LOG_printf,A3 ; |57|
MVKL .S2 _UTL_logDebugHandle,B4 ; |57|
|| MVKH .S1 _LOG_printf,A3 ; |57|
MVKH .S2 _UTL_logDebugHandle,B4 ; |57|
CALL .S2X A3 ; |57|
LDW .D2T1 *B4,A4 ; |57|
MVKL .S2 SL1+0,B5 ; |57|
MVKH .S2 SL1+0,B5 ; |57|
STW .D2T2 B5,*+SP(4) ; |57|
ADDKPC .S2 RL22,B3,0 ; |57|
RL22: ; CALL OCCURS ; |57|
MVKL .S1 _tskProcessInit,A3 ; |59|
MVKH .S1 _tskProcessInit,A3 ; |59|
NOP 1
CALL .S2X A3 ; |59|
ADDKPC .S2 RL23,B3,4 ; |59|
RL23: ; CALL OCCURS ; |59|
MVKL .S1 _tskProcessStart,A3 ; |60|
MVKH .S1 _tskProcessStart,A3 ; |60|
NOP 1
CALL .S2X A3 ; |60|
ADDKPC .S2 RL24,B3,4 ; |60|
RL24: ; CALL OCCURS ; |60|
MVKL .S1 _LOG_printf,A3 ; |61|
MVKL .S2 _UTL_logDebugHandle,B4 ; |61|
|| MVKH .S1 _LOG_printf,A3 ; |61|
MVKH .S2 _UTL_logDebugHandle,B4 ; |61|
CALL .S2X A3 ; |61|
LDW .D2T1 *B4,A4 ; |61|
MVKL .S2 SL2+0,B5 ; |61|
MVKH .S2 SL2+0,B5 ; |61|
STW .D2T2 B5,*+SP(4) ; |61|
ADDKPC .S2 RL25,B3,0 ; |61|
RL25: ; CALL OCCURS ; |61|
MVKL .S2 _thrControlInit,B4 ; |63|
MVKH .S2 _thrControlInit,B4 ; |63|
CALL .S2 B4 ; |63|
ADDKPC .S2 RL26,B3,4 ; |63|
RL26: ; CALL OCCURS ; |63|
MVKL .S1 _thrControlStartup,A3 ; |64|
MVKH .S1 _thrControlStartup,A3 ; |64|
NOP 1
CALL .S2X A3 ; |64|
ADDKPC .S2 RL27,B3,4 ; |64|
RL27: ; CALL OCCURS ; |64|
MVKL .S1 _LOG_printf,A3 ; |65|
MVKH .S1 _LOG_printf,A3 ; |65|
MVKL .S1 _UTL_logDebugHandle,A4 ; |65|
CALL .S2X A3 ; |65|
|| MVKH .S1 _UTL_logDebugHandle,A4 ; |65|
LDW .D1T1 *A4,A4 ; |65|
MVKL .S2 SL3+0,B4 ; |65|
MVKH .S2 SL3+0,B4 ; |65|
ADDKPC .S2 RL28,B3,0 ; |65|
STW .D2T2 B4,*+SP(4) ; |65|
RL28: ; CALL OCCURS ; |65|
MVKL .S2 _SCOM_create,B5 ; |68|
MVKH .S2 _SCOM_create,B5 ; |68|
CALL .S2 B5 ; |68|
MVKL .S1 SL4+0,A4 ; |68|
ADDKPC .S2 RL29,B3,1 ; |68|
MVKH .S1 SL4+0,A4 ; |68|
ZERO .D2 B4 ; |68|
RL29: ; CALL OCCURS ; |68|
MVKL .S1 _SCOM_create,A3 ; |69|
MVKH .S1 _SCOM_create,A3 ; |69|
MVKL .S1 SL5+0,A4 ; |69|
CALL .S2X A3 ; |69|
ZERO .D2 B4 ; |69|
MVKH .S1 SL5+0,A4 ; |69|
ADDKPC .S2 RL30,B3,2 ; |69|
RL30: ; CALL OCCURS ; |69|
;** --------------------------------------------------------------------------*
MVKL .S2 _SCOM_create,B5 ; |70|
MVKH .S2 _SCOM_create,B5 ; |70|
CALL .S2 B5 ; |70|
MVKL .S1 SL6+0,A4 ; |70|
ADDKPC .S2 RL31,B3,1 ; |70|
MVKH .S1 SL6+0,A4 ; |70|
ZERO .D2 B4 ; |70|
RL31: ; CALL OCCURS ; |70|
MVKL .S2 _SCOM_create,B5 ; |71|
MVKH .S2 _SCOM_create,B5 ; |71|
CALL .S2 B5 ; |71|
MVKL .S1 SL7+0,A4 ; |71|
ZERO .D2 B4 ; |71|
MVKH .S1 SL7+0,A4 ; |71|
ADDKPC .S2 RL32,B3,1 ; |71|
RL32: ; CALL OCCURS ; |71|
MVKL .S1 _SCOM_create,A3 ; |72|
MVKH .S1 _SCOM_create,A3 ; |72|
MVKL .S1 SL8+0,A4 ; |72|
CALL .S2X A3 ; |72|
ZERO .D2 B4 ; |72|
MVKH .S1 SL8+0,A4 ; |72|
ADDKPC .S2 RL33,B3,2 ; |72|
RL33: ; CALL OCCURS ; |72|
MVKL .S1 _SCOM_create,A3 ; |73|
MVKH .S1 _SCOM_create,A3 ; |73|
MVKL .S1 SL9+0,A4 ; |73|
CALL .S2X A3 ; |73|
ZERO .D2 B4 ; |73|
MVKH .S1 SL9+0,A4 ; |73|
ADDKPC .S2 RL34,B3,2 ; |73|
RL34: ; CALL OCCURS ; |73|
MVKL .S2 _LOG_printf,B4 ; |75|
MVKH .S2 _LOG_printf,B4 ; |75|
|| MVKL .S1 _UTL_logDebugHandle,A3 ; |75|
MVKH .S1 _UTL_logDebugHandle,A3 ; |75|
|| CALL .S2 B4 ; |75|
LDW .D1T1 *A3,A4 ; |75|
MVKL .S2 SL10+0,B5 ; |75|
MVKH .S2 SL10+0,B5 ; |75|
STW .D2T2 B5,*+SP(4) ; |75|
ADDKPC .S2 RL35,B3,0 ; |75|
RL35: ; CALL OCCURS ; |75|
MVKL .S1 _UTL_showHeapUsageFunc,A3 ; |79|
MVKL .S2 _intHeap,B5 ; |79|
|| MVKH .S1 _UTL_showHeapUsageFunc,A3 ; |79|
MVKH .S2 _intHeap,B5 ; |79|
CALL .S2X A3 ; |79|
LDW .D2T1 *B5,A4 ; |79|
MVKL .S2 SL11+0,B4 ; |79|
MVKH .S2 SL11+0,B4 ; |79|
ADDKPC .S2 RL36,B3,1 ; |79|
RL36: ; CALL OCCURS ; |79|
MVKL .S1 _UTL_showHeapUsageFunc,A3 ; |80|
MVKH .S1 _UTL_showHeapUsageFunc,A3 ; |80|
MVKL .S1 _extHeap,A4 ; |80|
MVKH .S1 _extHeap,A4 ; |80|
|| CALL .S2X A3 ; |80|
LDW .D1T1 *A4,A4 ; |80|
MVKL .S2 SL12+0,B4 ; |80|
MVKH .S2 SL12+0,B4 ; |80|
ADDKPC .S2 RL37,B3,1 ; |80|
RL37: ; CALL OCCURS ; |80|
MV .D2 B13,B3 ; |81|
RET .S2 B3 ; |81|
|| LDW .D2T2 *+SP(12),B13 ; |81|
LDW .D2T1 *++SP(16),A10 ; |81|
NOP 4
; BRANCH OCCURS ; |81|
;******************************************************************************
;* STRINGS *
;******************************************************************************
.sect ".const"
SL1: .string "Video I/O started",0
SL2: .string "Process thread started",0
SL3: .string "Control thread started",0
SL4: .string "INTOPROC",0
SL5: .string "PROCTOIN",0
SL6: .string "PROCTOOUT",0
SL7: .string "OUTTOPROC",0
SL8: .string "PROCTONET",0
SL9: .string "NETTOPROC",0
SL10: .string "Application started",0
SL11: .string "intHeap",0
SL12: .string "extHeap",0
;******************************************************************************
;* UNDEFINED EXTERNAL REFERENCES *
;******************************************************************************
.global __CSL_init
.global _CSLDM642_LIB_
.global _CACHE_setL2Mode
.global _CACHE_clean
.global _DAT_open
.global _ICC_init
.global _CHAN_init
.global _CHAN_setup
.global _SCOM_init
.global _SCOM_create
.global _LOG_printf
.global _UTL_setLogs
.global _UTL_showHeapUsageFunc
.global _tskVideoInputInit
.global _tskVideoOutputInit
.global _tskProcessInit
.global _EVMDM642_fpgaLoad
.global _ACPY2_6X1X_init
.global _DMAN_init
.global _DMAN_setup
.global _EVMDM642_rset
.global _EVMDM642_rget
.global _tskVideoInputStart
.global _tskVideoOutputStart
.global _tskProcessStart
.global _thrControlInit
.global _thrControlStartup
.global _UTL_logDebugHandle
.global _trace
.global _intHeap
.global _extHeap