www.pudn.com > NCO.rar > cmpr_8dc.tdf, change:2010-05-05,size:1659b


--lpm_compare CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Stratix II" LPM_WIDTH=2 ONE_INPUT_IS_CONSTANT="YES" aeb dataa datab 
--VERSION_BEGIN 9.0 cbx_cycloneii 2008:05:19:10:57:37:SJ cbx_lpm_add_sub 2008:12:09:22:11:50:SJ cbx_lpm_compare 2009:02:03:01:43:16:SJ cbx_mgl 2009:01:29:16:12:07:SJ cbx_stratix 2008:09:18:16:08:35:SJ cbx_stratixii 2008:11:14:16:08:42:SJ  VERSION_END 
 
 
-- Copyright (C) 1991-2009 Altera Corporation 
--  Your use of Altera Corporation's design tools, logic functions  
--  and other software and tools, and its AMPP partner logic  
--  functions, and any output files from any of the foregoing  
--  (including device programming or simulation files), and any  
--  associated documentation or information are expressly subject  
--  to the terms and conditions of the Altera Program License  
--  Subscription Agreement, Altera MegaCore Function License  
--  Agreement, or other applicable license agreement, including,  
--  without limitation, that your use is for the sole purpose of  
--  programming logic devices manufactured by Altera and sold by  
--  Altera or its authorized distributors.  Please refer to the  
--  applicable agreement for further details. 
 
 
 
--synthesis_resources =  
SUBDESIGN cmpr_8dc 
(  
	aeb	:	output; 
	dataa[1..0]	:	input; 
	datab[1..0]	:	input; 
)  
VARIABLE  
	data_wire[3..0]	: WIRE; 
	eq_wire	: WIRE; 
	result_wire[0..0]	: WIRE; 
 
BEGIN  
	aeb = eq_wire; 
	data_wire[] = ( datab[1..1], dataa[1..1], datab[0..0], dataa[0..0]); 
	eq_wire = (! result_wire[]); 
	result_wire[] = ((data_wire[0..0] $ data_wire[1..1]) # (data_wire[2..2] $ data_wire[3..3])); 
END; 
--VALID FILE