www.pudn.com > wcdma_simulink.rar > koe_mod.mdl
Model {
Name "koe_mod"
Version 3.00
SimParamPage "Solver"
SampleTimeColors off
InvariantConstants off
WideVectorLines off
ShowLineWidths on
ShowPortDataTypes off
StartTime "0.0"
StopTime "10.0"
SolverMode "Auto"
Solver "ode45"
RelTol "1e-3"
AbsTol "auto"
Refine "1"
MaxStep "auto"
InitialStep "auto"
FixedStep "auto"
MaxOrder 5
OutputOption "RefineOutputTimes"
OutputTimes "[]"
LoadExternalInput off
ExternalInput "[t, u]"
SaveTime on
TimeSaveName "tout"
SaveState off
StateSaveName "xout"
SaveOutput on
OutputSaveName "yout"
LoadInitialState off
InitialState "xInitial"
SaveFinalState off
FinalStateName "xFinal"
SaveFormat "Matrix"
LimitMaxRows off
MaxRows "1000"
Decimation "1"
AlgebraicLoopMsg "warning"
MinStepSizeMsg "warning"
UnconnectedInputMsg "warning"
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
InheritedTsInSrcMsg "warning"
IntegerOverflowMsg "warning"
UnnecessaryDatatypeConvMsg "none"
Int32ToFloatConvMsg "warning"
SignalLabelMismatchMsg "none"
ConsistencyChecking "off"
ZeroCross on
SimulationMode "normal"
BlockDataTips on
BlockParametersDataTip on
BlockAttributesDataTip off
BlockPortWidthsDataTip off
BlockDescriptionStringDataTip off
BlockMaskParametersDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
OptimizeBlockIOStorage on
BufferReuse on
BooleanDataType off
RTWSystemTargetFile "grt.tlc"
RTWInlineParameters off
RTWRetainRTWFile off
RTWTemplateMakefile "grt_default_tmf"
RTWMakeCommand "make_rtw"
RTWGenerateCodeOnly off
ExtModeMexFile "ext_comm"
ExtModeBatchMode off
ExtModeTrigType "manual"
ExtModeTrigMode "oneshot"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect off
Created "Tue Jun 22 09:00:43 1999"
Creator "maarit"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%"
LastModifiedBy "maarit"
ModifiedDateFormat "%"
LastModifiedDate "Tue Jun 22 13:39:24 1999"
ModelVersionFormat "1.%"
ConfigurationManager "none"
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "koe_mod"
Location [89, 41, 589, 301]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
AutoZoom on
ReportName "simulink-default.rpt"
Block {
BlockType SubSystem
Name "Modulation block test"
Ports [0, 0, 0, 0, 0]
Position [133, 60, 332, 221]
Orientation "left"
ShowPortLabels on
MaskPromptString "TX channel Type|Channel coding |Coding ratio "
" |Spreading code length|Inter frame interleaver |Number of frames for int"
"er frame interleaver|Number of columns for inter frame interleaver |Intra fra"
"me interleaver (on or off)"
MaskStyleString "popup(Dedicated Transport channel|Primary commo"
"n control|Secondary common control (FACH or PCH)),popup(Convolutional coding|"
"Turbo),popup(2|3),popup(4|8|16|32|64|128|256),popup(block interleaver|multist"
"age interleaver),edit,edit,checkbox"
MaskTunableValueString "on,on,on,on,on,on,on,on"
MaskCallbackString "|||||||"
MaskEnableString "on,on,on,on,on,on,on,on"
MaskVisibilityString "on,on,on,on,on,on,on,on"
MaskVariables "tx_ch=@1;cType=@2;Kindex=@3;nC=@4;Inter_int_mod"
"e=@5;nFrames=@6;cols=@7;Intra_int_flag=@8;"
MaskInitialization "nCode=2^(nC+1);\n % if you want to specify"
" which code is used define ncode=[nCode index]\n[sizes,crc,chCode,C,control]="
"dl_start(nCode,cType,Kindex,nFrames,tx_ch);\ninput_block_size=sizes(1);;bits_"
"in_frame=sizes(2);\nnSlot=sizes(5); chips_in_slot=sizes(6);nCRC=crc(1);crc_po"
"ly=crc(2);\ncType=chCode(1);K=chCode(2); nTail=chCode(3);ch_poly=[chCode(4:6)"
"];\nnPilot=control(1);TPC=control(2);TFI=control(3);"
MaskDisplay "disp('MODULATION BLOCKS\\n\\nDOWNLINK\\n\\nTran"
"sportChannel\\n\\n\\n\\n\\n1 - Decicated transport \nchannel\\n2 - Primary co"
"mmon control channel\\n3 - Secondary common control channel')\ndisp(tx_ch)"
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "autoscale"
MaskValueString "Dedicated Transport channel|Convolutional codin"
"g|2|256|block interleaver|1|1|off"
System {
Name "Modulation block test"
Location [199, 161, 1312, 996]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
AutoZoom on
Block {
BlockType Reference
Name "Delayed ber calculation"
Ports [2, 1, 0, 0, 0]
Position [195, 210, 385, 325]
SourceBlock "utra_lib/Test functions/Delayed ber calcula"
"tion"
SourceType ""
N "nFrames*bits_in_frame"
nFrames "nFrames"
}
Block {
BlockType Display
Name "Display7"
Ports [1, 0, 0, 0, 0]
Position [457, 300, 563, 350]
Orientation "down"
NamePlacement "alternate"
Format "short"
Decimation "1"
Floating off
SampleTime "-1"
}
Block {
BlockType Terminator
Name "Terminator"
Position [725, 355, 745, 375]
Orientation "down"
NamePlacement "alternate"
}
Block {
BlockType Terminator
Name "Terminator1"
Position [785, 355, 805, 375]
Orientation "down"
NamePlacement "alternate"
}
Block {
BlockType Terminator
Name "Terminator2"
Position [325, 770, 345, 790]
Orientation "down"
NamePlacement "alternate"
}
Block {
BlockType ToWorkspace
Name "To Workspace23"
Position [525, 185, 585, 215]
ShowName off
VariableName "ber"
Buffer "inf"
Decimation "1"
SampleTime "nFrames"
SaveFormat "Matrix"
}
Block {
BlockType Width
Name "Width"
Position [685, 725, 715, 755]
Orientation "left"
NamePlacement "alternate"
}
Block {
BlockType Width
Name "Width1"
Position [630, 625, 660, 655]
Orientation "left"
NamePlacement "alternate"
}
Block {
BlockType Reference
Name "channel2"
Ports [2, 4, 0, 0, 0]
Position [640, 210, 890, 325]
Orientation "down"
ForegroundColor "blue"
NamePlacement "alternate"
ShowName off
FontName "helvetica"
FontWeight "bold"
SourceBlock "utra_lib/Channel models/channel2"
SourceType ""
N "chips_in_slot"
nSlot "16"
RM "1"
DM "0"
HP "1"
snr "1"
P "257"
nCode "1"
}
Block {
BlockType Reference
Name "data source 01 ..10"
Ports [0, 1, 0, 0, 0]
Position [45, 160, 135, 220]
SourceBlock "utra_lib/Source blocks/data source 01 ..10"
SourceType "koe"
nFrames "nFrames"
N "nFrames*bits_in_frame"
}
Block {
BlockType Reference
Name "dl_RX_demodulation"
Ports [4, 2, 0, 0, 0]
Position [365, 567, 540, 763]
Orientation "left"
NamePlacement "alternate"
SourceBlock "utra_lib/Modulation blocks/dl_RX_demodulat"
"ion"
SourceType ""
control "control"
sizes "sizes"
C "C"
Inter_int_mode "Inter_int_mode"
cols "cols"
Intra_int_flag "Intra_int_flag"
}
Block {
BlockType Reference
Name "dl_TX_modulation"
Ports [1, 2, 0, 0, 0]
Position [195, 25, 385, 145]
SourceBlock "utra_lib/Modulation blocks/dl_TX_modulatio"
"n"
SourceType ""
control "control"
sizes "sizes"
C "C"
Inter_int_mode "Inter_int_mode"
cols "cols"
Intra_int_flag "Intra_int_flag"
}
Block {
BlockType Reference
Name "hard decission"
Ports [1, 1, 0, 0, 0]
Position [185, 595, 285, 635]
Orientation "left"
NamePlacement "alternate"
SourceBlock "utra_lib/Test functions/hard decission"
SourceType ""
mode off
N "bits_in_frame*nFrames"
thres "0"
nFrames "nFrames"
}
Block {
BlockType Reference
Name "single user detection"
Ports [1, 1, 0, 0, 0]
Position [620, 415, 730, 545]
Orientation "down"
NamePlacement "alternate"
SourceBlock "utra_lib/Receivers/single user detection"
SourceType ""
N "chips_in_slot"
C "C"
nPilot "nPilot/2"
nSlot "nSlot"
}
Block {
BlockType Reference
Name "single user detection1"
Ports [1, 1, 0, 0, 0]
Position [800, 420, 910, 550]
Orientation "down"
NamePlacement "alternate"
SourceBlock "utra_lib/Receivers/single user detection"
SourceType ""
N "chips_in_slot"
C "C"
nPilot "nPilot/2"
nSlot "nSlot"
}
Block {
BlockType Mux
Name "tail_mux"
Ports [2, 1, 0, 0, 0]
Position [595, 552, 600, 623]
Orientation "left"
NamePlacement "alternate"
ShowName off
FontName "helvetica"
FontSize 12
Inputs "2"
DisplayOption "bar"
}
Block {
BlockType Mux
Name "tail_mux1"
Ports [2, 1, 0, 0, 0]
Position [615, 661, 620, 714]
Orientation "left"
NamePlacement "alternate"
ShowName off
FontName "helvetica"
FontSize 12
Inputs "2"
DisplayOption "bar"
}
Line {
SrcBlock "data source 01 ..10"
SrcPort 1
Points [15, 0]
Branch {
Points [0, -105]
DstBlock "dl_TX_modulation"
DstPort 1
}
Branch {
Points [0, 50]
DstBlock "Delayed ber calculation"
DstPort 1
}
}
Line {
SrcBlock "hard decission"
SrcPort 1
Points [-25, 0; 0, -320]
DstBlock "Delayed ber calculation"
DstPort 2
}
Line {
SrcBlock "dl_TX_modulation"
SrcPort 1
Points [315, 0]
DstBlock "channel2"
DstPort 1
}
Line {
SrcBlock "dl_TX_modulation"
SrcPort 2
Points [440, 0]
DstBlock "channel2"
DstPort 2
}
Line {
SrcBlock "Width"
SrcPort 1
DstBlock "dl_RX_demodulation"
DstPort 4
}
Line {
SrcBlock "dl_RX_demodulation"
SrcPort 1
DstBlock "hard decission"
DstPort 1
}
Line {
SrcBlock "tail_mux"
SrcPort 1
DstBlock "dl_RX_demodulation"
DstPort 1
}
Line {
SrcBlock "tail_mux1"
SrcPort 1
DstBlock "dl_RX_demodulation"
DstPort 3
}
Line {
SrcBlock "single user detection1"
SrcPort 1
Points [0, 115]
Branch {
Points [0, 5]
DstBlock "tail_mux1"
DstPort 1
}
Branch {
Points [0, 35]
Branch {
Points [0, 35]
DstBlock "Width"
DstPort 1
}
Branch {
Points [0, -5]
DstBlock "tail_mux1"
DstPort 2
}
}
}
Line {
SrcBlock "Width1"
SrcPort 1
DstBlock "dl_RX_demodulation"
DstPort 2
}
Line {
SrcBlock "single user detection"
SrcPort 1
Points [0, 15]
Branch {
Points [0, 5]
DstBlock "tail_mux"
DstPort 1
}
Branch {
Points [0, 35]
Branch {
DstBlock "Width1"
DstPort 1
}
Branch {
Points [0, 5]
DstBlock "tail_mux"
DstPort 2
}
}
}
Line {
SrcBlock "dl_RX_demodulation"
SrcPort 2
Points [-25, 0]
DstBlock "Terminator2"
DstPort 1
}
Line {
SrcBlock "channel2"
SrcPort 1
DstBlock "single user detection"
DstPort 1
}
Line {
SrcBlock "channel2"
SrcPort 4
DstBlock "single user detection1"
DstPort 1
}
Line {
SrcBlock "channel2"
SrcPort 2
DstBlock "Terminator"
DstPort 1
}
Line {
SrcBlock "channel2"
SrcPort 3
DstBlock "Terminator1"
DstPort 1
}
Line {
SrcBlock "Delayed ber calculation"
SrcPort 1
Points [110, 0]
Branch {
Points [10, 0]
DstBlock "To Workspace23"
DstPort 1
}
Branch {
Points [0, 15]
DstBlock "Display7"
DstPort 1
}
}
Annotation {
Position [873, 47]
Text "Testing the modulation blocks\nDownlink "
FontName "helvetica"
FontSize 12
FontWeight "bold"
}
Annotation {
Position [845, 624]
Text "Conventional detection does not require buf"
"fering.\nThe input for next input block is 2 * normal input\nso that delays d"
"ue to RAKE eceiver can be handled.\n\nOnly the first elements 1... widht are "
"used later."
}
}
}
}
}