www.pudn.com > SHA1.zip > mux_2.v, change:2001-01-13,size:258b


module mux_2 (in1, in2, sel, 	out); 
 
	input [31:0] in1, in2; 
	input sel; 
 
	output [31:0] out; 
	reg [31:0] out; 
 
	always @(in1 or in2 or sel)  
		begin	 
		case (sel)	 
			1'B 0 : out <= in1; 
			1'B 1 : out <= in2; 
			 
		endcase 
		end 
endmodule