www.pudn.com > SHA1.zip > mux_1.v, change:2001-01-12,size:345b


module mux_1 (in1, in2, in3, in4, sel, 	out); 
 
	input [31:0] in1, in2, in3, in4; 
	input [1:0] sel; 
 
	output [31:0] out; 
	reg [31:0] out; 
 
	always @(in1 or in2 or in3 or in4 or sel)  
		begin	 
		case (sel)	 
			2'B 00 : out <= in1; 
			2'B 01 : out <= in2; 
			2'B 10 : out <= in3; 
			2'B 11 : out <= in4; 
		endcase 
		end 
endmodule