www.pudn.com > PS2_jianpanshibie_FPGA.rar > top.fit.smsg, change:2010-12-03,size:411b


Extra Info: Performing register packing on registers with non-logic cell location assignments 
Extra Info: Completed register packing on registers with non-logic cell location assignments 
Extra Info: Started Fast Input/Output/OE register processing 
Extra Info: Finished Fast Input/Output/OE register processing 
Extra Info: Moving registers into I/O cells, LUTs, and RAM blocks to improve timing and density