www.pudn.com > NiosII_LED.rar > cntr_fjb.tdf, change:2010-10-27,size:3509b


--lpm_counter DEVICE_FAMILY="Cyclone II" lpm_direction="UP" lpm_port_updown="PORT_UNUSED" lpm_width=6 aclr clock cnt_en q sclr 
--VERSION_BEGIN 9.0 cbx_cycloneii 2008:05:19:10:57:37:SJ cbx_lpm_add_sub 2008:12:09:22:11:50:SJ cbx_lpm_compare 2009:02:03:01:43:16:SJ cbx_lpm_counter 2008:05:19:10:42:20:SJ cbx_lpm_decode 2008:05:19:10:39:27:SJ cbx_mgl 2009:01:29:16:12:07:SJ cbx_stratix 2008:09:18:16:08:35:SJ cbx_stratixii 2008:11:14:16:08:42:SJ  VERSION_END 
 
 
-- Copyright (C) 1991-2009 Altera Corporation 
--  Your use of Altera Corporation's design tools, logic functions  
--  and other software and tools, and its AMPP partner logic  
--  functions, and any output files from any of the foregoing  
--  (including device programming or simulation files), and any  
--  associated documentation or information are expressly subject  
--  to the terms and conditions of the Altera Program License  
--  Subscription Agreement, Altera MegaCore Function License  
--  Agreement, or other applicable license agreement, including,  
--  without limitation, that your use is for the sole purpose of  
--  programming logic devices manufactured by Altera and sold by  
--  Altera or its authorized distributors.  Please refer to the  
--  applicable agreement for further details. 
 
 
FUNCTION cycloneii_lcell_comb (cin, dataa, datab, datac, datad) 
WITH ( LUT_MASK, SUM_LUTC_INPUT) 
RETURNS ( combout, cout); 
FUNCTION cycloneii_lcell_ff (aclr, clk, datain, ena, sclr, sdata, sload) 
WITH ( x_on_violation) 
RETURNS ( regout); 
 
--synthesis_resources = lut 6 reg 6  
SUBDESIGN cntr_fjb 
(  
	aclr	:	input; 
	clock	:	input; 
	cnt_en	:	input; 
	q[5..0]	:	output; 
	sclr	:	input; 
)  
VARIABLE  
	counter_comb_bita0 : cycloneii_lcell_comb 
		WITH ( 
			LUT_MASK = "5A90", 
			SUM_LUTC_INPUT = "cin" 
		); 
	counter_comb_bita1 : cycloneii_lcell_comb 
		WITH ( 
			LUT_MASK = "5A90", 
			SUM_LUTC_INPUT = "cin" 
		); 
	counter_comb_bita2 : cycloneii_lcell_comb 
		WITH ( 
			LUT_MASK = "5A90", 
			SUM_LUTC_INPUT = "cin" 
		); 
	counter_comb_bita3 : cycloneii_lcell_comb 
		WITH ( 
			LUT_MASK = "5A90", 
			SUM_LUTC_INPUT = "cin" 
		); 
	counter_comb_bita4 : cycloneii_lcell_comb 
		WITH ( 
			LUT_MASK = "5A90", 
			SUM_LUTC_INPUT = "cin" 
		); 
	counter_comb_bita5 : cycloneii_lcell_comb 
		WITH ( 
			LUT_MASK = "5A90", 
			SUM_LUTC_INPUT = "cin" 
		); 
	counter_reg_bit4a[5..0] : cycloneii_lcell_ff; 
	aclr_actual	: WIRE; 
	clk_en	: NODE; 
	data[5..0]	: NODE; 
	external_cin	: WIRE; 
	s_val[5..0]	: WIRE; 
	safe_q[5..0]	: WIRE; 
	sload	: NODE; 
	sset	: NODE; 
	updown_dir	: WIRE; 
 
BEGIN  
	counter_comb_bita[5..0].cin = ( counter_comb_bita[4..0].cout, external_cin); 
	counter_comb_bita[5..0].dataa = ( counter_reg_bit4a[5..0].regout); 
	counter_comb_bita[5..0].datab = ( updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir); 
	counter_comb_bita[5..0].datad = ( B"1", B"1", B"1", B"1", B"1", B"1"); 
	counter_reg_bit4a[].aclr = aclr_actual; 
	counter_reg_bit4a[].clk = clock; 
	counter_reg_bit4a[].datain = ( counter_comb_bita[5..0].combout); 
	counter_reg_bit4a[].ena = (clk_en & (((sclr # sset) # sload) # cnt_en)); 
	counter_reg_bit4a[].sdata = ((! sclr) & ((sset & s_val[]) # ((! sset) & data[]))); 
	counter_reg_bit4a[].sload = ((sclr # sset) # sload); 
	aclr_actual = aclr; 
	clk_en = VCC; 
	data[] = GND; 
	external_cin = B"1"; 
	q[] = safe_q[]; 
	s_val[] = B"111111"; 
	safe_q[] = counter_reg_bit4a[].regout; 
	sload = GND; 
	sset = GND; 
	updown_dir = B"1"; 
END; 
--VALID FILE