www.pudn.com > NiosII_LED.rar > cpu_oci_test_bench.vhd, change:2010-10-27,size:1529b


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-- turn off superfluous VHDL processor warnings  
-- altera message_level Level1  
-- altera message_off 10034 10035 10036 10037 10230 10240 10030  
 
library altera; 
use altera.altera_europa_support_lib.all; 
 
library ieee; 
use ieee.std_logic_1164.all; 
use ieee.std_logic_arith.all; 
use ieee.std_logic_unsigned.all; 
 
entity cpu_oci_test_bench is  
        port ( 
              -- inputs: 
                 signal dct_buffer : IN STD_LOGIC_VECTOR (29 DOWNTO 0); 
                 signal dct_count : IN STD_LOGIC_VECTOR (3 DOWNTO 0); 
                 signal test_ending : IN STD_LOGIC; 
                 signal test_has_ended : IN STD_LOGIC 
              ); 
end entity cpu_oci_test_bench; 
 
 
architecture europa of cpu_oci_test_bench is 
 
begin 
 
 
end europa;