www.pudn.com > NiosII_LED.rar > wave_presets.do, change:2010-10-27,size:4455b


# Display signals from module sdram 
add wave -noupdate -divider {sdram} 
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/az_addr 
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/az_be_n 
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/az_cs 
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/az_data 
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/az_rd_n 
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/az_wr_n 
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/clk 
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/za_data 
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/za_valid 
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/za_waitrequest 
add wave -noupdate -format Literal -radix ascii /test_bench/DUT/the_sdram/CODE 
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/zs_addr 
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/zs_ba 
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/zs_cs_n 
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/zs_ras_n 
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/zs_cas_n 
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/zs_we_n 
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/zs_dq 
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/zs_dqm 
 
 
# Display signals from module jtag_uart 
add wave -noupdate -divider {jtag_uart} 
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_jtag_uart/av_address 
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/av_chipselect 
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/av_irq 
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/av_read_n 
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_jtag_uart/av_readdata 
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/av_waitrequest 
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/av_write_n 
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_jtag_uart/av_writedata 
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/dataavailable 
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/readyfordata 
 
 
# Display signals from module cpu 
add wave -noupdate -divider {cpu} 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/i_readdata 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/i_readdatavalid 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/i_waitrequest 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/i_address 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/i_read 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/clk 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/reset_n 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_readdata 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_waitrequest 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_irq 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_address 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_byteenable 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_read 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_write 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_writedata 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_readdatavalid 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/the_cpu_test_bench/W_pcb 
add wave -noupdate -format Logic -radix ascii /test_bench/DUT/the_cpu/the_cpu_test_bench/W_vinst 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/the_cpu_test_bench/W_valid 
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/the_cpu_test_bench/W_iw 
 
 
configure wave -justifyvalue right 
configure wave -signalnamewidth 1 
TreeUpdate [SetDefaultTree]