www.pudn.com > x86.rar > sse2alu.v, change:2007-12-05,size:23302b


module sse2alu(enablealu,Operation,Result,Operand1,Operand2,Operand3,MXCSR_in,MXCSR_out);

input enablealu;

input [ 10:0] Operation;
input [127:0] Operand1,Operand2;
input [  7:0] Operand3;
input [ 31:0] MXCSR_in;
output[ 31:0] MXCSR_out;
output[127:0] Result;
reg sign1,sign2;
reg [31:0] multiplicand1,multiplier1,multiplicand2,multiplier2;

reg   [127:0] Result;
reg [127:0] Flush_Cache_Linein;
 reg [63:0] AS64_1Op1,AS64_1Op2,Mul64_1Op1,Mul64_1Op2,Mul64_2Op1,Mul64_2Op2,Div64_1Op1,Div64_1Op2,Div64_2Op1,Div64_2Op2,SQRTin1,SQRTin2;
 reg [63:0] AS64_2Op1,AS64_2Op2;
 wire [63:0] AS64_2Out,AS64_1Out,SQRTout1,SQRTout2;
wire [127:0] Div64_2Out,Div64_1Out,Mul64_2Out,Mul64_1Out;
wire [63:0] product1,product2;
reg [63:0] CVTPD2PIin1,CVTPD2PIin2;
wire [31:0]CVTDQ2PSout1,CVTDQ2PSout2;
reg [31:0] CVTDQ2PSin1,CVTDQ2PSin2;
wire [31:0]CVTDQ2PSout3,CVTDQ2PSout4;
reg [31:0] CVTDQ2PSin3,CVTDQ2PSin4;
wire [31:0]CVTPS2DQout1,CVTPS2DQout2;
reg [31:0] CVTPS2DQin1,CVTPS2DQin2;
wire [31:0]CVTPS2DQout3,CVTPS2DQout4;
reg [31:0] CVTPS2DQin3,CVTPS2DQin4;

reg [31:0]comp1Op1, comp1Op2, compRes1,comp2Op1, comp2Op2, compRes2;
reg [31:0]comp3Op1, comp3Op2, compRes3,comp4Op1, comp4Op2, compRes4;
wire [31:0] compRes;
wire [63:0]CVTPD2PIin1,CVTPD2PIin2;
wire [31:0]CVTPD2PIout1,CVTPD2PIout2;

reg [31:0]CVTPI2PDin1,CVTPI2PDin2;
wire [63:0]CVTPI2PDout1,CVTPI2PDout2;

reg [31:0]CVTPS2PDin1,CVTPS2PDin2;
wire [63:0]CVTPS2PDout1,CVTPS2PDout2;

reg [63:0]CVTPD2PSin1,CVTPD2PSin2;
wire [31:0]CVTPD2PSout1,CVTPD2PSout2;


/*mul64 mul641(Mul64_1Out, Mul64_1Op1,Mul64_1Op2);
mul64 mul642(Mul64_2Out, Mul64_2Op1,Mul64_2Op2);

division64 div641(Div64_1Op1,Div64_1Op2, Div64_1Out, 1'b0);
division64 div642(Div64_2Op1,Div64_2Op2, Div64_2Out, 1'b0);
*/

//Packed Double Word to Single precision FPV conversion

ConInt32ToSP CVTDQ2PS1(CVTDQ2PSout1,CVTDQ2PSin1);
ConInt32ToSP CVTDQ2PS2(CVTDQ2PSout2,CVTDQ2PSin2);
ConInt32ToSP CVTDQ2PS3(CVTDQ2PSout3,CVTDQ2PSin3);
ConInt32ToSP CVTDQ2PS4(CVTDQ2PSout4,CVTDQ2PSin4);


//FP packed Single Precision to Double Word integer

//ConvertSPTo32Int  CVTPS2DQ1(CVTPS2DQout1,CVTPS2DQin1);
//ConvertSPTo32Int  CVTPS2DQ2(CVTPS2DQout2,CVTPS2DQin2);
//ConvertSPTo32Int  CVTPS2DQ3(CVTPS2DQout3,CVTPS2DQin3);
//ConvertSPTo32Int  CVTPS2DQ4(CVTPS2DQout4,CVTPS2DQin4);

// 32 bit comparator
//compare32 Comp32Ins1(comp1Op1, comp1Op2, compRes1);
//compare32 Comp32Ins2(comp2Op1, comp2Op2, compRes2);
//compare32 Comp32Ins3(comp3Op1, comp3Op2, compRes3);
//compare32 Comp32Ins4(comp4Op1, comp4Op2, compRes4);

// FP packed Double Precision to Double Word Integer

ConvertDPTo32Int  CVTPD2PI1(CVTPD2PIout1,CVTPD2PIin1);
ConvertDPTo32Int  CVTPD2PI2(CVTPD2PIout2,CVTPD2PIin2);

// FP Double word int to Double Precision FPV

ConvertInt32ToDP  CVTPI2PD1(CVTPI2PDout1,CVTPI2PDin1);
ConvertInt32ToDP  CVTPI2PD2(CVTPI2PDout2,CVTPI2PDin2);

// FP single precision to Double precision

ConvertSPToDP CVTPS2PD1(CVTPS2PDout1,CVTPS2PDin1);
ConvertSPToDP CVTPS2PD2(CVTPS2PDout2,CVTPS2PDin2);


// FP Double Precision to Single Precision

ConvertDPToSP CVTPD2PS1(CVTPD2PSout1,CVTPD2PSin1);
ConvertDPToSP CVTPD2PS2(CVTPD2PSout2,CVTPD2PSin2);

//  Instantiating 32 bit multipliers
multiply32 multiplyInst1( product1, multiplicand1, multiplier1, sign1);
multiply32 multiplyInst2( product2, multiplicand2, multiplier2, sign2);


always @(enablealu or Operation or Operand1 or Operand2 or Operand3 or CVTDQ2PSout1 or CVTDQ2PSout2 or CVTDQ2PSout3 or CVTDQ2PSout4 or compRes or product1 or product2 )
 begin
   if(enablealu)
    begin

      Result = 0;

//**************************
case (Operation)

//***Packed and Scalar Double-Precision FP Instructions *****


// ***********  Data Transfer *************

//**************************
  11'd0: //MOVAPD Move Aligned Packed Double-Precison FP
        begin
        Result[127:0] = Operand2[127:0];
        end


//**************************

  11'd1: //MOVUPD Move Unaligned Packed Double-Precision FP values
        begin
        Result[127:0] = Operand2[127:0];
        end

//**************************
  11'd2:// MOVHPD Move High Packed Double-Precision FP Mem to XMM
        begin
        Result[127:64] = Operand2[63:0];
        Result[63 : 0] = Operand1[63:0];
        end

//***************************
  11'd3:// MOVHPD XMM to mem
        begin
        Result[63:0] = Operand2[127:64];
        end


//***************************
  11'd4: // MOVLPD Move Low Packed Double-Precision FP value mem to XMM
        begin
        Result[63 : 0] = Operand2[63:0];
        Result[127:64] = Operand1[63:0];
        end

//***************************

  11'd3://MOVLPD XMM to mem
        begin
        Result[63:0] = Operand2[63:0];
        end

//**************************

  11'd5: //MOVMSKPD-Extract Packed Double-Precision FP Sign Mask
        begin
        Result[0]   = Operand2[63];
        Result[1]   = Operand2[127];
        Result[3:2 ]= 2'b00;
        Result[31:4]= 28'h0;
        end

//**************************

  11'd6 ://MOVSD- Move Scalar Double-Precision Floating-Point Value(both source & destinations are XMM reg)
        begin
        Result[ 63: 0] = Operand2[63:0];
        Result[127:64] = Operand1[127:64];
        end

//**************************

  11'd7 ://MOVSD-(Source Operand is XMM reg and Destination is Memory)
        begin
        Result[63:0] = Operand2[63:0];
        end

//**************************

  11'd8 ://MOVSD- (source memory and destination XMM
        begin
        Result[ 63: 0] = Operand2[63:0];
        Result[127:64] = 16'h0;
        end

//***************************


//********** Arithmetic ******************

  11'd32://ADDPD-ADD Packed Double-Precision Floating-Point Values
        begin
        /*AS64_1Op1 = Operand1[63:0];
        AS64_1Op2 = Operand2[63:0];

        AS64_2Op1 = Operand1[127:64];
        AS64_2Op2 = Operand2[127:64];

        Result[127:0] = {AS64_2Out,AS64_1Out};*/
        end

//*******************************************

  11'd33://ADDSD-Add Scalar Double-Precision Floating-Point Values
        begin
/*      AS64_1Op1 = Operand1[63:0];
        AS64_1Op2 = Operand2[63:0];

        Result[127:0] = {Operand1[127:64],AS64_1Out};*/
        end

//*******************************************

  11'd34://SUBPD-Subtract Packed Double-Precision Floating-Point Values
        begin
        /*AS64_1Op1 = Operand1[63:0];
        AS64_1Op2 = Operand2[63:0];

        AS64_2Op1 = Operand1[127:0];
        AS64_2Op2 = Operand2[127:0];

        Result[127:0] = {AS64_2Out,AS64_1Out};*/
        end

//*****************************************

  11'd35://SUBSD-Subtract Scalar Double-Precision Floating-Point Values
        begin

/*      AS64_1Op1 = Operand1[63:0];
        AS64_1Op2 = Operand2[63:0];

        Result[127:0] = {Operand1[127:64],AS64_1Out};
*/
        end

//******************************************

  11'd36://MULPD-Multiply Packed Double-Precision Floating-Point Values
        begin
        /*Mul64_1Op1 = Operand1[63:0];
        Mul64_1Op2 = Operand2[63:0];

        Mul64_2Op1 = Operand1[127:64];
        Mul64_2Op2 = Operand2[127:64];

        Result[127:0] = {Mul64_2Out[63:0],Mul64_1Out[127:64]};*/
        end

//******************************************

  11'd37://MULSD-Multiply Scalar Double-Precision Floating-Point Values
        begin
        Mul64_1Op1 = Operand1[63:0];
        Mul64_1Op2 = Operand2[63:0];

        Result[127:0] = {Operand1[127:64],Mul64_1Out};
        end

//******************************************

  11'd38://DIVPD-Divide Packed Double-Precision Floating-Point Values
        begin

        Div64_1Op1 = Operand1[63:0];
        Div64_1Op2 = Operand2[63:0];

        Div64_2Op1 = Operand1[127:64];
        Div64_2Op2 = Operand2[127:64];

        Result[127:0] = {Div64_2Out,Div64_1Out};
        end


//*******************************************

  11'd39://DIVSD-Divide Scalar Double-Precision Floating-Point Values
        begin
        Div64_1Op1 = Operand1[63:0];
        Div64_1Op2 = Operand2[63:0];

        Result[127:0] = Div64_1Out;
        end

//*******************************************

  11'd40:// SQRTPD-Compute Square Roots of Packed Double-Precision FPV
        begin
        SQRTin1 = Operand2[63:0];
        Result[63:0] = SQRTout1;

        SQRTin2 = Operand2[127:64];
        Result[127:0] = SQRTout2;
        end

//*******************************************

  11'd41://SQRTSD-Compute Square Root of Scalar Double-Precision FPV
        begin
        SQRTin1 = Operand2[63:0];
        Result[63:0] = SQRTout1;

        Result[127:64] = Operand1[127:64];
        end

//******************************************

  11'd42://MAXPD-Return Maximum Packed Double-Precision Floating Point Values
        begin

        end
//****************************************

  11'd43://MAXSD-
        begin

        end

//****************************************

  11'd44://MINPD-
        begin

        end

//****************************************

  11'd45://MINSD
        begin

        end
//****************************************


///************** Logical ***************

//***************************

  11'd9: //ANDPD Bitwise Logicla AND of Packed Double-Precision FP value
        begin
        Result[127:0] = (Operand1[127:0] & Operand2[127:0]);
        end

//***************************
  11'd10: //ANDNPD Bitwise Logical AND NOT of Packed Double-Precision FP values
        begin
        Result[127:0] = (~(Operand1[127:0]) & (Operand2[127:0]));
        end

//***************************
  11'd11:// ORPD Bitwise Logicla OR of Packed Double-Precision FP value
        begin
        Result[127:0] = (Operand1[127:0] | Operand2[127:0]);
        end

//****************************

  11'd12: //XORPD Bitwise Logicla XOR of Packed Double-Precision FP value
        begin
        Result[127:0] = (Operand1[127:0] ^ Operand2[127:0]);
        end

//*****************

//*******  Compare Instructions *********

  11'd46://CMPPD-
        begin

        end
//****************************************

  11'd47://CMPSD-
        begin

        end

//*****************************************

  11'd48://COMISD-
        begin

        end

//*****************************************

  11'd49://UCOMISD
        begin


        end
//******************************************



//****** Shuffele & Unpack **************


//****************************
  11'd13: //SHUFPD Shuffle Packed Double-Precision FP Values
        begin
         if(Operand3[0] == 0)
                Result[63:0] = Operand1[63:0];
         else
                Result[63:0] = Operand1[127:64];

         if(Operand3[1] == 0)
                Result[127:64] = Operand2[63:0];
         else
                Result[127:64] = Operand2[127:64];

        end
//****************************

  11'd14://UNPCKHPD Unpack and Interleave High Packed Double-Precision FP value
        begin
        Result[ 63: 0] = Operand1[127:64];
        Result[127:64] = Operand2[127:64];
        end

//*****************************

  11'd15://UNPCKLPD Unpack and Interleave Low Packed Double-Precision FP value
        begin
        Result[ 63: 0] = Operand1[63:0];
        Result[127:64] = Operand2[63:0];
        end

//******************************

// **** Conversion Instructions *******

//***********************************

  11'd19: //CVTPD2PI-Convert Packed Double-Precision FPV 2 Packed Doubleword Ingeter
        begin
        CVTPD2PIin1  = Operand2[63:0];
        comp1Op1  = CVTPD2PIout1;
        comp1Op2  = {1'b0,31'b1};

        if(compRes == 0)
                Result[31:0] = 32'h80000000;
        else
                Result[31:0] = CVTPD2PIout1;

        CVTPD2PIin2   = Operand2[127:64];
        comp2Op1 = CVTPD2PIout2;
        comp2Op2 = {1'b0,31'b1};

        if(compRes == 0)
                Result[63:32] = 32'h80000000;
        else
                Result[63:32] = CVTPD2PIout2;

        end

//*************************************

  11'd20://CVTTPD2PI-Convert with Truncation Packed Double-Precision FPV 2 Packed Doubleword Integers
        begin
        CVTPD2PIin1  = Operand2[63:0];
        comp1Op1  = CVTPD2PIout1;
        comp1Op2  = {1'b0,31'b1};

        if(compRes == 0)
                Result[31:0] = 32'h80000000;
        else
                Result[31:0] = CVTPD2PIout1;

        CVTPD2PIin2   = Operand2[127:64];
        comp2Op1 = CVTPD2PIout2;
        comp2Op2 = {1'b0,31'b1};

        if(compRes == 0)
                Result[63:32] = 32'h80000000;
        else
                Result[63:32] = CVTPD2PIout2;

        end



//**************************************

  11'd21://CVTPI2PD-Convert Packed Doubleword Integers to Packed Double-Precision FP Values
        begin
        CVTPI2PDin1  = Operand2[31:0];
        Result[63:0] = CVTPI2PDout1;

        CVTPI2PDin2    = Operand2[63:32];
        Result[127:64] = CVTPI2PDout2;

        end

//**************************************

  11'd22://CVTPD2DQ-Convert Packed Double-Precision FPV 2 Packed DoubleWord Integers
        begin
        CVTPD2PIin1  = Operand2[63:0];
        comp1Op1  = CVTPD2PIout1;
        comp1Op2  = {1'b0,31'b1};

        if(compRes == 0)
                Result[31:0] = 32'h80000000;
        else
                Result[31:0] = CVTPD2PIout1;

        CVTPD2PIin2   = Operand2[127:64];
        comp2Op1 = CVTPD2PIout2;
        comp2Op2 = {1'b0,31'b1};

        if(compRes == 0)
                Result[63:32] = 32'h80000000;
        else
                Result[63:32] = CVTPD2PIout2;

        Result[127:64] = 16'h0;


        end

//***************************************

  11'd23: //CVTTPD2DQ-Convert with Truncation Packed Double-Precision FPV 2 Packed Doubleword Integers
        begin

        CVTPD2PIin1  = Operand2[63:0];
        comp1Op1  = CVTPD2PIout1;
        comp1Op2  = {1'b0,31'b1};

        if(compRes == 0)
                Result[31:0] = 32'h80000000;
        else
                Result[31:0] = CVTPD2PIout1;

        CVTPD2PIin2   = Operand2[127:64];
        comp2Op1 = CVTPD2PIout2;
        comp2Op2 = {1'b0,31'b1};

        if(compRes == 0)
                Result[63:32] = 32'h80000000;
        else
                Result[63:32] = CVTPD2PIout2;

        Result[127:64] = 16'h0;


        end

//************************************

  11'd24://CVTDQ2PD-Convert Packed Doubleword Integers to Packed Double-Precision FPV
        begin

        CVTPI2PDin1  = Operand2[31:0];
        Result[63:0] = CVTPI2PDout1;

        CVTPI2PDin2    = Operand2[63:32];
        Result[127:64] = CVTPI2PDout2;

        end

//*****************************************

  11'd25://CVTPS2PD-Convert Packed Single-Precision FPV 2 Packed Double-Precision FPV
        begin
        CVTPS2PDin1 = Operand2[31:0];
        Result[63:0] = CVTPS2PDout1;

        CVTPS2PDin2 = Operand2[63:32];
        Result[127:64] = CVTPS2PDout2;

        end

//******************************************

  11'd26://CVTPD2PS-Convert Packed Double-PrecisionFPV 2 Packed Single-PrecisionFP values
        begin
        CVTPD2PSin1 = Operand2[63:0];
        Result[31:0] = CVTPD2PSout1;

        CVTPD2PSin2 = Operand2[127:64];
        Result[63:32] = CVTPD2PSout2;

        Result[127:64] = 16'h0;

        end

// ****************************************

  11'd27://CVTSS2SD-Convert Scalar Single-Precision FPV 2 Scalar Double-Precision FPV
        begin
        CVTPS2PDin1 = Operand2[31:0];
        Result[63:0] = CVTPS2PDout1;

        Result[127:64] = Operand1[127:64];
        end

//*****************************************

  11'd28://CVTSD2SS-Convert Scalar Double-Precision FPV 2 Scalar Single-Precision FPV
        begin
        CVTPD2PSin1 = Operand2[63:0];
        Result[31:0] = CVTPD2PSout1;

        Result[127:32] = Operand1[127:32];

        end

//****************************************

  11'd29://CVTSD2SI-Convert Scalar Double-Precision FPV 2 Doubleword Integer
        begin

        CVTPD2PIin1  = Operand2[63:0];
        comp1Op1  = CVTPD2PIout1;
        comp1Op2  = {1'b0,31'b1};

        if(compRes == 0)
                Result[31:0] = 32'h80000000;
        else
                Result[31:0] = CVTPD2PIout1;


        end

//****************************************

  11'd30://CVTTSD2SI-Convert with Truncation Scalar Double-Precision FPV 2 Signed Doubleword Integer
        begin

        CVTPD2PIin1  = Operand2[63:0];
        comp1Op1  = CVTPD2PIout1;
        comp1Op2  = {1'b0,31'b1};

        if(compRes == 0)
                Result[31:0] = 32'h80000000;
        else
                Result[31:0] = CVTPD2PIout1;

        end


//****************************************

  11'd31://CVTSI2SD-Convert Doubleword Integer to Scalar Double-Precision FPV
        begin

        CVTPI2PDin1  = Operand2[31:0];
        Result[63:0] = CVTPI2PDout1;

        Result[127:64] = Operand1[127:64];

        end

//****************************************




// ********** Packed Single Precision FP Instructions *********


  11'd16://CVTDQ2PS Convert Packed DoubleWord Integers to Packed Single-Precision FP values
        begin
        CVTDQ2PSin1 = Operand2[31:0];
        Result[31:0] = CVTDQ2PSout1;

        CVTDQ2PSin2 = Operand2[63:32];
        Result[63:32]= CVTDQ2PSout2;

        CVTDQ2PSin3 = Operand2[95:64];
        Result[95:64]= CVTDQ2PSout3;

        CVTDQ2PSin4 = Operand2[127:96];
        Result[127:96]= CVTDQ2PSout4;
        end

//*********************************

  11'd17: //CVTPS2DQ Convert Packed Single-Precision FP value to Packed Doubleword Integers
        begin

        CVTPS2DQin1 = Operand2[31:0];
        comp1Op1 = CVTPS2DQout1;
        comp1Op2 = {1'b0,31'b1};
        if(compRes == 0)
                Result[31:0] = 32'h80000000;
        else
                Result[31:0] = CVTPS2DQout1;

        CVTPS2DQin2 = Operand2[63:32];
        comp2Op1 = CVTPS2DQout2;
        comp2Op2 = {1'b0,31'b1};
        if(compRes == 0)
                Result[63:32] = 32'h80000000;
        else
                Result[63:32] = CVTPS2DQout2;

        CVTPS2DQin3 = Operand2[95:64];
        comp3Op1 = CVTPS2DQout3;
        comp3Op2 = {1'b0,31'b1};
        if(compRes == 0)
                Result[95:64] = 32'h80000000;
        else
                Result[95:64] = CVTPS2DQout3;

        CVTPS2DQin4 = Operand2[127:96];
        comp4Op1 = CVTPS2DQout4;
        comp4Op2 = {1'b0,31'b1};
        if(compRes == 0)
                Result[127:96] = 32'h80000000;
        else
                Result[127:96] = CVTPS2DQout4;


        end

//**********************************

  11'd18://CVTTPS2DQ Convert with Truncation Packed Single-Precision FP value to Packed DoubleWord Integers
        begin

        CVTPS2DQin1 = Operand2[31:0];
        comp1Op1 = CVTPS2DQout1;
        comp1Op2 = {1'b0,31'b1};
        if(compRes == 0)
                Result[31:0] = 32'h80000000;
        else
                Result[31:0] = CVTPS2DQout1;

        CVTPS2DQin2 = Operand2[63:32];
        comp2Op1 = CVTPS2DQout2;
        comp2Op2 = {1'b0,31'b1};
        if(compRes == 0)
                Result[63:32] = 32'h80000000;
        else
                Result[63:32] = CVTPS2DQout2;

        CVTPS2DQin3 = Operand2[95:64];
        comp3Op1 = CVTPS2DQout3;
        comp3Op2 = {1'b0,31'b1};
        if(compRes == 0)
                Result[95:64] = 32'h80000000;
        else
                Result[95:64] = CVTPS2DQout3;

        CVTPS2DQin4 = Operand2[127:96];
        comp4Op1 = CVTPS2DQout4;
        comp4Op2 = {1'b0,31'b1};
        if(compRes == 0)
                Result[127:96] = 32'h80000000;
        else
                Result[127:96] = CVTPS2DQout4;

        end

//****************************


//*********** 128-bit Integer Instructions ****

  11'd50://MOVDQA-Move Aligned Double Quadword
        begin
        Result[127:0] = Operand2[127:0];
        end

//**************************************

  11'd51://MOVDQU-Move Unaligned Double QuadWord
        begin
        Result[127:0] = Operand2[127:0];
        end

//**************************************

  11'd52://MOVQ2DQ-Move QuadWord from MMX to XMM Register
        begin
        Result[63:0] = Operand2[63:0];
        Result[127:64] = 16'h0;
        end

//**************************************

  11'd53://MOVDQ2Q-Move Quadword from XMM to MMX Register
        begin
        Result[63:0] = Operand2[63:0];
        end

//*************************************

  11'd54://PMULUDQ-Multiply Packed Unsigned Doubleword Integers 64 bit
        begin

        sign1 = 1'b1;

        multiplicand1 = Operand1[31:0];
        multiplier1   = Operand2[31:0];


        Result[63:0] = product1;

        end

//*************************************

  11'd55://PMULUDQ- 128 bit
        begin
        sign1 = 1'b1;
        sign2 = 1'b1;

        multiplicand1 = Operand1[31:0];
        multiplier1   = Operand2[31:0];

        multiplicand2 = Operand1[95:64];
        multiplier2   = Operand2[95:64];


        Result[127:0] ={product2, product1};

        end

//*************************************

  11'd56://PADDQ-Add Packed Quadword Integer 64bit
        begin

        end

//*************************************

  11'd57://PADDQ- 128 bit
        begin

        end

//*************************************

  11'd58://PSUBQ-Subtract Packed Quadword Integers 64 bit
        begin

        end

//*************************************

  11'd59://PSUBQ- 128 bit
        begin

        end

//*************************************

  11'd60://PSHUFLW-Shuffle Packed Low Words
        begin

        end

//**********************************

  11'd61://PSHUFHW-Shuffle Packed High Words
        begin

        end

//*********************************

  11'd62://PSHUFD-Shuffle Packed DoubleWords
        begin

        end

//********************************

  11'd63://PSLLDQ-Shift Double Quadword Left Logical
        begin

        end

//********************************

  11'd64://PSRLDQ-Shift Double Quadword Right Logical
        begin

        end

//********************************

  11'd65://PUNPCKHQDQ-Unpack High data
        begin

        end

//*******************************

  11'd66://PUNPCKLQDQ-Unpack Low Data
        begin

        end

//******************************

//************** Control& Instruction Order ********

  11'd67://CLFLUSH-Flush Cache Line
        begin
        Flush_Cache_Linein = Operand2[127:0];
        end

//***********************************

  11'd68://LFENCE-Load Fence
        begin

        end

//**********************************

  11'd69://MFENCE-Memory Fence
        begin

        end

//*********************************

  11'd70://PAUSE-Spin Loop Hint
        begin

        end

//********************************

  11'd71://MASKMOVDQU-Store Selected Bytes of Double QuadWord
        begin

        end

//*******************************

  11'd72://MOVNTPD-Store Packed Double-Precision FPV using Non-Temportal Hint
        begin
        Result[127:0] = Operand2[127:0];
        end

//*******************************

  11'd73://MOVNTDQ-Store Double Quadword Using Non-Temporal Hint
        begin
        Result[127:0] = Operand2[127:0];
        end

//******************************

  11'd74://MOVNTI-Store Doubleword Using Non-Temporal Hint
        begin
        Result[31:0] = Operand2[31:0];
        end

//******************************

endcase
end
end
endmodule