www.pudn.com > x86.rar > sse2Decoder.v, change:2007-12-05,size:30893b


module sse2Decoder(instructionSeq,operandSize,addressSize, operation, op1Type, op2Type, op1,op2,opSize,operandOverridePrefix,repPrefixF2,repPrefixF3,Enable); 
 
//  port  declaration 
input 	[127:0]instructionSeq;	 // the instruction sequence 
input	operandSize;		 
input	addressSize; 
input	Enable; 
input   repPrefixF3;	//repeat prefix F3 
input   repPrefixF2; 
input   operandOverridePrefix; 
 
output	[10:0]operation; 
output	[17:0]op1Type,op2Type; // specify the type of the operands 
output	[31:0]op1,op2; // the two operands 
output	[2:0]opSize; 
 
reg	[10:0]operation; 
reg	[17:0]op1Type,op2Type; 
reg	[2:0]opSize; 
reg	[31:0]op1,op2; 
 
 
// the declartion of  internal  wires  and  registers 
reg  [127:0]instrSeq; 
reg  [7:0] opCode1; 
reg  [7:0] opCode2; 
reg  [7:0] opCode3; 
reg  [7:0] modR_M_Byte; 
reg  [7:0] SIB_Byte; 
reg  [32:0] tempOp; 
reg  [17:0] tempOpType; 
reg directionFlag; 
 
 
//  the  coding  started 
 
always @(Enable or operandOverridePrefix or repPrefixF2 or modR_M_Byte or repPrefixF3 or operation or addressSize or op2Type or instructionSeq) 
	begin 
	if(Enable == 1'b1)    // if the fetching of  the  instruction is complete 
		begin 
		op1Type =18'b10_1111_0000_0000_0010;  //destination 
		op2Type =18'b10_1111_0000_0000_0010;  // source 
		op1 = 32'd0; 
		op2 = 32'd0; 
		opSize =3'b010; // default operand size is 32 bit 
		instrSeq[119:0] = instructionSeq[127:8]; 
		opCode1 = instrSeq[7:0];  //higher order byte 
		opCode2 = instrSeq[15:8]; //lower order byte 
		 
				case (opCode1[7:4]) 
 
					4'h1: 
						begin 
							case(opCode1[3:0]) 
 
								4'h0:	begin 
										directionFlag = 1'b1; 
										if(repPrefixF2) 
											operation = 11'd1792;		//MOVSD 
										else if(operandOverridePrefix) 
											operation = 11'd1793;		//MOVUPD 
									end 
 
								4'h1:	begin 
										if(modR_M_Byte == 2'b11)		//if both  are register operands  directionFlag  must set 
											directionFlag = 1'b1; 
										if(repPrefixF2) 
											operation = 11'd1792;		//MOVSD 
										else if(operandOverridePrefix) 
											operation = 11'd1793;		//MOVUPD 
 
									end 
 
								4'h2:	begin 
										directionFlag  = 1'b1; 
										operation = 11'd1794;	//MOVLPD 
									end 
								4'h3:	operation = 11'd1794;	//MOVLPD 
								4'h4:	operation = 11'd1795;	//UNPACKLPD 
 
								4'h5: 	operation = 11'd1796;	//UNPACKHPD 
 
								4'h6:   begin 
										operation = 11'd1797;	//MOVHPD 
										directionFlag  = 1'b1; 
									end 
								4'h7:	operation = 11'd1798;	//MOVHPD 
							endcase	//case(opCode[3:0]) 
						end  //2'h1 
 
					4'h2: 
						begin 
							case(opCode1[3:0]) 
 
								4'h8:	begin 
										directionFlag = 1'b1; 
										operation = 11'd1799;	//MOVAPD 
									end 
 
								4'h9:	begin 
										operation = 11'd1799;	//MOVAPD 
										if(modR_M_Byte == 2'b11)		//if both  are register operands  directionFlag  must set 
											directionFlag = 1'b1; 
									end 
 
								4'hA:	begin 
										if(modR_M_Byte == 2'b11)		//if both  are register operands  directionFlag  must set 
											directionFlag  = 1'b1; 
										if(repPrefixF2) //if rep Prefix F2 is set																	   if(repPrefixF2) //if rep Prefix F2 is set 
											operation = 11'd1800;	//CVTSI2SD 
										else if(operandOverridePrefix) 
											operation = 11'd1801;	//CVTPI2PD 
 
									end 
 
								4'hB:	begin 
										operation = 11'd1802;	//MOVNTPD 
										directionFlag = 1'b1; 
									end 
 
								4'hC:	begin 
										if(repPrefixF2) //if rep Prefix F2 is set 
											operation = 11'd1803;	//CVTTSD2SI 
										else if(operandOverridePrefix) 
											operation = 11'd1804;	//CVTTPD2PI 
 
									end 
								4'hD:	begin 
										if(repPrefixF2) //if rep Prefix F2 is set 
											operation = 11'd1805;	//CVTSD2SI 
										else if(operandOverridePrefix) 
											operation = 11'd1806;	//CVTPD2PI 
 
									end 
 
								4'hF:	operation = 11'd1807;	//COMISD 
 
 
							endcase	//(opCode1[3:0]) 
 
						end	//2'h2 
 
					4'h5: 
						begin 
							case(opCode1[3:0]) 
 
								4'h0:	operation = 11'd1808;	//MOVMSKPD 
 
								4'h1:	begin 
										if(repPrefixF2) //if rep Prefix is set 
											operation = 11'd1809;	//SQRTSD 
										else if(operandOverridePrefix) 
											operation = 11'd1810;	//SQRTPD 
 
									end 
								4'h4:	operation = 11'd1811;	//ANDPD 
 
 
								4'h5:	operation = 11'd1812;	//ANDNPD 
 
 
								4'h6:	operation = 11'd1813;	//ORPD 
 
 
								4'h7:	operation = 11'd1814;	//XORPD 
 
 
								4'h8:	begin 
										if(repPrefixF2) //if rep Prefix is set 
											operation = 11'd1815;	//ADDSD 
										else if(operandOverridePrefix) 
											operation = 11'd1816;	//ADDPD 
 
									end 
 
 
								4'h9:	begin 
										if(repPrefixF2) //if rep Prefix is set 
											operation = 11'd1817;	//MULSD 
										else if(operandOverridePrefix) 
											operation = 11'd1818;	//MULPD 
 
									end 
 
								4'hA:	begin 
										if(repPrefixF2) //if rep Prefix F2 is set 
											operation = 11'd1819;	//CVTSD2SS 
										else if(operandOverridePrefix) 
											operation = 11'd1820;	//CVTPD2PS 
										else if(repPrefixF3) //if rep Prefix F3 is set 
											operation = 11'd1821;	//CVTSS2SD 
										else 
											operation = 11'd1822;	//CVTPS2PD 
									end 
 
								4'hB:	begin 
										if(repPrefixF3) //if rep Prefix F3 is set 
											operation = 11'd1823;	//CVTTPS2DQ 
										else if(operandOverridePrefix) 
											operation = 11'd1824;	//CVTPS2DQ 
										else 
											operation = 11'd1825;	//CVTDQ2PS 
									end 
 
								4'hC:	begin 
										if(repPrefixF2) //if rep Prefix is set 
											operation = 11'd1826;	//SUBSD 
										else if(operandOverridePrefix) 
											operation = 11'd1827;	//SUBPD 
 
									end 
 
 
								4'hD:	begin 
										if(repPrefixF2) //if rep Prefix is set 
											operation = 11'd1828;	//MINSD 
										else if(operandOverridePrefix) 
											operation = 11'd1829;	//MINPD 
 
									end 
 
 
								4'hE:	begin 
										if(repPrefixF2) //if rep Prefix is set 
											operation = 11'd1830;	//DIVSD 
										else if(operandOverridePrefix) 
											operation = 11'd1831;	//DIVPD 
 
									end 
 
 
								4'hF:	begin 
										if(!repPrefixF2) //if rep Prefix is set 
											operation = 11'd1832;	//MAXSD 
										else if(operandOverridePrefix) 
											operation = 11'd1833;	//MAXPD 
 
									end 
 
 
							endcase	//(opCode1[3:0]) 
 
						end	//2'h5 
 
					4'h6:	begin 
							case(opCode1[3:0]) 
 
								4'h0:	operation = 11'd1834;	//PUNPCKLBW 
 
								4'h1:	operation = 11'd1835;	//PUNPCKLBD 
 
								4'h2:	operation = 11'd1836;	//PUNPCKLBQ 
 
								4'h3:	operation = 11'd1837;	//PACKSSWB 
 
								4'h4:	operation = 11'd1838;	//PCMPGTB 
 
								4'h5:	operation = 11'd1839;	//PCMPGTW 
 
								4'h6:	operation = 11'd1840;	//PCMPGTD 
 
								4'h7:	operation = 11'd1841;	//PACKUSWB 
 
								4'h8:	operation = 11'd1842;	//PUNPCKHW 
 
								4'h9:	operation = 11'd1843;	//PUNPCKHD 
 
								4'hA:	operation = 11'd1844;	//PUNPCKHQ 
 
								4'hB:	operation = 11'd1845;	//PACKSSDW1 
 
								4'hC:	operation = 11'd1846;	//PUNPCKLQDQ 
 
								4'hD:	operation = 11'd1847;	//PUNPCKHQDQ 
 
								4'hE:	operation = 11'd1848;	//MOVD (r/m32  to xmm ) 
 
								4'hF:	begin 
										if(repPrefixF3) //if rep Prefix F3 is set 
											operation = 11'd1849;	//MOVDQU 
										else if(operandOverridePrefix) 
											operation = 11'd1850;	//MOVDQA 
									end 
							endcase	//(opCode1[3:0]) 
						end 
					4'h7:	begin 
							case(opCode1[3:0]) 
 
								4'h0:	begin 
										if(repPrefixF2) //if rep Prefix F2 is set 
											operation = 11'd1851;	//PSHUFLW 
										else if(operandOverridePrefix) 
											operation = 11'd1852;	//PSHUFD 
										else if(repPrefixF3) //if rep Prefix F3 is set 
											operation = 11'd1853;	//PSHUFHW 
 
									end 
								4'h1:	begin 
										case(modR_M_Byte[5:3]) 
 
											3'b101:	operation = 11'd1854;	//PSLLW  xmm, imm8 
											3'b100:	operation = 11'd1855;	//PSRAW  xmm, imm8 
											3'b010:	operation = 11'd1856;	//PSRLW  xmm, imm8 
 
										endcase		//case(modR_M_Byte[5:3]) 
									end 
 
								4'h2:	begin 
										case(modR_M_Byte[5:3]) 
 
											3'b101:	operation = 11'd1857;	//PSLLD  xmm, imm8 
											3'b100:	operation = 11'd1858;	//PSRAD  xmm, imm8 
											3'b010:	operation = 11'd1859;	//PSRLD  xmm, imm8 
 
										endcase		//case(modR_M_Byte[5:3]) 
									end 
 
 
								4'h3:	begin 
										case(modR_M_Byte[5:3]) 
 
											3'b101:	operation = 11'd1860;	//PSLLQ  xmm, imm8 
											3'b010:	operation = 11'd1861;	//PSRLQ  xmm, imm8 
											3'b111:	operation = 11'd1862;	//PSLLDQ 
											3'b011:	operation = 11'd1863;	//PSRLDQ 
										endcase		//case(modR_M_Byte[5:3]) 
									end 
 
 
								4'h4:	operation = 11'd1864;	//PCMPEQB 
 
								4'h5:	operation = 11'd1865;	//PCMPEQW 
 
								4'h6:	operation = 11'd1866;	//PCMPEQD 
 
								4'hE:	begin 
										if(repPrefixF3) //if rep Prefix F3 is set 
											operation = 11'd1867;	//MOVQ -(xmm2/mem64 to xmm1) 
										else if(operandOverridePrefix) 
											begin 
												operation = 11'd1868;	// MOVD -(xmm to r/m32) 
												directionFlag = 1'b1; 
											end 
									end 
 
								4'hF:	begin 
										if(repPrefixF3) //if rep Prefix F3 is set 
											operation = 11'd1849;	//MOVDQU 
										else if(operandOverridePrefix) 
											operation = 11'd1850;	//MOVDQA 
										if(modR_M_Byte != 2'b11) 
											directionFlag = 1'b1; 
									end 
 
							endcase	//(opCode1[3:0]) 
						end 
 
					4'h9:	operation = 11'd1869;	//PAUSE 
 
 
					4'hA:	begin 
							case(modR_M_Byte[5:3]) 
								3'b010:	operation = 11'd870;	//LDMXCSR 
								3'b011:	begin 
										operation = 11'd1871;	//STMXCSR 
										directionFlag = 1'b1; 
									end 
								3'b101:	operation = 11'd1872;	//LFENCE 
								3'b110:	operation = 11'd1873;	//MFENCE 
								3'b111:	operation = 11'd1874;	//CLFLUSH 
								//3'b111:	operation = 11'd1587;	//SFENCE  // i am omiting this instruction now 
							endcase	//(modR_M_Byte[5:3]) 
 
						end  //2'hA 
 
					4'hC: 
						begin 
							case(opCode1[3:0]) 
 
								4'h2:	begin 
										if(repPrefixF2) //if rep Prefix F2 is  set 
											operation = 11'd1875;	//CMPSD 
										else if(operandOverridePrefix) 
											operation = 11'd1876;	//CMPPD 
									end 
 
								4'h3:	begin 
										directionFlag = 1'b1; 
										operation = 11'd1877;	//MOVNTI 
									end 
 
								4'h4:	begin 
										operation = 11'd1878;	//PINSRW 
										directionFlag = 1'b1; 
									end 
 
								4'h5:	operation = 11'd1879;	//PEXTRW 
 
								4'h6:	operation = 11'd1880;	//SHUFPD 
 
							endcase	//(opCode1[3:0]) 
 
						end	//2'hC 
 
					4'hD: 
						begin 
							case(opCode1[3:0]) 
 
								4'h1:	operation = 11'd1881;	//PSRLW  xmm1,xmm2/m128 
 
								4'h2:	operation = 11'd1882;	//PSRLD  xmm1,xmm2/m128 
 
								4'h3:	operation = 11'd1883;	//PSRLQ  xmm1,xmm2/m128 
 
								4'h4:	begin 
										if(operandOverridePrefix) 
											operation = 11'd1884;	// PADDDQ  xmm 
										else 
											operation = 11'd1885;	//PADDDQ  mmx 
									end 
								4'h5:	operation = 11'd1886;	//PMULLW 
 
								4'h6:	begin 
										if(repPrefixF2) //if rep Prefix F2 is set 
											operation = 11'd1887;	//MOVDQ2Q 
										else if(operandOverridePrefix) 
											begin 
												directionFlag =1'b1; 
												operation = 11'd1888;	//MOVQ - 66 0F D6  (xmm1 to xmm2/mem64) 
											end 
										else if(repPrefixF3) //if rep Prefix F3 is set 
											begin 
												operation = 11'd889;	//MOVQ2DQ 
												directionFlag = 1'b1; 
											end 
 
									end 
								4'h7:	operation = 11'd1890;	//PMOVMSKB 
 
								4'h8:	begin 
										directionFlag = 1'b1; 
										operation = 11'd1891;	//PSUBUSB 
									end 
 
								4'h9:	begin 
										directionFlag = 1'b1; 
										operation = 11'd1892;	//PSUBUSW 
									end 
 
								4'hA:	operation = 11'd1893;	//PMINUB 
 
								4'hB:	operation = 11'd1894;	//PAND 
 
								4'hC:	operation = 11'd1895;	//PADDUSB 
 
								4'hD:	operation = 11'd1896;	//PADDUSW 
 
								4'hE:	operation = 11'd1897;	//PMAXUB 
 
								4'hF:	operation = 11'd1898;	//PANDN 
 
 
							endcase	//(opCode1[3:0]) 
 
						end	//2'hD 
 
					4'hE: 
						begin 
							case(opCode1[3:0]) 
 
 								4'h0:	operation = 11'd1899;	//PAVGB 
 
								4'h1:	operation = 11'd1900;	// PSRAW  xmm1,xmm2/m128 
 
								4'h2:	operation = 11'd1901;	//PSRAD  xmm1,xmm2/m128 
 
								4'h3:	operation = 11'd1902;	//PAVGW 
 
								4'h4:	operation = 11'd1903;	//PMULHUW 
 
								4'h5:	operation = 11'd1904;	//PMULHW 
 
								4'h6:	begin 
										if(repPrefixF2) //if rep Prefix F2 is set 
											operation = 11'd1905;	//VTPD2DQ 
										else if(operandOverridePrefix) 
											operation = 11'd1906;	//CVTTPD2DQ 
										else if(repPrefixF3) //if rep Prefix F3 is set 
											operation = 11'd1907;	//CVTDQ2PD 
									end 
 
 
								4'h7:	begin 
										operation = 11'd1908;	//MOVNTDQ 
										directionFlag = 1'b1; 
									end 
 
								4'h8:	begin 
										directionFlag = 1'b1; 
										operation = 11'd1909;	//PSUBSB 
									end 
 
								4'h9:	begin 
										directionFlag = 1'b1; 
										operation = 11'd1910;	//PSUBSW 
									end 
 
								4'hA:	operation = 11'd1911;	//PMINSW 
 
								4'hB:	operation = 11'd1912;	//POR 
 
								4'hC:	operation = 11'd1913;	//PADDSB 
 
								4'hD:	operation = 11'd1914;	//PADDSW 
 
								4'hE:	operation = 11'd1915;	//PMAXSW 
 
								4'hF:	operation = 11'd1916;	//PXOR 
 
 
							endcase	//(opCode1[3:0]) 
 
						end	//2'hE 
					4'hF: 
						begin 
							case(opCode1[3:0]) 
 
								4'h1:	operation = 11'd1917;	//PSLLW  xmm1,xmm2/m128 
 
								4'h2:	operation = 11'd1918;	//PSLLD  xmm1,xmm2/m128 
 
								4'h3:	operation = 11'd1919;	//PSLLQ  xmm1,xmm2/m128 
 
								4'h4:	begin 
										if(operandOverridePrefix) 
											operation = 11'd1920;	//PMULUDQ xmm 
										else 
											operation = 11'd1921;	//PMULUDQ mmx 
									end 
 
								4'h5:	operation = 11'd1922;	//PMADDWD 
 
								4'h6:	operation = 11'd1923;	//SADBW 
 
								4'h7:	operation = 11'd1924;	//MASKMOVDQU 
 
								4'h8:	begin 
										directionFlag = 1'b1; 
										operation = 11'd1925;	//PSUBB 
									end 
 
								4'h9:	begin 
										directionFlag = 1'b1; 
										operation = 11'd1926;	//PSUBW 
									end 
 
								4'hA:	begin 
										directionFlag = 1'b1; 
										operation = 11'd1927;	//PSUBD 
									end 
 
								4'hB:	begin 
										if(operandOverridePrefix) 
											operation = 11'd1928;	//PSUBQ  xmm 
										else 
											operation = 11'd1929;	//PSUBQ  mmx 
									end 
 
								4'hC:	operation = 11'd1930;	//PADDB 
 
								4'hD:	operation = 11'd1931;	//PADDW 
 
								4'hE:	operation = 11'd1932;	//PADDD 
 
 
							endcase	//(opCode1[3:0]) 
 
						end	//2'hF 
 
 
 
 
 
				endcase	//case (opCode1[7:4]) 
 
				//decode according  to the  mod  bit of  opcode 
 
				if(opCode2[7:6] ==2'b11)  		//if mod bit is 11  (if both of them are register operands) 
					begin 
						if( (operation != 11'd1742) || (operation != 11'd1743) || (operation != 11'd1742)  )	//if operation is != implicit operations 
							begin 
								modR_M_Byte = opCode2; 
								case(opCode1) 
				 
									8'h10,8'h11,8'h14,  8'h15,8'h28,8'h29, 
									8'h2E,8'h2F,8'h51,  8'h54,8'h55,8'h56, 
									8'h57,8'h58,8'h59,  8'h5A,8'h5B,8'h5C, 
									8'h5D,8'h5E,8'h5F,  8'h60,8'h61,8'h62, 
									8'h63,8'h64,8'h65,  8'h66,8'h67,8'h68, 
									8'h69,8'h6A,8'h6B,  8'h6C,8'h6D,8'h6F, 
									8'h74,8'h75,8'h76,  8'h7E,8'h7F,8'hD1, 
									8'hD2,8'hD3,8'hD5,  8'hD6,8'hD8,8'hD9, 
									8'hDA,8'hDB,8'hDC,  8'hDD,8'hDE,8'hDF, 
									8'hE0,8'hE1,8'hE2,  8'hE3,8'hE4,8'hE5, 
									8'hE6,8'hE8,8'hE9,  8'hEA,8'hEB,8'hEC, 
									8'hED,8'hEE,8'hEF,  8'hF1,8'hF2,8'hF3, 
						                        8'hF5,8'hF6,8'hF7,  8'hF8,8'hF9,8'hFA, 
									8'hFC,8'hFD,8'hFE:			//if both the operands  are xmm regiters 
										begin 
											op1Type =18'b10_1111_0000_0000_0010;  //destination 
											op2Type =18'b10_1111_0000_0000_0010;  // source 
											op1 = 32'd0; 
											op2 = 32'd0; 
											opSize =3'b101; // operand size is 128 bit 
											op1Type[9:7] = modR_M_Byte[5:3]; //destination register 
											op2Type[9:7] = modR_M_Byte[2:0]; //source register 
										end 
									 
									8'hD4,8'hF4,8'hFB:		//if both the operands  are mmreg regiters  or xmmreg registers 
										begin 
																						op1 = 32'd0; 
											op2 = 32'd0; 
											if(operandOverridePrefix) 
												begin 
													op1Type =18'b10_1111_0000_0000_0010;  //destination 
													op2Type =18'b10_1111_0000_0000_0010;  // source 
													opSize =3'b101; // operand size is 128 bit 
												end 
											else 
												begin 
													op1Type =18'b10_1111_0000_0000_0001;  //destination 
													op2Type =18'b10_1111_0000_0000_0001;  // source 
													opSize =3'b011; // operand size is 64 bit 
												end 
											op1Type[9:7] = modR_M_Byte[5:3]; //destination register 
											op2Type[9:7] = modR_M_Byte[2:0]; //source register 
 
											 
										end 
									8'h70,8'hC2,8'hC6:			//if both the operands  are xmmreg regiters + an immediate operand  
										begin 
 
											op1Type =18'b10_1111_0000_0000_0010;  //destination 
											op2Type =18'b10_1111_0000_0000_0010;  // source 
											op1 = instrSeq[23:16];											op2 = 32'd0; 
											opSize =3'b101; // operand size is 128 bit 
											op1Type[9:7] = modR_M_Byte[5:3]; //destination register 
											op2Type[9:7] = modR_M_Byte[2:0]; //source register 
										end          
									 
 
									8'hC4,8'hC5:			//one operand from xmmreg and another from r32  + an immediate operand  
										begin 
											op1Type =18'b10_1111_0000_0000_0000;  //destination r32 
											op2Type =18'b10_1111_0000_0000_0010;  // source xmm 
											op1 = instrSeq[23:16];											op2 = 32'd0; 
											opSize =3'b010; // operand size is 32 bit 
											op1Type[9:7] = modR_M_Byte[5:3]; //destination register 
											op2Type[9:7] = modR_M_Byte[2:0]; //source register 
									 
										end 
 
									8'h2A,8'h2C,8'h2D,8'h50,8'h6E,8'h7E,8'D6,8'hD7:			//one operand from xmmreg and another from r32   or  operands  from xmmreg to mmreg  
										begin 
											op2Type =18'b10_1111_0000_0000_0010;  // source xmmx 
											op1 = 32'd0; 
											op2 = 32'd0; 
											 
											if ( ( ( (opCode1 == 8'h2A) || (opCode1 == 8'h2C) || (opCode1 == 8'h2D) ) && (operandOverridePrefix == 1'b1) ) || (opCode1 == 88'hD6) )  //operands  from xmmreg to mmreg 
												begin 
													op1Type =18'b10_1111_0000_0000_0001;  //destination is mmreg 
													opSize =3'b011; // operand size is 64 bit										 
												end 
											else		//one operand from xmmreg and another from r32  
												begin 
													op1Type =18'b10_1111_0000_0000_0000;  //destination r32 
													opSize =3'b010; // operand size is 32 bit 
												end 
											op1Type[9:7] = modR_M_Byte[5:3]; //destination register 
											op2Type[9:7] = modR_M_Byte[2:0]; //source register 
 
										end 
									 
									8'h71,8'h72,8'h73:			//one operand from xmm  + an immediate operand 	 
										begin 
											op1Type =18'b10_1111_0000_0000_0010;  //destination  
											op2Type =18'b10_1111_0000_0000_0010;  // source 
											op1 = instrSeq[23:16];											op2 = 32'd0; 
											opSize =3'b101; // operand size is 128 bit 
											op1Type[9:7] = modR_M_Byte[5:3]; //destination register 
											op2Type[9:7] = modR_M_Byte[2:0]; //source register 
									 
										end   
 
								endcase 
							end 
 
					end//if(opCode2[7:0] == 2'b11) 
				else 
					begin 
						modR_M_Byte = opCode2; 
						op2Type[0] = 1'b0; 
						op1Type[9:7] = modR_M_Byte[5:3]; //destination register 
						op2Type[17] = 1'b0; // indirect addresing(memory addressing) 
						case(opCode1) 
 
							8'h10,8'h11,8'h12,  8'h13,8'h14,8'h15, 
							8'h16,8'h17,8'h28,  8'h29,8'h2A,8'h2B, 
							8'h2E,8'h2F,8'h51,  8'h52,8'h54,8'h55, 
							8'h56,8'h57,8'h58,  8'h59,8'h5A,8'h5B, 
							8'h5C,8'h5D,8'h5E,  8'h5F,8'h60,8'h61, 
							8'h62,8'h63,8'h64,  8'h65,8'h66,8'h67, 
							8'h68,8'h69,8'h6A,  8'h6B,8'h6C,8'h6D, 
							8'h6E,8'h6F,8'h74,  8'h75,8'h76,8'h7E, 
							8'hD1,8'hD2,8'hD3,  8'hD5,8'hD6,8'hD8, 
							8'hD9,8'hDA,8'hDB,  8'hDC,8'hDD,8'hDE, 
							8'hDF,8'hE0,8'hE1,  8'hE2,8'hE3,8'hE4, 
							8'hE5,8'hE6,8'hE7,  8'hE8,8'hE9,8'hEA, 
							8'hEB,8'hEC,8'hED,  8'hEE,8'hEF,8'hF1, 
							8'hF2,8'hF3,8'hF5,  8'hF6,8'hF8,8'hF9, 
							8'hFA,8'hFC,8'hFD,  8'hFE:		//reading memory to xmm register 
								begin 
									op1Type =18'b10_1111_0000_0000_0010;  //destination 
									op1 = 32'd0; 
									op2 = 32'd0; 
									opSize =3'b101; // operand size is 128 bit 
								end 
								 
							8'h2C,8'h2D:			 
								begin 
									op1 = 32'd0; 
									op2 = 32'd0; 
									if(operandOverridePrefix)//reading memory to general purpose registers 
										begin 
											op1Type =18'b10_1111_0000_0000_0001;  //destination 
											opSize =3'b011; // operand size is 64 bit 
										end 
									else				// reading memory to  mmreg regiters 
										begin	 
											op1Type =18'b10_1111_0000_0000_0000;  //destination 
											opSize =3'b010; // operand size is 32 bit 
										end 
					 
								end 
							8'hD4,8'hF4,8'hFB:			 
								begin 
									op1 = 32'd0; 
									op2 = 32'd0; 
									if(operandOverridePrefix)//reading memory to xmms registers 
										begin 
											op1Type =18'b10_1111_0000_0000_0010;  //destination 
											opSize =3'b101; // operand size is 128 bit 
										end 
									else				// reading memory to  mmreg regiters 
										begin	 
											op1Type =18'b10_1111_0000_0000_0001;  //destination 
											opSize =3'b011; // operand size is 128 bit 
										end 
					 
								end 
 
				 
							8'hC3,8'hAE:			//reading memory to general purpose registers 
								begin 
									op1Type =18'b10_1111_0000_0000_0000;  //destination 
									op1 = 32'd0; 
									op2 = 32'd0; 
									opSize =3'b010; // operand size is 32 bit 
					 
								end 
							8'h70,8'hC2,8'hC4,8'hC6:			//reading memory to xmm registers + imm8 
								begin 
									op1Type =18'b10_1111_0000_0000_0010;  //destination 
									op1 = instrSeq[23:16];//------------------------------>>>>>>>>>>>>> i  dont know  what  i  have   t  give 
									op2 = 32'd0; 
									if(opCode1 == 8'hC4) 
										opSize =3'b001; // operand size is 16 bit 
									else 
										opSize =3'b101; // operand size is 128 bit 
								end 
 
 
 
						endcase		//	case(opCode1) 
 
 
 
						case(opCode2[7:6]) 
								 
							2'b00:  // if mod bit is 00 
	 
								begin 
									if(!addressSize)  //16 bit addressing 
										begin 
											if(modR_M_Byte[2:0] == 3'b110)  // 16 bit displacement 
												begin 
													op2Type[13:12] = 2'b01; 
													op2[16:0] = instrSeq[31:16];  //displacemt alone							 
												end 
											else 
												begin 
													if ((modR_M_Byte[2:1] == 2'b00) ||(modR_M_Byte[2:0] == 3'b111)) // base = BX 
														begin 
															op2Type[8:5]	= 4'b0011; 
															op2Type[11:9] 	= 3'b011;  
														end 
													if (modR_M_Byte[2:1] == 2'b01)  //base = BP 
													//	if(!((modR_M_Byte[7:6] == 00) &&(modR_M_Byte[2:0] == 3'b110))) 
														begin 
															op2Type[8:5]	= 4'b0101; 
															op2Type[11:9]	= 3'b010; 
														end 
													if ((modR_M_Byte[0] == 0) && (modR_M_Byte[2:1] != 2'b11)) // index = SI 
														op2Type[4:2]	= 3'b110; 
													if ((modR_M_Byte[0] == 1) && (modR_M_Byte[2:1] != 2'b11)) // index = DI 
															op2Type[4:2]	= 3'b111; 
												end 
										end  //if(!adressSize) 
									else  //if 32 bit addressing 
										begin 
											case (modR_M_Byte[2:0])  
												3'b101:  // 32 bit displacement 
													begin 
														op2Type[13:12] = 2'b10; 
														op2 = instrSeq[55:24];  //displacemt alone							 
													end 
												3'b100:  // SIB Byte  present 
													begin 
														SIB_Byte = instrSeq[23:16];	// 
														op2Type[1:0] 	= SIB_Byte[7:6]; // scale 
														op2Type[4:2]	= SIB_Byte[5:3]; // index 
														op2Type[7:5]	= SIB_Byte[2:0]; // base 
														op2Type[8]	= 0; // base 
														if( op2Type[7:5] == 3'b100) 
															op2Type[11:9] = 3'b010; // segment = SS 
														else if( op2Type[7:5] == 3'b101)//only displacement  with no  base 
															begin 
																op2Type[11:9] = 3'b011; // segment = DS 
																op2Type[8:5] = 4'b1000;//no  base 
																op2Type[13:12] = 2'b10; // 32 bit displacement is present 
																op2 = instrSeq[55:24]; //displacement is there in op2 
															end 
														else 
															op2Type[11:9] = 3'b011; // segment = DS 
													end 
												default 
													begin 
														op2Type[7:5] = modR_M_Byte[2:0];   //base is in the R/M  field 
														op2Type[8]   = 0; 
														op2Type[11:9]= 3'b011; // segment = DS 
													end 
											endcase  //(modR_M_Byte[2:0])  
										end //else  of if(!adressSize) 
								end  //case 2'b00: 
 
							2'b01:  //if mod bit is 01 
		 
								begin 
									op2Type[13:12] = 2'b0; // 8 bit displacement is present 
									if(!addressSize)  //16 bit addressing 
										begin 
											op2[7:0] = instrSeq[23:15]; //displacement is there in op2 
											if ((modR_M_Byte[2:1] == 2'b00) ||(modR_M_Byte[2:0] == 3'b111)) // base = BX 
												begin 
													op2Type[8:5]	= 4'b0011; //base BX 
													op2Type[11:9] 	= 3'b011;   //data segment 
												end 
											if ( (modR_M_Byte[2:1] == 2'b01) ||(modR_M_Byte[2:0] == 3'b110)) //base = BP 
												begin 
													op2Type[8:5]	= 4'b0101;  //base BP 
													op2Type[11:9]	= 3'b010;   //stack segment 
												end 
											if ((modR_M_Byte[0] == 0) && (modR_M_Byte[2:1] != 2'b11)) // index = SI 
												op2Type[4:2]	= 3'b110; 
											if ((modR_M_Byte[0] == 1) && (modR_M_Byte[2:1] != 2'b11)) // index = DI 
												op2Type[4:2]	= 3'b111; 
										end  //if(!adressSize) 
									else  //if 32 bit addressing 
										begin 
									 
											case (modR_M_Byte[2:0])  
												3'b100:  // SIB Byte  present 
													begin 
														SIB_Byte = instrSeq[23:16]; 
														op2Type[1:0] 	= SIB_Byte[7:6]; // scale 
														op2Type[4:2]	= SIB_Byte[5:3]; // index 
														op2Type[7:5]	= SIB_Byte[2:0]; // base 
														op2Type[8]	= 0; // base 
														if( op2Type[7:5] == 3'b100) 
															op2Type[11:9] = 3'b010; // segment = SS 
											 
														else 
															op2Type[11:9] = 3'b011; // segment = DS 
														op2[7:0] = instrSeq[31:24]; //displacement is there in op2 
													end 
												default 
													begin 
														op2Type[7:5] = modR_M_Byte[2:0];   //base is in the R/M  field 
														op2Type[8]   = 0; 
														if(modR_M_Byte[2:0] == 3'b101) 
															op2Type[11:9] = 3'b010; // segment = SS 
														else 
															op2Type[11:9] = 3'b011; // segment = DS 
															op2[7:0] = instrSeq[23:16]; //displacement is there in op2 
													end 
											endcase  //(modR_M_Byte[2:0])  
										end //else  of if(!adressSize) 
								end  //case 2'b01: 
 
							2'b10:  // if mod bit is 10 
		 
								begin 
									if(!addressSize)  //16 bit addressing 
										begin 
											op2Type[13:12] = 2'b10; // 16 bit displacement is present 
											op2[15:0] = instrSeq[31:16]; //displacement is there in op2 
											if ((modR_M_Byte[2:1] == 2'b00) ||(modR_M_Byte[2:0] == 3'b111)) // base = BX 
												begin 
													op2Type[8:5]	= 4'b0011; //base BX 
													op2Type[11:9] 	= 3'b011;   //data segment 
												end 
											if ( (modR_M_Byte[2:1] == 2'b01) ||(modR_M_Byte[2:0] == 3'b110)) //base = BP 
												begin 
													op2Type[8:5]	= 4'b0101;  //base BP 
													op2Type[11:9]	= 3'b010;   //stack segment 
												end 
											if ((modR_M_Byte[0] == 0) && (modR_M_Byte[2:1] != 2'b11)) // index = SI 
												op2Type[4:2]	= 3'b110; 
											if ((modR_M_Byte[0] == 1) && (modR_M_Byte[2:1] != 2'b11)) // index = DI 
												op2Type[4:2]	= 3'b111; 
										end  //if(!adressSize) 
									else  //if 32 bit addressing 
										begin 
											op2Type[13:12] = 2'b10; // 32 bit displacement is present 
												case (modR_M_Byte[2:0])  
													3'b100:  // SIB Byte  present 
														begin 
															SIB_Byte = instrSeq[23:16]; 
															op2Type[1:0] 	= SIB_Byte[7:6]; // scale 
															op2Type[4:2]	= SIB_Byte[5:3]; // index 
															op2Type[7:5]	= SIB_Byte[2:0]; // base 
															op2Type[8]	= 0; // base 
															if( op2Type[7:5] == 3'b100) 
																op2Type[11:9] = 3'b010; // segment = SS 
															else 
																op2Type[11:9] = 3'b011; // segment = DS 
															op2 = instrSeq[55:24]; //displacement is there in op2 
			 
														end 
													default 
														begin 
															op2Type[7:5] = modR_M_Byte[2:0];   //base is in the R/M  field 
															op2Type[8]   = 0; 
															if(modR_M_Byte[2:0] == 3'b101) 
																op2Type[11:9] = 3'b010; // segment = SS 
															else 
																op2Type[11:9] = 3'b011; // segment = DS 
															op2 = instrSeq[47:16]; //displacement is there in op2 
													 
														end 
												endcase  //(modR_M_Byte[2:0])  
										end //else  of if(!adressSize) 
								end  //case 2'b10: 
						endcase		//	case(opCode[7:6]) 
 
				end		//else of opCode[7:6] == 2'b11 
		 
 
				if(directionFlag == 1'b1)// if direction flag is set 
					begin 
						tempOpType 	= op1Type; 
						op1Type 	= op2Type; 
						op2Type 	= tempOpType; 
						tempOp		= op1; 
						op1		= op2; 
						op2		= op1; 
					end 
 
				directionFlag = 1'b0; 
			 
		end // if (enable == 1) 
	end //always@(Enable) 
 
endmodule