www.pudn.com > x86.rar > mmxalu.v, change:2007-12-05,size:51014b


/*This module is the top module for the MMX Unit*/  
 
 
 
 
 
module mmxAlu(enablealu,Operation, Operand1, Operand2, Result); 
	input enablealu; 
	input [10:0]  Operation; 
	input [63:0] Operand1, Operand2; 
 
	output [63:0] Result; 
 
       	reg  [63:0]  Result; 
	reg  [31:0]  cla1Op1, cla1Op2,cla2Op1, cla2Op2,cla3Op1, cla3Op2,cla4Op1, cla4Op2; 
	reg  [15:0]  cla16_1Op1,cla16_2Op1,cla16_3Op1,cla16_4Op1; 
	reg  [15:0]  cla16_1Op2,cla16_2Op2,cla16_3Op2,cla16_4Op2; 
 
	reg  [7:0]   cla8_1Op1,cla8_2Op1,cla8_3Op1,cla8_4Op1,cla8_5Op1,cla8_6Op1,cla8_7Op1,cla8_8Op1; 
	reg  [7:0]   cla8_1Op2,cla8_2Op2,cla8_3Op2,cla8_4Op2,cla8_5Op2,cla8_6Op2,cla8_7Op2,cla8_8Op2; 
 
	reg          cIn1, cIn2, cIn8_1, cIn8_2, cIn8_3, cIn8_4, cIn8_5, cIn8_6,cIn8_7,cIn8_8; 
	reg          cIn16_1, cIn16_2,cIn16_3,cIn16_4; 
 
	reg  [63:0]  shiftIn0; 
	reg  [63:0]  Count0,Count1,Count2,Count3,Count4; 
 
	reg  [31:0]  multiplicand1, multiplier1; 
	reg  [31:0]  multiplicand2, multiplier2; 
	reg  [31:0]  multiplicand3, multiplier3; 
	reg  [31:0]  multiplicand4, multiplier4; 
	reg          sign1, sign2, sign3, sign4; 
	reg  [7:0]   OP8_IN1,OP8_IN2,OP8_IN3,OP8_IN4,OP8_IN5,OP8_IN6,OP8_IN7,OP8_IN8; 
	reg  [15:0]  OP16_IN1,OP16_IN2,OP16_IN3,OP16_IN4; 
 
	reg  [31:0]  OP32_IN1,OP32_IN2; 
 
 
 
 
 
	wire [63:0]  product1,product2,product3,product4; 
 
	wire [31:0]  cla1Out, cla2Out, cla3Out, cla4Out; 
	wire [7:0]   cla8_1Out,cla8_2Out,cla8_3Out,cla8_4Out,cla8_5Out,cla8_6Out,cla8_7Out,cla8_8Out; 
	wire [31:0]  shiftOut1, shiftOut2, shiftOut3, shiftOut4; 
	wire [15:0]  shift16Out1,shift16Out2,shift16Out3,shift16Out4; 
 
	wire [63:0]  shiftOut0; 
	wire [15:0]  shift_A1_Out,shift_A2_Out,shift_A3_Out,shift_A4_Out; 
	wire [31:0]  shiftA32_Out1,shiftA32_Out2; 
	wire [7:0]   OP8_OUT1,OP8_OUT2,OP8_OUT3,OP8_OUT4,OP8_OUT5,OP8_OUT6,OP8_OUT7,OP8_OUT8; 
	wire [15:0]  cla16_1Out,cla16_2Out,cla16_3Out,cla16_4Out; 
 
	wire [8:1]   cout8_1,cout8_2,cout8_3,cout8_4,cout8_5,cout8_6,cout8_7,cout8_8; 
	wire [16:1]  cout1,cout2,cout3,cout4; 
 
	wire [15:0]  OP16_OUT1,OP16_OUT2,OP16_OUT3,OP16_OUT4; 
	wire [31:0]  OP32_OUT1,OP32_OUT2; 
 
	reg  [31:0]  shiftIn1, shiftIn2, shiftIn3, shiftIn4; 
	reg  [15:0]  shift16In1,shift16In2,shift16In3,shift16In4; 
	reg          direction,direction0,direction16; 
	reg  [15:0]  shift_A1_In,shift_A2_In,shift_A3_In,shift_A4_In; 
	reg  [31:0]  shiftA32_In1,shiftA32_In2; 
 
	reg  [63:0]  Count_A1,Count_A2,Count_A3,Count_A4; 
	reg  [63:0]  Count1_AS32,Count2_AS32; 
	reg  [63:0]  Count16_1,Count16_2,Count16_3,Count16_4; 
	reg  [7:0]   temp; 
	reg  [7:0]   comp8_1In1,comp8_2In1,comp8_3In1,comp8_4In1,comp8_5In1,comp8_6In1,comp8_7In1,comp8_8In1; 
	reg  [7:0]   comp8_1In2,comp8_2In2,comp8_3In2,comp8_4In2,comp8_5In2,comp8_6In2,comp8_7In2,comp8_8In2; 
	wire [2:0]   comp8Out1,comp8Out2,comp8Out3,comp8Out4,comp8Out5,comp8Out6,comp8Out7,comp8Out8; 
	reg  [15:0]  comp16_1In1,comp16_2In1,comp16_3In1,comp16_4In1; 
	reg  [15:0]  comp16_1In2,comp16_2In2,comp16_3In2,comp16_4In2; 
	wire [2:0]   comp16Out1,comp16Out2,comp16Out3,comp16Out4; 
	reg  [31:0]  comp32_1In1,comp32_1In2,comp32_2In1,comp32_2In2; 
	wire [2:0]   comp32Out1,comp32Out2; 
//  Instantiating 32 bit multipliers 
multiply32 multiplyInst1(product1, multiplicand1, multiplier1, sign1); 
multiply32 multiplyInst2(product2, multiplicand2, multiplier2, sign2); 
multiply32 multiplyInst3(product3, multiplicand3, multiplier3, sign3); 
multiply32 multiplyInst4(product4, multiplicand4, multiplier4, sign4); 
 
 
//  Instantiating 8 bit Carry Look-ahead adders 
cla8Bit  cla8Inst01( cla8_1Out, cout8_1 , cla8_1Op1, cla8_1Op2, cIn8_1); 
cla8Bit  cla8Inst02( cla8_2Out, cout8_2 , cla8_2Op1, cla8_2Op2, cIn8_2); 
cla8Bit  cla8Inst03( cla8_3Out, cout8_3 , cla8_3Op1, cla8_3Op2, cIn8_3); 
cla8Bit  cla8Inst04( cla8_4Out, cout8_4 , cla8_4Op1, cla8_4Op2, cIn8_4); 
cla8Bit  cla8Inst05( cla8_5Out, cout8_5 , cla8_5Op1, cla8_5Op2, cIn8_5); 
cla8Bit  cla8Inst06( cla8_6Out, cout8_6 , cla8_6Op1, cla8_6Op2, cIn8_6); 
cla8Bit  cla8Inst07( cla8_7Out, cout8_7 , cla8_7Op1, cla8_7Op2, cIn8_7); 
cla8Bit  cla8Inst08( cla8_8Out, cout8_8 , cla8_8Op1, cla8_8Op2, cIn8_8); 
 
 
 
//  Instantiating 16 bit Carry Look-ahead adders 
cla16Bit cla16Inst01( cla16_1Out, cout1 , cla16_1Op1, cla16_1Op2, cIn16_1); 
cla16Bit cla16Inst02( cla16_2Out, cout2 , cla16_2Op1, cla16_2Op2, cIn16_2); 
cla16Bit cla16Inst03( cla16_3Out, cout3 , cla16_3Op1, cla16_3Op2, cIn16_3); 
cla16Bit cla16Inst04( cla16_4Out, cout4 , cla16_4Op1, cla16_4Op2, cIn16_4); 
 
 
//  Instantiating 32 bit Carry Look-ahead adders 
cla32Bit claInst01( cla1Out, , cla1Op1, cla1Op2, cIn1); 
cla32Bit claInst02( cla2Out, , cla2Op1, cla2Op2, cIn2); 
 
 
//  Instantiating 8 bit comparator 
compare8 compare8_1(comp8Out1, comp8_1In1, comp8_1In2); 
compare8 compare8_2(comp8Out2, comp8_2In1, comp8_2In2); 
compare8 compare8_3(comp8Out3, comp8_3In1, comp8_3In2); 
compare8 compare8_4(comp8Out4, comp8_4In1, comp8_4In2); 
compare8 compare8_5(comp8Out5, comp8_5In1, comp8_5In2); 
compare8 compare8_6(comp8Out6, comp8_6In1, comp8_6In2); 
compare8 compare8_7(comp8Out7, comp8_7In1, comp8_7In2); 
compare8 compare8_8(comp8Out8, comp8_8In1, comp8_8In2); 
 
//  Instantiating 16 bit comparator 
compare16 compare16_1(comp16Out1, comp16_1In1, comp16_1In2); 
compare16 compare16_2(comp16Out2, comp16_2In1, comp16_2In2); 
compare16 compare16_3(comp16Out3, comp16_3In1, comp16_3In2); 
compare16 compare16_4(comp16Out4, comp16_4In1, comp16_4In2); 
 
//  Instantiating 32 bit comparator 
compare compare32_1(comp32Out1, comp32_1In1, comp32_1In2); 
compare compare32_2(comp32Out2, comp32_2In1, comp32_2In2); 
 
 
//  Instantiating 16 shift logical 
shift_16_Logical shift16_1(shift16Out1, shift16In1, Count16_1, direction16); 
shift_16_Logical shift16_2(shift16Out2, shift16In2, Count16_2, direction16); 
shift_16_Logical shift16_3(shift16Out3, shift16In3, Count16_3, direction16); 
shift_16_Logical shift16_4(shift16Out4, shift16In4, Count16_4, direction16); 
 
//  Instantiating 32 shift logical 
shift_32_Logical shift32_1(shiftOut1, shiftIn1, Count1, direction); 
shift_32_Logical shift32_2(shiftOut2, shiftIn2, Count2, direction); 
 
//module shift_64_Logical(shiftOut, shiftIn, Count, direction); 
shift_64_Logical shift64(shiftOut0, shiftIn0, Count0, direction0); 
 
shift16Arith shift1_A16(shift_A1_Out, shift_A1_In, Count_A1); 
shift16Arith shift2_A16(shift_A2_Out, shift_A2_In, Count_A2); 
shift16Arith shift3_A16(shift_A3_Out, shift_A3_In, Count_A3); 
shift16Arith shift4_A16(shift_A4_Out, shift_A4_In, Count_A4); 
 
shift32Arith shift1_A32(shiftA32_Out1, shiftA32_In1, Count1_AS32); 
shift32Arith shift2_A32(shiftA32_Out2, shiftA32_In2, Count2_AS32); 
 
 
//  Instantiating 8 bit Two's compliment module 
 
twosComp8 twosComp8_1(OP8_OUT1, OP8_IN1); 
twosComp8 twosComp8_2(OP8_OUT2, OP8_IN2); 
twosComp8 twosComp8_3(OP8_OUT3, OP8_IN3); 
twosComp8 twosComp8_4(OP8_OUT4, OP8_IN4); 
twosComp8 twosComp8_5(OP8_OUT5, OP8_IN5); 
twosComp8 twosComp8_6(OP8_OUT6, OP8_IN6); 
twosComp8 twosComp8_7(OP8_OUT7, OP8_IN7); 
twosComp8 twosComp8_8(OP8_OUT8, OP8_IN8); 
 
//  Instantiating 16 bit Two's compliment module 
 
twosComp16 twosComp16_1(OP16_OUT1, OP16_IN1); 
twosComp16 twosComp16_2(OP16_OUT2, OP16_IN2); 
twosComp16 twosComp16_3(OP16_OUT3, OP16_IN3); 
twosComp16 twosComp16_4(OP16_OUT4, OP16_IN4); 
 
//  Instantiating 32 bit Two's compliment module 
 
twosComp twosComp32_1(OP32_OUT1, OP32_IN1); 
twosComp twosComp32_2(OP32_OUT2, OP32_IN2); 
 
 
 
always @ (enablealu or Operation or Operand1 or Operand2 or shiftIn0 or shiftOut0 or Count0 or Count1 
or direction0 or shiftIn1 or shiftIn2 or shiftIn3 or shiftIn4 or Count1 or Count2 or Count3 or Count4 
or shiftOut1 or shiftOut2 or shiftOut3 or shiftOut4 or product1 or multiplicand1 or multiplier1 or sign1 
or product2 or multiplicand2 or multiplier2 or sign2 or product3 or multiplicand3 or multiplier3 or sign3 
or product4 or multiplicand4 or multiplier4 or sign4 or cla1Out or cla1Op1 or cla1Op2 or cIn1 or cla2Out 
or cla2Op1 or cla2Op2 or cIn2 or shift_A1_Out or shift_A2_Out or shift_A3_Out or shift_A4_Out or shift_A1_In 
or shift_A2_In or shift_A3_In or shift_A4_In or Count_A1 or Count_A2 or Count_A3 or Count_A4 or shiftA32_Out1 
or shiftA32_Out2 or shiftA32_In1 or shiftA32_In2 or Count1_AS32 or Count2_AS32 or OP8_OUT1 or OP8_OUT2 or OP8_OUT3 
or OP8_OUT4 or OP8_OUT5 or OP8_OUT6 or OP8_OUT7 or OP8_OUT8 or OP16_OUT1 or OP16_OUT2 or OP16_OUT3 or OP16_OUT4 
or OP32_OUT1 or OP32_OUT2 or cla8_1Out or cla8_2Out or cla8_3Out or cla8_4Out or cla8_5Out or cla8_6Out or cla8_7Out or cla8_8Out 
or cla16_1Out or cla16_2Out or cla16_3Out or cla16_4Out or cout8_1 or cout8_2 or cout8_3 or cout8_4 or cout8_5 or cout8_6 
or cout8_7 or cout8_8 or shift16Out1 or shift16Out2 or shift16Out3 or shift16Out4 or comp8Out1 or comp8Out2 or comp8Out3 
or comp8Out4 or comp8Out5 or comp8Out6 or comp8Out7 or comp8Out8 or comp16Out1 or comp16Out2 or comp16Out3 or comp16Out4 
or comp32Out1 or comp32Out2 or cout1 or cout2 or cout3 or cout4) 
 
 begin 
 
 
  if(enablealu) 
   begin 
	 
	  //  Initialize all the variables to zero 
	  Result = 64'b0; 
	  cla1Op1 = 32'b0; cla1Op2 = 32'b0; 
	  cla2Op1 = 32'b0; cla2Op2 = 32'b0; 
	  cla3Op1 = 32'b0; cla3Op2 = 32'b0; 
	  cla4Op1 = 32'b0; cla4Op2 = 32'b0; 
 
	  cIn8_1 = 1'b0; 
	  cIn8_2 = 1'b0; 
	  cIn8_3 = 1'b0; 
	  cIn8_4 = 1'b0; 
	  cIn8_5 = 1'b0; 
	  cIn8_6 = 1'b0; 
	  cIn8_7 = 1'b0; 
	  cIn8_8 = 1'b0; 
 
   	  cIn16_1 = 1'b0; 
   	  cIn16_2 = 1'b0; 
   	  cIn16_3 = 1'b0; 
   	  cIn16_4 = 1'b0; 
 
   	  cIn1 = 1'b0; 
   	  cIn2 = 1'b0; 
 
 
 
  case(Operation) 
 
 
// Arithmetic Instructions 
 
/* ************************************* */ 
   11'd1029: // PADDB - PACKED BYTE Add		 
    begin 
 
     cla8_1Op1 = Operand1[7:0]; 
     cla8_1Op2 = Operand2[7:0]; 
 
     cla8_2Op1 = Operand1[15:8]; 
     cla8_2Op2 = Operand2[15:8]; 
 
     cla8_3Op1 = Operand1[23:16]; 
     cla8_3Op2 = Operand2[23:16]; 
 
     cla8_4Op1 = Operand1[31:24]; 
     cla8_4Op2 = Operand2[31:24]; 
 
     cla8_5Op1 = Operand1[39:32]; 
     cla8_5Op2 = Operand2[39:32]; 
 
     cla8_6Op1 = Operand1[47:40]; 
     cla8_6Op2 = Operand2[47:40]; 
 
     cla8_7Op1 = Operand1[55:48]; 
     cla8_7Op2 = Operand2[55:48]; 
 
     cla8_8Op1 = Operand1[63:56]; 
     cla8_8Op2 = Operand2[63:56]; 
 
 
     Result[63:0] = {cla8_8Out,cla8_7Out,cla8_6Out,cla8_5Out,cla8_4Out,cla8_3Out,cla8_2Out,cla8_1Out}; 
 
    end 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1030: // PADDW - PACKED WORD Add		 
    begin 
 
     cIn16_1 = 1'b0; 
     cIn16_2 = 1'b0; 
     cIn16_3 = 1'b0; 
     cIn16_4 = 1'b0; 
 
     cla16_1Op1[15:0] = Operand1[15:0];		//  give the first operand's 1st word to cla1 as input 
     cla16_1Op2[15:0] = Operand2[15:0];		//  give the second operand's 1st word to cla1 as input 
 
     cla16_2Op1[15:0] = Operand1[31:16];	//  give the first operand's 2nd word to cla2 as input 
     cla16_2Op2[15:0] = Operand2[31:16];	//  give the second operand's 2nd word to cla2 as input 
 
     cla16_3Op1[15:0] = Operand1[47:32];	//  give the first operand's 3rd word to cla3 as input 
     cla16_3Op2[15:0] = Operand2[47:32];	//  give the second operand's 3rd word to cla3 as input 
 
     cla16_4Op1[15:0] = Operand1[63:48];	//  give the first operand's 4th word to cla4 as input 
     cla16_4Op2[15:0] = Operand2[63:48];	//  give the second operand's 4th word to cla4 as input 
 
 
     Result[63:0] = {cla16_4Out, cla16_3Out, cla16_2Out, cla16_1Out}; 
 
    end 
/* ************************************* */ 
 
 
/* ************************************* */ 
   11'd1031: // PADDD - PACKED DOUBLE WORD Add			 
    begin 
 
     cIn1 = 1'b0; 
     cIn2 = 1'b0; 
 
     cla1Op1[31:0] = Operand1[31:0];		//  give the first operand's 1st 32 bits to cla1 as input 
     cla1Op2[31:0] = Operand2[31:0];		//  give the second operand's 1st 32 bits to cla1 as input 
 
     cla2Op1[31:0] = Operand1[63:32];		//  give the first operand's 2nd double word to cla2 as input 
     cla2Op2[31:0] = Operand2[63:32];		//  give the second operand's 2nd double word to cla2 as input 
 
 
     Result[63:0] = {cla2Out[31:0], cla1Out[31:0]}; 
 
    end 
/* ************************************* */ 
 
 
/************************************** */ 
   11'd1035: // PADDSB - PACKED Byte signed Add with Saturation		 
    begin 
 
	cla8_1Op1 = Operand1[7:0]; 
	cla8_1Op2 = Operand2[7:0]; 
        case({Operand1[7],Operand2[7]}) 
          2'b11: Result[7:0] = cla8_1Out[7] == 1'b0 ? 8'h80 : cla8_1Out; 
          2'b00: Result[7:0] = (cout8_1[8] | cla8_1Out[7]) == 1'b1  ? 8'h7f : cla8_1Out; 
          default: 
                 Result[7:0] = cla8_1Out[7:0]; 
        endcase 
 
	cla8_2Op1 = Operand1[15:8]; 
	cla8_2Op2 = Operand2[15:8]; 
        case({Operand1[15],Operand2[15]}) 
          2'b11: Result[15:8] = cla8_2Out[7] == 1'b0 ? 8'h80 : cla8_2Out; 
          2'b00: Result[15:8] = (cout8_2[8] | cla8_2Out[7]) == 1'b1 ? 8'h7f : cla8_2Out; 
          default: 
                 Result[15:8] = cla8_2Out[7:0]; 
        endcase 
 
	cla8_3Op1 = Operand1[23:16]; 
	cla8_3Op2 = Operand2[23:16]; 
        case({Operand1[23],Operand2[23]}) 
          2'b11: Result[23:16] =  cla8_3Out[7] == 1'b0 ? 8'h80 : cla8_3Out; 
          2'b00: Result[23:16] = (cout8_3[8] | cla8_3Out[7]) == 1'b1 ? 8'h7f : cla8_3Out; 
          default: 
                 Result[23:16] = cla8_3Out[7:0]; 
        endcase 
 
	cla8_4Op1 = Operand1[31:24]; 
	cla8_4Op2 = Operand2[31:24]; 
        case({Operand1[31],Operand2[31]}) 
          2'b11: Result[31:24] = cla8_4Out[7] == 1'b0 ? 8'h80 : cla8_4Out; 
          2'b00: Result[31:24] = (cout8_4[8] | cla8_4Out[7]) == 1'b1 ? 8'h7f : cla8_4Out; 
          default: 
                 Result[31:24] = cla8_4Out[7:0]; 
        endcase 
 
	cla8_5Op1 = Operand1[39:32]; 
	cla8_5Op2 = Operand2[39:32]; 
        case({Operand1[39],Operand2[39]}) 
          2'b11: Result[39:32] =  cla8_5Out[7] == 1'b0 ? 8'h80 : cla8_5Out; 
          2'b00: Result[39:32] = (cout8_5[8] | cla8_5Out[7])  == 1'b1 ? 8'h7f : cla8_5Out; 
          default: 
                 Result[39:32] = cla8_5Out[7:0]; 
        endcase 
 
	cla8_6Op1 = Operand1[47:40]; 
	cla8_6Op2 = Operand2[47:40]; 
        case({Operand1[47],Operand2[47]}) 
          2'b11: Result[47:40] = cla8_6Out[7] == 1'b0 ? 8'h80 : cla8_6Out; 
          2'b00: Result[47:40] = (cout8_6[8] | cla8_6Out[7])  == 1'b1 ? 8'h7f : cla8_6Out; 
          default: 
                 Result[47:40] = cla8_6Out[7:0]; 
        endcase 
 
	cla8_7Op1 = Operand1[55:48]; 
	cla8_7Op2 = Operand2[55:48]; 
        case({Operand1[55],Operand2[55]}) 
          2'b11: Result[55:48] =  cla8_7Out[7] == 1'b0 ? 8'h80 : cla8_7Out; 
          2'b00: Result[55:48] = (cout8_7[8] | cla8_7Out[7])  == 1'b1 ? 8'h7f : cla8_7Out; 
          default: 
                 Result[55:48] = cla8_7Out[7:0]; 
        endcase 
 
 
	cla8_8Op1 = Operand1[63:56]; 
	cla8_8Op2 = Operand2[63:56]; 
        case({Operand1[63],Operand2[63]}) 
          2'b11: Result[63:56] =  cla8_8Out[7] == 1'b0 ? 8'h80 : cla8_8Out; 
          2'b00: Result[63:56] =  (cout8_8[8] | cla8_8Out[7])  == 1'b1 ?8'h7f : cla8_8Out; 
          default: 
                 Result[63:56] = cla8_8Out[7:0]; 
        endcase 
 
end 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1036: // PADDSW - PACKED Word signed Add with Saturation		 
 
    begin 
 
	cla16_1Op1 = Operand1[15:0]; 
	cla16_1Op2 = Operand2[15:0]; 
        case({Operand1[15],Operand2[15]}) 
          2'b11: Result[15:00] = cla16_1Out[15] == 1'b0  ? 16'h8000 : cla16_1Out; 
          2'b00: Result[15:00] = (cout1[16] | cla16_1Out[15]) == 1'b1 ?  16'h7fff : cla16_1Out; 
          default: 
                 Result[15:00] = cla16_1Out[15:0]; 
        endcase  
 
	cla16_2Op1 = Operand1[31:16]; 
	cla16_2Op2 = Operand2[31:16]; 
 
        case({Operand1[31],Operand2[31]}) 
          2'b11: Result[31:16] = cla16_2Out[15] == 1'b0  ? 16'h8000 : cla16_2Out; 
          2'b00: Result[31:16] = (cout2[16] | cla16_2Out[15]) == 1'b1 ?  16'h7fff : cla16_2Out; 
          default: 
                 Result[31:16] = cla16_2Out[15:0]; 
        endcase  
 
	cla16_3Op1 = Operand1[47:32]; 
	cla16_3Op2 = Operand2[47:32]; 
 
        case({Operand1[47],Operand2[47]}) 
          2'b11: Result[47:32] =  cla16_3Out[15] == 1'b0  ? 16'h8000 : cla16_3Out; 
          2'b00: Result[47:32] = (cout3[16] | cla16_3Out[15]) == 1'b1 ? 16'h7fff : cla16_3Out; 
          default: 
                 Result[47:32] = cla16_3Out[15:0]; 
        endcase  
 
	cla16_4Op1 = Operand1[63:48]; 
	cla16_4Op2 = Operand2[63:48]; 
 
        case({Operand1[63],Operand2[63]}) 
          2'b11: Result[63:48] =  cla16_4Out[15] == 1'b0 ? 16'h8000 : cla16_4Out; 
          2'b00: Result[63:48] =  (cout4[16] | cla16_4Out[15]) == 1'b1 ? 16'h7fff : cla16_4Out; 
          default: 
                 Result[63:48] = cla16_4Out[15:0]; 
        endcase  
 
    end 
 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1040: // PADDUSB - PACKED Unsigned Byte Add with Saturation		 
    begin 
 
	cla8_1Op1 = Operand1[7:0]; 
	cla8_1Op2 = Operand2[7:0]; 
  
	cla8_2Op1 = Operand1[15:8]; 
	cla8_2Op2 = Operand2[15:8]; 
 
	cla8_3Op1 = Operand1[23:16]; 
	cla8_3Op2 = Operand2[23:16]; 
 
	cla8_4Op1 = Operand1[31:24]; 
	cla8_4Op2 = Operand2[31:24]; 
 
	cla8_5Op1 = Operand1[39:32]; 
	cla8_5Op2 = Operand2[39:32]; 
 
	cla8_6Op1 = Operand1[47:40]; 
	cla8_6Op2 = Operand2[47:40]; 
 
	cla8_7Op1 = Operand1[55:48]; 
	cla8_7Op2 = Operand2[55:48]; 
 
	cla8_8Op1 = Operand1[63:56]; 
	cla8_8Op2 = Operand2[63:56]; 
 
        Result[07:00] = cout8_1[8] ? 8'hff : cla8_1Out;        
        Result[15:08] = cout8_2[8] ? 8'hff : cla8_2Out;   
        Result[23:16] = cout8_3[8] ? 8'hff : cla8_3Out;   
        Result[31:24] = cout8_4[8] ? 8'hff : cla8_4Out;   
        Result[39:32] = cout8_5[8] ? 8'hff : cla8_5Out;   
        Result[47:40] = cout8_6[8] ? 8'hff : cla8_6Out;   
        Result[55:48] = cout8_7[8] ? 8'hff : cla8_7Out;   
        Result[63:56] = cout8_8[8] ? 8'hff : cla8_8Out; 
  
    end 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1041: // PADDUSW - PACKED Unsigned Word Add with Saturation	 
    begin 
 
	cla16_1Op1 = Operand1[15:0]; 
	cla16_1Op2 = Operand2[15:0]; 
 
	cla16_2Op1 = Operand1[31:16]; 
	cla16_2Op2 = Operand2[31:16]; 
 
	cla16_3Op1 = Operand1[47:32]; 
	cla16_3Op2 = Operand2[47:32]; 
 
	cla16_4Op1 = Operand1[63:48]; 
	cla16_4Op2 = Operand2[63:48]; 
 
        Result [15:00] = cout1[16] ? 16'hffff : cla16_1Out; 
        Result [31:16] = cout2[16] ? 16'hffff : cla16_2Out; 
        Result [47:32] = cout3[16] ? 16'hffff : cla16_3Out; 
        Result [63:48] = cout4[16] ? 16'hffff : cla16_4Out; 
 
    end 
 
/* ************************************* */ 
 
 
/* ************************************* */ 
   11'd1026: // PSUBB - PACKED byte subtract 
    begin 
 
		OP8_IN1 = Operand2[7:0]; 
		cla8_1Op1 = Operand1[7:0]; 
		cla8_1Op2 = OP8_OUT1; 
 
		OP8_IN2 = Operand2[15:8]; 
		cla8_2Op1 = Operand1[15:8]; 
		cla8_2Op2 = OP8_OUT2; 
 
		OP8_IN3 = Operand2[23:16]; 
		cla8_3Op1 = Operand1[23:16]; 
		cla8_3Op2 = OP8_OUT3; 
 
		OP8_IN4 = Operand2[31:24]; 
		cla8_4Op1 = Operand1[31:24]; 
		cla8_4Op2 = OP8_OUT4; 
 
		OP8_IN5 = Operand2[39:32]; 
		cla8_5Op1 = Operand1[39:32]; 
		cla8_5Op2 = OP8_OUT5; 
 
		OP8_IN6 = Operand2[47:40]; 
		cla8_6Op1 = Operand1[47:40]; 
		cla8_6Op2 = OP8_OUT6; 
 
		OP8_IN7 = Operand2[55:48]; 
		cla8_7Op1 = Operand1[55:48]; 
		cla8_7Op2 = OP8_OUT7; 
 
		OP8_IN8 = Operand2[63:56]; 
		cla8_8Op1 = Operand1[63:56]; 
		cla8_8Op2 = OP8_OUT8; 
 
		Result[63:0] = { cla8_8Out, cla8_7Out, cla8_6Out, cla8_5Out, cla8_4Out, cla8_3Out, cla8_2Out, cla8_1Out }; 
 
    end 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1027: // PSUBW - PACKED Word subtract 
    begin 
		OP16_IN1 = Operand2[15:0]; 
		cla16_1Op1 = Operand1[15:0]; 
		cla16_1Op2 = OP16_OUT1; 
 
		OP16_IN2 = Operand2[31:16]; 
		cla16_2Op1 = Operand1[31:16]; 
		cla16_2Op2 = OP16_OUT2; 
 
		OP16_IN3 = Operand2[47:32]; 
		cla16_3Op1 = Operand1[47:32]; 
		cla16_3Op2 = OP16_OUT3; 
 
		OP16_IN4 = Operand2[63:48]; 
		cla16_4Op1 = Operand1[63:48]; 
		cla16_4Op2 = OP16_OUT4; 
 
		Result[63:0] = { cla16_4Out, cla16_3Out, cla16_2Out, cla16_1Out}; 
    end 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1028: // PSUBD - PACKED Double Word subtract 
    begin 
		OP32_IN1 = Operand2[31:0]; 
		cla1Op1 = Operand1[31:0]; 
		cla1Op2 = OP32_OUT1; 
 
		OP32_IN2 = Operand2[63:32]; 
		cla2Op1 = Operand1[63:32]; 
		cla2Op2 = OP32_OUT2; 
 
		Result[63:0] = { cla2Out, cla1Out}; 
    end 
 
/* ************************************* */ 
 
 
 
//* ************************************* 
   11'd1033: // PSUBSB - PACKED signed byte subtract with Saturation 
	begin 
 
		OP8_IN1   =  Operand2[7:0]; 
		cla8_1Op1 =  Operand1[7:0]; 
		cla8_1Op2 = OP8_OUT1; 
 
		OP8_IN2   =  Operand2[15:8]; 
		cla8_2Op1 =  Operand1[15:8]; 
		cla8_2Op2 = OP8_OUT2; 
 
 
		OP8_IN3   =  Operand2[23:16]; 
		cla8_3Op1 =  Operand1[23:16]; 
		cla8_3Op2 = OP8_OUT3; 
 
 
		OP8_IN4   =  Operand2[31:24]; 
		cla8_4Op1 =  Operand1[31:24]; 
		cla8_4Op2 = OP8_OUT4; 
 
		OP8_IN5   =  Operand2[39:32]; 
		cla8_5Op1 =  Operand1[39:32]; 
		cla8_5Op2 = OP8_OUT5; 
 
		OP8_IN6   =  Operand2[47:40]; 
		cla8_6Op1 =  Operand1[47:40]; 
		cla8_6Op2 = OP8_OUT6; 
 
		OP8_IN7   =  Operand2[55:48]; 
		cla8_7Op1 =  Operand1[55:48]; 
		cla8_7Op2 = OP8_OUT7; 
 
 
		OP8_IN8   =  Operand2[63:56]; 
		cla8_8Op1 =  Operand1[63:56]; 
		cla8_8Op2 = OP8_OUT8; 
 
        case({Operand1[7],Operand2[7]}) 
          2'b10: Result[7:0] = cla8_1Out[7] == 1'b0  ? 8'h80 : cla8_1Out; 
          2'b01: Result[7:0] = (cout8_1[8] | cla8_1Out[7]) == 1'b1   ? 8'h7f : cla8_1Out; 
          default: 
                 Result[7:0] = cla8_1Out[7:0]; 
        endcase 
 
        case({Operand1[15],Operand2[15]}) 
          2'b10: Result[15:8] = cla8_2Out[7] == 1'b0 ? 8'h80 : cla8_2Out; 
          2'b01: Result[15:8] = (cout8_2[8] | cla8_2Out[7]) == 1'b1  ? 8'h7f : cla8_2Out; 
          default: 
                 Result[15:8] = cla8_2Out[7:0]; 
        endcase 
 
        case({Operand1[23],Operand2[23]}) 
          2'b10: Result[23:16] = cla8_3Out[7] == 1'b0 ? 8'h80 : cla8_3Out; 
          2'b01: Result[23:16] = (cout8_3[8] | cla8_3Out[7]) == 1'b1  ? 8'h7f : cla8_3Out; 
          default: 
                 Result[23:16] = cla8_3Out[7:0]; 
        endcase 
 
        case({Operand1[31],Operand2[31]}) 
          2'b10: Result[31:24] = cla8_4Out[7] == 1'b0 ? 8'h80 : cla8_4Out; 
          2'b01: Result[31:24] = (cout8_4[8] | cla8_4Out[7]) == 1'b1  ? 8'h7f : cla8_4Out; 
          default: 
                 Result[31:24] = cla8_4Out[7:0]; 
        endcase 
 
        case({Operand1[39],Operand2[39]}) 
          2'b10: Result[39:32] = cla8_5Out[7] == 1'b0 ? 8'h80 : cla8_5Out; 
          2'b01: Result[39:32] = (cout8_5[8] | cla8_5Out[7]) == 1'b1  ? 8'h7f : cla8_5Out; 
          default: 
                 Result[39:32] = cla8_5Out[7:0]; 
        endcase 
 
        case({Operand1[47],Operand2[47]}) 
          2'b10: Result[47:40] = cla8_6Out[7] == 1'b0 ? 8'h80 : cla8_6Out; 
          2'b01: Result[47:40] = (cout8_6[8] | cla8_6Out[7]) == 1'b1  ? 8'h7f : cla8_6Out; 
          default: 
                 Result[47:40] = cla8_6Out[7:0]; 
        endcase 
 
        case({Operand1[55],Operand2[55]}) 
          2'b10: Result[55:48] = cla8_7Out[7] == 1'b0  ? 8'h80 : cla8_7Out; 
          2'b01: Result[55:48] = (cout8_7[8] | cla8_7Out[7]) == 1'b1  ? 8'h7f : cla8_7Out; 
          default: 
                 Result[55:48] = cla8_7Out[7:0]; 
        endcase 
 
        case({Operand1[63],Operand2[63]}) 
          2'b10: Result[63:56] = cla8_8Out[7] == 1'b0  ? 8'h80 : cla8_8Out; 
          2'b01: Result[63:56] = (cout8_8[8] | cla8_8Out[7]) == 1'b1  ? 8'h7f : cla8_8Out; 
          default: 
                 Result[63:56] = cla8_8Out[7:0]; 
        endcase 
 
 
	end 
 
/* ************************************* */ 
 
 
//* ************************************ 
   11'd1034: // PSUBSW - PACKED signed Word subtract with Saturation 
 
    begin 
 
	OP16_IN1   =  Operand2[15:0]; 
	cla16_1Op1 =  Operand1[15:0]; 
	cla16_1Op2 = OP16_OUT1; 
 
        case({Operand1[15],Operand2[15]}) 
          2'b10: Result[15:00] =  cla16_1Out[15] == 1'b0  ? 16'h8000 : cla16_1Out; 
          2'b01: Result[15:00] = (cout1[16] | cla16_1Out[15]) == 1'b1 ?  16'h7fff : cla16_1Out; 
          default: 
                 Result[15:00] = cla16_1Out[15:0]; 
        endcase  
 
	OP16_IN2   =  Operand2[31:16]; 
	cla16_2Op1 =  Operand1[31:16]; 
	cla16_2Op2 = OP16_OUT2; 
        case({Operand1[31],Operand2[31]}) 
          2'b10: Result[31:16] =  cla16_2Out[15] == 1'b0  ? 16'h8000 : cla16_2Out; 
          2'b01: Result[31:16] = (cout2[16] | cla16_2Out[15]) == 1'b1 ?  16'h7fff : cla16_2Out; 
          default: 
                 Result[31:16] = cla16_2Out[15:0]; 
        endcase  
 
	OP16_IN3   =  Operand2[47:32]; 
	cla16_3Op1 =  Operand1[47:32]; 
	cla16_3Op2 = OP16_OUT3; 
 
        case({Operand1[47],Operand2[47]}) 
          2'b10: Result[47:32] =  cla16_3Out[15] == 1'b0  ? 16'h8000 : cla16_3Out; 
          2'b01: Result[47:32] = (cout3[16] | cla16_3Out[15]) == 1'b1 ? 16'h7fff : cla16_3Out; 
          default: 
                 Result[47:32] = cla16_3Out[15:0]; 
        endcase  
 
	OP16_IN4   =  Operand2[63:48]; 
	cla16_4Op1 =  Operand1[63:48]; 
	cla16_4Op2 = OP16_OUT4; 
 
        case({Operand1[63],Operand2[63]}) 
          2'b10: Result[63:48] =  cla16_4Out[15] == 1'b0  ? 16'h8000 : cla16_4Out; 
          2'b01: Result[63:48] = (cout4[16] | cla16_4Out[15]) == 1'b1 ? 16'h7fff : cla16_4Out; 
          default: 
                 Result[63:48] = cla16_4Out[15:0]; 
        endcase  
 
    end 
 
/* *************************************/   
 
 
//* *************************************  
   11'd1038: // PSUBUSB - PACKED byte unsigned subtract with Saturation 
    begin 
 
		OP8_IN1   =  Operand2[7:0]; 
		cla8_1Op1 =  Operand1[7:0]; 
		cla8_1Op2 = OP8_OUT1; 
 
		OP8_IN2   =  Operand2[15:8]; 
		cla8_2Op1 =  Operand1[15:8]; 
		cla8_2Op2 = OP8_OUT2; 
 
		OP8_IN3   =  Operand2[23:16]; 
		cla8_3Op1 =  Operand1[23:16]; 
		cla8_3Op2 = OP8_OUT3; 
 
		OP8_IN4   =  Operand2[31:24]; 
		cla8_4Op1 =  Operand1[31:24]; 
		cla8_4Op2 = OP8_OUT4; 
 
		OP8_IN5   =  Operand2[39:32]; 
		cla8_5Op1 =  Operand1[39:32]; 
		cla8_5Op2 = OP8_OUT5; 
 
		OP8_IN6   =  Operand2[47:40]; 
		cla8_6Op1 =  Operand1[47:40]; 
		cla8_6Op2 = OP8_OUT6; 
 
		OP8_IN7   =  Operand2[55:48]; 
		cla8_7Op1 =  Operand1[55:48]; 
		cla8_7Op2 = OP8_OUT7; 
 
		OP8_IN8   =  Operand2[63:56]; 
		cla8_8Op1 =  Operand1[63:56]; 
		cla8_8Op2 = OP8_OUT8; 
 
                Result[07:00] = cout8_1[8] == 1'b1 || |Operand2[07:00] == 1'b0 ? cla8_1Out[7:0] : 8'h00; 
                Result[15:08] = cout8_2[8] == 1'b1 || |Operand2[15:08] == 1'b0  ? cla8_2Out[7:0] : 8'h00; 
                Result[23:16] = cout8_3[8] == 1'b1 || |Operand2[23:16] == 1'b0  ? cla8_3Out[7:0] : 8'h00; 
                Result[31:24] = cout8_4[8] == 1'b1 || |Operand2[31:24] == 1'b0  ? cla8_4Out[7:0] : 8'h00; 
                Result[39:32] = cout8_5[8] == 1'b1 || |Operand2[39:32] == 1'b0  ? cla8_5Out[7:0] : 8'h00; 
                Result[47:40] = cout8_6[8] == 1'b1 || |Operand2[47:40] == 1'b0  ? cla8_6Out[7:0] : 8'h00; 
                Result[55:48] = cout8_7[8] == 1'b1 || |Operand2[55:48] == 1'b0  ? cla8_7Out[7:0] : 8'h00; 
                Result[63:56] = cout8_8[8] == 1'b1 || |Operand2[63:56] == 1'b0  ? cla8_8Out[7:0] : 8'h00; 
 
 
    end 
 
/* *************************************  
 
/* *************************************/  
   11'd1039: // PSUBUSW - PACKED Word unsigned subtract with Saturation 
 
    begin 
 
		OP16_IN1   =  Operand2[15:0]; 
		cla16_1Op1 =  Operand1[15:0]; 
		cla16_1Op2 = OP16_OUT1; 
 
		OP16_IN2   =  Operand2[31:16]; 
		cla16_2Op1 =  Operand1[31:16]; 
		cla16_2Op2 = OP16_OUT2; 
 
		OP16_IN3   =  Operand2[47:32]; 
		cla16_3Op1 =  Operand1[47:32]; 
		cla16_3Op2 = OP16_OUT3; 
 
		OP16_IN4   =  Operand2[63:48]; 
		cla16_4Op1 =  Operand1[63:48]; 
		cla16_4Op2 = OP16_OUT4; 
 
 
                Result[15:00] = cout1[16] == 1'b1 || |Operand2[15:0] == 1'b0 ? cla16_1Out[15:0] : 16'h0000; 
                Result[31:16] = cout2[16] == 1'b1 || |Operand2[31:16] == 1'b0 ? cla16_2Out[15:0] : 16'h0000; 
                Result[47:32] = cout3[16] == 1'b1 || |Operand2[47:32] == 1'b0 ? cla16_3Out[15:0] : 16'h0000; 
                Result[63:48] = cout4[16] == 1'b1 || |Operand2[63:48] == 1'b0 ? cla16_4Out[15:0] : 16'h0000; 
                 
    end 
 
/* ************************************* */ 
 
 
/* ************************************* */ 
   11'd1032: // PMULHW - PACKED MULTIPLY HIGH 
    begin 
 
    sign1 = 1'b1; 
    sign2 = 1'b1; 
    sign3 = 1'b1; 
    sign4 = 1'b1; 
 
       multiplicand1 = {{16{Operand1[15]}}, Operand1[15:0]}; 
       multiplier1 = {{16{Operand2[15]}}, Operand2[15:0]}; 
 
       multiplicand2 = {{16{Operand1[31]}}, Operand1[31:16]}; 
       multiplier2 = {{16{Operand2[31]}}, Operand2[31:16]}; 
 
       multiplicand3 = {{16{Operand1[47]}}, Operand1[47:32]}; 
       multiplier3 = {{16{Operand2[47]}}, Operand2[47:32]}; 
 
       multiplicand4 = {{16{Operand1[63]}}, Operand1[63:48]}; 
       multiplier4 = {{16{Operand2[63]}}, Operand2[63:48]}; 
 
       Result[63:0] = {product4[31:16], product3[31:16], product2[31:16], product1[31:16]}; 
 
 
 
    end 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1037: // PMULLW - PACKED MULTIPLY  LOW 
    begin 
 
    sign1 = 1'b1; 
    sign2 = 1'b1; 
    sign3 = 1'b1; 
    sign4 = 1'b1; 
 
       multiplicand1 = {{16{Operand1[15]}}, Operand1[15:0]}; 
       multiplier1 = {{16{Operand2[15]}}, Operand2[15:0]}; 
 
       multiplicand2 = {{16{Operand1[31]}}, Operand1[31:16]}; 
       multiplier2 = {{16{Operand2[31]}}, Operand2[31:16]}; 
 
       multiplicand3 = {{16{Operand1[47]}}, Operand1[47:32]}; 
       multiplier3 = {{16{Operand2[47]}}, Operand2[47:32]}; 
 
       multiplicand4 = {{16{Operand1[63]}}, Operand1[63:48]}; 
       multiplier4 = {{16{Operand2[63]}}, Operand2[63:48]}; 
 
 
       Result[63:0] = {product4[15:0], product3[15:0], product2[15:0], product1[15:0]}; 
 
    end 
/* ************************************* */ 
 
 
/* ************************************* */ 
   11'd1025: // PMADDWD - PACKED MULTIPLY AND ADD 
    begin 
 
    sign1 = 1'b1; 
    sign2 = 1'b1; 
    sign3 = 1'b1; 
    sign4 = 1'b1; 
 
       multiplicand1 = {{16{Operand1[15]}}, Operand1[15:0]}; 
       multiplier1 = {{16{Operand2[15]}}, Operand2[15:0]}; 
 
       multiplicand2 = {{16{Operand1[31]}}, Operand1[31:16]}; 
       multiplier2 = {{16{Operand2[31]}}, Operand2[31:16]}; 
 
       multiplicand3 = {{16{Operand1[47]}}, Operand1[47:32]}; 
       multiplier3 = {{16{Operand2[47]}}, Operand2[47:32]}; 
 
       multiplicand4 = {{16{Operand1[63]}}, Operand1[63:48]}; 
       multiplier4 = {{16{Operand2[63]}}, Operand2[63:48]}; 
 
 
     cla1Op1 = product1[31:0];		//  give the first operand's first word to cla1 as input 
     cla1Op2 = product2[31:0];		//  give the second operand's first word to cla1 as input 
     cla2Op1 = product3[31:0];		//  give the first operand's second word to cla2 as input 
     cla2Op2 = product4[31:0];		//  give the second operand's second word to cla2 as input 
 
 
     Result[63:0] = {cla2Out[31:0],cla1Out[31:0]}; 
 
    end 
/* ************************************* */ 
 
 
 
// Comparison Instructions 
 
/************************************** */ 
   11'd1045: // PCMPEQB PACKED BYTE COMPARE FOR EQUAL		 
 
    begin 
 
 
	comp8_1In1 = Operand1[7:0]; 
	comp8_1In2 = Operand2[7:0]; 
 
	comp8_2In1 = Operand1[15:8]; 
	comp8_2In2 = Operand2[15:8]; 
 
	comp8_3In1 = Operand1[23:16]; 
	comp8_3In2 = Operand2[23:16]; 
 
	comp8_4In1 = Operand1[31:24]; 
	comp8_4In2 = Operand2[31:24]; 
 
	comp8_5In1 = Operand1[39:32]; 
	comp8_5In2 = Operand2[39:32]; 
 
	comp8_6In1 = Operand1[47:40]; 
	comp8_6In2 = Operand2[47:40]; 
 
	comp8_7In1 = Operand1[55:48]; 
	comp8_7In2 = Operand2[55:48]; 
 
	comp8_8In1 = Operand1[63:56]; 
	comp8_8In2 = Operand2[63:56]; 
 
 
	if(comp8Out1[1] == 1) 
		Result[7:0]=8'hff; 
	else 
		Result[7:0]={8{1'b0}}; 
 
	if(comp8Out2[1] == 1) 
		Result[15:8]=8'hff; 
	else 
		Result[15:8]={8{1'b0}}; 
 
	if(comp8Out3[1] == 1) 
		Result[23:16]=8'hff; 
	else 
		Result[23:16]={8{1'b0}}; 
 
	if(comp8Out4[1] == 1) 
		Result[31:24]=8'hff; 
	else 
		Result[31:24]={8{1'b0}}; 
 
	if(comp8Out5[1] == 1) 
		Result[39:32]=8'hff; 
	else 
		Result[39:32]={8{1'b0}}; 
 
	if(comp8Out6[1] == 1) 
		Result[47:40]=8'hff; 
	else 
		Result[47:40]={8{1'b0}}; 
 
	if(comp8Out7[1] == 1) 
		Result[55:48]=8'hff; 
	else 
		Result[55:48]={8{1'b0}}; 
 
	if(comp8Out8[1] == 1) 
		Result[63:56]=8'hff; 
	else 
	Result[63:56]={8{1'b0}}; 
 
    end 
 
/* ************************************* */ 
 
 
/* ************************************* */ 
   11'd1046: // PCMPEQW PACKED WORD COMPARE FOR EQUAL		 
 
    begin 
 
	comp16_1In1 = Operand1[15:0]; 
	comp16_1In2 = Operand2[15:0]; 
 
	comp16_2In1 = Operand1[31:16]; 
	comp16_2In2 = Operand2[31:16]; 
 
	comp16_3In1 = Operand1[47:32]; 
	comp16_3In2 = Operand2[47:32]; 
 
	comp16_4In1 = Operand1[63:48]; 
	comp16_4In2 = Operand2[63:48]; 
 
 
	if(comp16Out1[1] == 1'b1 ) 
		Result[15:0]=16'hffff; 
	else 
		Result[15:0]={16{1'b0}}; 
 
	if(comp16Out2[1] == 1'b1 ) 
		Result[31:16]=16'hffff; 
	else 
		Result[31:16]={16{1'b0}}; 
 
	if(comp16Out3[1] == 1'b1 ) 
		Result[47:32]=16'hffff; 
	else 
		Result[47:32]={16{1'b0}}; 
 
	if(comp16Out4[1] == 1'b1 ) 
		Result[63:48]=16'hffff; 
	else 
		Result[63:48]={16{1'b0}}; 
 
    end 
 
/* ************************************* */ 
 
 
/* ************************************* */ 
   11'd1047: // PCMPEQD PACKED DOUBLE WORD COMPARE FOR EQUAL		 
 
    begin 
 
	comp32_1In1 = Operand1[31:0]; 
	comp32_1In2 = Operand2[31:0]; 
 
	comp32_2In1 = Operand1[63:32]; 
	comp32_2In2 = Operand2[63:32]; 
 
 
	if(comp32Out1[1] == 1'b1) 
		Result[31:0]=32'hffffffff; 
	else 
		Result[31:0]= 32'd0; 
 
	if(comp32Out2[1] == 1'b1) 
		Result[63:32]=32'hffffffff; 
	else 
		Result[63:32]=32'd0; 
 
    end 
 
/************************************** */ 
 
/************************************** */ 
   11'd1042: // PCMPGTB PACKED Byte COMPARE FOR Greater than		 
 
    begin 
 
 
	comp8_1In1 = Operand1[7:0]; 
	comp8_1In2 = Operand2[7:0]; 
 
	comp8_2In1 = Operand1[15:8]; 
	comp8_2In2 = Operand2[15:8]; 
 
	comp8_3In1 = Operand1[23:16]; 
	comp8_3In2 = Operand2[23:16]; 
 
	comp8_4In1 = Operand1[31:24]; 
	comp8_4In2 = Operand2[31:24]; 
 
	comp8_5In1 = Operand1[39:32]; 
	comp8_5In2 = Operand2[39:32]; 
 
	comp8_6In1 = Operand1[47:40]; 
	comp8_6In2 = Operand2[47:40]; 
 
	comp8_7In1 = Operand1[55:48]; 
	comp8_7In2 = Operand2[55:48]; 
 
	comp8_8In1 = Operand1[63:56]; 
	comp8_8In2 = Operand2[63:56]; 
 
	if((comp8Out1[2] == 1 && Operand1[7] == Operand2[7]) || (Operand1[7] == 1'b0 && Operand2[7] == 1'b1)) 
		Result[7:0]=8'hff; 
	else 
		Result[7:0]={8{1'b0}}; 
 
	if((comp8Out2[2] == 1 && Operand1[15] == Operand2[15]) || (Operand1[15] == 1'b0 && Operand2[15] == 1'b1)) 
		Result[15:8]=8'hff; 
	else 
		Result[15:8]={8{1'b0}}; 
 
	if((comp8Out3[2] == 1 && Operand1[23] == Operand2[23]) || (Operand1[23] == 1'b0 && Operand2[23] == 1'b1)) 
		Result[23:16]=8'hff; 
	else 
		Result[23:16]={8{1'b0}}; 
 
	if((comp8Out4[2] == 1 && Operand1[31] == Operand2[31]) || (Operand1[31] == 1'b0 && Operand2[31] == 1'b1)) 
		Result[31:24]=8'hff; 
	else 
		Result[31:24]={8{1'b0}}; 
 
	if((comp8Out5[2] == 1 && Operand1[39] == Operand2[39]) || (Operand1[39] == 1'b0 && Operand2[39] == 1'b1)) 
		Result[39:32]=8'hff; 
	else 
		Result[39:32]={8{1'b0}}; 
 
	if((comp8Out6[2] == 1 && Operand1[47] == Operand2[47]) || (Operand1[47] == 1'b0 && Operand2[47] == 1'b1)) 
		Result[47:40]=8'hff; 
	else 
		Result[47:40]={8{1'b0}}; 
 
	if((comp8Out7[2] == 1 && Operand1[55] == Operand2[55]) || (Operand1[55] == 1'b0 && Operand2[55] == 1'b1)) 
		Result[55:48]=8'hff; 
	else 
		Result[55:48]={8{1'b0}}; 
 
	if((comp8Out8[2] == 1 && Operand1[63] == Operand2[63]) || (Operand1[63] == 1'b0 && Operand2[63] == 1'b1)) 
		Result[63:56]=8'hff; 
	else 
		Result[63:56]={8{1'b0}}; 
 
    end 
 
/************************************** */ 
 
/************************************** */ 
   11'd1043: // PCMPGTW PACKED Word COMPARE FOR Greater than		 
 
    begin 
 
	comp16_1In1 = Operand1[15:0]; 
	comp16_1In2 = Operand2[15:0]; 
 
	comp16_2In1 = Operand1[31:16]; 
	comp16_2In2 = Operand2[31:16]; 
 
	comp16_3In1 = Operand1[47:32]; 
	comp16_3In2 = Operand2[47:32]; 
 
	comp16_4In1 = Operand1[63:48]; 
	comp16_4In2 = Operand2[63:48]; 
 
 
	if((comp16Out1[2] == 1 && Operand1[15] == Operand2[15]) || (Operand1[15] == 1'b0 && Operand2[15] == 1'b1)) 
		Result[15:0]=16'hffff; 
	else 
		Result[15:0]={16{1'b0}}; 
 
	if((comp16Out2[2] == 1 && Operand1[31] == Operand2[31]) || (Operand1[31] == 1'b0 && Operand2[31] == 1'b1) ) 
		Result[31:16]=16'hffff; 
	else 
		Result[31:16]={8{1'b0}}; 
 
	if((comp16Out3[2] == 1 && Operand1[47] == Operand2[47]) || (Operand1[47] == 1'b0 && Operand2[47] == 1'b1) ) 
		Result[47:32]=16'hffff; 
	else 
		Result[47:32]={16{1'b0}}; 
 
	if((comp16Out4[2] == 1 && Operand1[63] == Operand2[63]) || (Operand1[63] == 1'b0 && Operand2[63] == 1'b1)  ) 
		Result[63:48]=16'hffff; 
	else 
		Result[63:48]={16{1'b0}}; 
 
    end 
 
/************************************** */ 
 
/************************************** */ 
   11'd1044: // PCMPGTD PACKED Double Word COMPARE FOR Greater than	 
 
    begin 
 
	comp32_1In1 = Operand1[31:0]; 
	comp32_1In2 = Operand2[31:0]; 
 
	comp32_2In1 = Operand1[63:32]; 
	comp32_2In2 = Operand2[63:32]; 
 
 
	if((comp32Out1[2] == 1 && Operand1[31] == Operand2[31]) || (Operand1[31] == 1'b0 && Operand2[31] == 1'b1)) 
		Result[31:0]=32'hffffffff; 
	else 
		Result[31:0]={32{1'b0}}; 
 
	if((comp32Out2[2] == 1 && Operand1[63] == Operand2[63]) || (Operand1[63] == 1'b0 && Operand2[63] == 1'b1)) 
		Result[63:32]=32'hffffffff; 
	else 
		Result[63:32]={32{1'b0}}; 
 
    end 
 
/************************************** */ 
 
/* ************************************* */ 
   11'd1051: //  PACKSSWB - Packed with Signed Saturation - Packed Words to Packed Bytes 
 
      begin 
 
	Result[07:00] = Operand1[15]==1'b0 ? ((|Operand1[14:7] )==1'b0 ? Operand1[7:0]  :8'h7f):((&Operand1[14:7] )==1'b1 ?Operand1[7:0]  :8'h80); 
	Result[15:08] = Operand1[31]==1'b0 ? ((|Operand1[30:23])==1'b0 ? Operand1[23:16]:8'h7f):((&Operand1[30:23])==1'b1 ?Operand1[23:16]:8'h80); 
	Result[23:16] = Operand1[47]==1'b0 ? ((|Operand1[46:39])==1'b0 ? Operand1[39:32]:8'h7f):((&Operand1[46:39])==1'b1 ?Operand1[39:32]:8'h80); 
	Result[31:24] = Operand1[63]==1'b0 ? ((|Operand1[62:55])==1'b0 ? Operand1[55:48]:8'h7f):((&Operand1[62:55])==1'b1 ?Operand1[55:48]:8'h80); 
	Result[39:32] = Operand2[15]==1'b0 ? ((|Operand2[14:7] )==1'b0 ? Operand2[7:0]  :8'h7f):((&Operand2[14:7] )==1'b1 ?Operand2[7:0]  :8'h80); 
	Result[47:40] = Operand2[31]==1'b0 ? ((|Operand2[30:23])==1'b0 ? Operand2[23:16]:8'h7f):((&Operand2[30:23])==1'b1 ?Operand2[23:16]:8'h80); 
	Result[55:48] = Operand2[47]==1'b0 ? ((|Operand2[46:39])==1'b0 ? Operand2[39:32]:8'h7f):((&Operand2[46:39])==1'b1 ?Operand2[39:32]:8'h80); 
	Result[63:56] = Operand2[63]==1'b0 ? ((|Operand2[62:55])==1'b0 ? Operand2[55:48]:8'h7f):((&Operand2[62:55])==1'b1 ?Operand2[55:48]:8'h80); 
        
      end 
 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1056: //  PACKSSDW - Packed with Signed Saturation - Packed Double Words to Packed Words      
 
      begin 
 
	Result[15:00] = Operand1[31]==1'b0 ? ((|Operand1[30:15] )==1'b0 ? Operand1[15:00] :16'h7fff):((&Operand1[30:15])==1'b1 ?Operand1[15:00] :16'h8000); 
	Result[31:16] = Operand1[63]==1'b0 ? ((|Operand1[62:47] )==1'b0 ? Operand1[47:32] :16'h7fff):((&Operand1[62:47])==1'b1 ?Operand1[47:32] :16'h8000); 
	Result[47:32] = Operand2[31]==1'b0 ? ((|Operand2[30:15] )==1'b0 ? Operand2[15:00] :16'h7fff):((&Operand2[30:15])==1'b1 ?Operand2[15:00] :16'h8000); 
	Result[63:48] = Operand2[63]==1'b0 ? ((|Operand2[62:47] )==1'b0 ? Operand2[47:32] :16'h7fff):((&Operand2[62:47])==1'b1 ?Operand2[47:32] :16'h8000); 
		 
      end 
 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1052: //  PACKUSWB - Packed with UnSigned Saturation - Packed Words to Packed Bytes       
 
	begin 
			Result[7:0]   = Operand1[15] ? 8'd0 : ((|Operand1[14:8] != 1'b0) ? 8'hff : Operand1[7:0]);  
			Result[15:8]  = Operand1[31] ? 8'd0 : ((|Operand1[30:24] != 1'b0) ? 8'hff : Operand1[23:16]);  
			Result[23:16] = Operand1[47] ? 8'd0 : ((|Operand1[46:40] != 1'b0) ? 8'hff : Operand1[39:32]);  
			Result[31:24] = Operand1[63] ? 8'd0 : ((|Operand1[62:56] != 1'b0) ? 8'hff : Operand1[55:48]);  
			Result[39:32] = Operand2[15] ? 8'd0 : ((|Operand2[14:8] != 1'b0) ? 8'hff : Operand2[7:0]);  
			Result[47:40] = Operand2[31] ? 8'd0 : ((|Operand2[30:24] != 1'b0) ? 8'hff : Operand2[23:16]);  
			Result[55:48] = Operand2[47] ? 8'd0 : ((|Operand2[46:40] != 1'b0) ? 8'hff : Operand2[39:32]);  
			Result[63:56] = Operand2[63] ? 8'd0 : ((|Operand2[62:56] != 1'b0) ? 8'hff : Operand2[55:48]);  
	end 
 
 
/* ************************************* */ 
 
 
/************************************** */ 
   11'd1053: //  PUNPCKHBW - Unpack High Packed Data - Packed Byte		 
 
		begin 
			Result[7:0]   = Operand1[39:32]; 
			Result[15:8]  = Operand2[39:32]; 
			Result[23:16] = Operand1[47:40]; 
			Result[31:24] = Operand2[47:40]; 
			Result[39:32] = Operand1[55:48]; 
			Result[47:40] = Operand2[55:48]; 
			Result[55:48] = Operand1[63:56]; 
			Result[63:56] = Operand2[63:56]; 
		end 
 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1054: //  PUNPCKHWD - Unpack High Packed Data - Packed Word		 
 
 
		begin 
			Result[15:0]  =  Operand1[47:32]; 
			Result[31:16] =  Operand2[47:32]; 
			Result[47:32] =  Operand1[63:48]; 
			Result[63:48] =  Operand2[63:48]; 
		end 
 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1055: //  PUNPCKHDQ - Unpack High Packed Data - Packed Double Word	 
 
 
		begin 
			Result[31:0]  = Operand1[63:32]; 
			Result[63:32] = Operand2[63:32]; 
		end 
 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1048: //  PUNPCKLBW - Unpack Low Packed Data - Packed Double Word	 
 
 
		begin 
			Result[63:56] = Operand2[31:24]; 
			Result[55:48] = Operand1[31:24]; 
			Result[47:40] = Operand2[23:16]; 
			Result[39:32] = Operand1[23:16]; 
			Result[31:24] = Operand2[15:8]; 
			Result[23:16] = Operand1[15:8]; 
			Result[15:8]  = Operand2[7:0]; 
			Result[7:0]   = Operand1[7:0]; 
		end 
 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1049: //  PUNPCKLWD - Unpack Low Packed Data - Packed Double Word	 
 
 
		begin 
			Result[63:48] = Operand2[31:16]; 
			Result[47:32] = Operand1[31:16]; 
			Result[31:16] = Operand2[15:0]; 
			Result[15:0]  = Operand1[15:0]; 
		end 
 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1050: //  PUNPCKLDQ - Unpack Low Packed Data - Packed Double Word	 
 
 
		begin 
			Result[63:32] = Operand2[31:0]; 
			Result[31:0]  = Operand1[31:0]; 
		end 
 
 
/* ************************************* */ 
 
// Logical Instructions 
 
/* ************************************* */ 
   11'd1061: // PAND PACKED BITWISE AND					 
 
    begin 
 
	Result[63:0] = (Operand1[63:0]  & Operand2[63:0]); 
 
    end 
 
/* ************************************* */ 
 
 
/* ************************************* */ 
   11'd1062: // PANDN PACKED BITWISE AND & NOT				 
 
    begin 
 
	Result[63:0] = ( ~Operand1[63:0]  &  Operand2[63:0]); 
 
    end 
 
/* ************************************* */ 
 
 
/* ************************************* */ 
   11'd1063: // POR PACKED BITWISE OR					 
 
    begin 
 
	Result[63:0] = (Operand1[63:0]  |  Operand2[63:0]); 
 
    end 
 
/* ************************************* */ 
 
 
/* ************************************* */ 
   11'd1064: // PXOR PACKED BITWISE XOR					 
 
    begin 
 
	Result[63:0] = (Operand1[63:0]  ^  Operand2[63:0]); 
 
    end 
 
/* ************************************* */ 
 
// Shift Instructions 
 
/* ************************************* */ 
   11'd1070: //  PSLLW - PACKED WORD SHIFT LEFT LOGICAL			 
 
    begin 
 
	direction16 = 0; 
 
	Count16_1 = Operand2; 
	Count16_2 = Operand2; 
	Count16_3 = Operand2; 
	Count16_4 = Operand2; 
 
        if(|Operand2[63:4])		// if Operand2 is greater than 15 
	begin 
 
		Result = {64{1'b0}}; 
 
	end 
	else 
 
	begin 
    	shift16In1 = Operand1[15:0]; 
    	shift16In2 = Operand1[31:16]; 
    	shift16In3 = Operand1[47:32]; 
    	shift16In4 = Operand1[63:48]; 
 
	Result[63:0] = { shift16Out4[15:0], shift16Out3[15:0], shift16Out2[15:0], shift16Out1[15:0]}; 
	end 
 
    end 
 
/* ************************************* */ 
 
 
/* ************************************* */ 
   11'd1065: //  PSLLW - PACKED WORD SHIFT LEFT LOGICAL with 8-bit IMMIDIATE OPERAND	 
 
    begin 
 
	direction16 = 0; 
 
	Count16_1 = Operand2; 
	Count16_2 = Operand2; 
	Count16_3 = Operand2; 
	Count16_4 = Operand2; 
 
 
 
        if(|Operand2[63:4])		// if Operand2 is greater than 15 
	begin 
 
		Result = {64{1'b0}}; 
 
	end 
	else 
 
	begin 
    	shift16In1 = Operand1[15:0]; 
    	shift16In2 = Operand1[31:16]; 
    	shift16In3 = Operand1[47:32]; 
    	shift16In4 = Operand1[63:48]; 
 
	Result[63:0] = { shift16Out4[15:0], shift16Out3[15:0], shift16Out2[15:0], shift16Out1[15:0]}; 
	end 
 
 
    end 
 
/* ************************************* */ 
 
 
/* ************************************* */ 
   11'd1071: //  PSLLD - PACKED DOUBLE WORD SHIFT LEFT LOGICAL			 
 
    begin 
 
	direction = 0; 
	Count1 = Operand2; 
	Count2 = Operand2; 
 
        if(|Operand2[63:5])		// if Operand2 is greater than 31 
	begin 
 
		Result = 64'b0; 
 
	end 
	else 
 
	begin 
    	shiftIn1 = Operand1[31:0]; 
    	shiftIn2 = Operand1[63:32]; 
 
 
 
	Result[63:0] = { shiftOut2[31:0], shiftOut1[31:0]}; 
	end 
 
    end 
 
/* ************************************* */ 
 
 
 
/* ************************************* */ 
   11'd1077: //  PSLLQ - PACKED QUADWORD SHIFT LEFT LOGICAL	 
 
    begin 
 
	direction0 = 0; 
	Count0 = Operand2; 
 
 
        if(|Operand2[63:6])		// if Operand2 is greater than 63 
		begin 
			Result = {64{1'b0}}; 
		end 
	else 
		begin 
    			shiftIn0 = Operand1; 
			Result   =  shiftOut0; 
		end 
 
    end 
 
/* ************************************* */ 
 
 
/* ************************************* */ 
   11'd1068: //  PSRLW - PACKED WORD SHIFT RIGHT LOGICAL with 8-bit IMMIDIATE OPERAND	 
 
    begin 
 
	direction16 = 1; 
 
	Count16_1 = Operand2; 
	Count16_2 = Operand2; 
	Count16_3 = Operand2; 
	Count16_4 = Operand2; 
 
        if(|Operand2[63:4])		// if Operand2 is greater than 15 
	begin 
 
		Result = {64{1'b0}}; 
 
	end 
	else 
 
	begin 
    	shift16In1 = Operand1[15:0]; 
    	shift16In2 = Operand1[31:16]; 
    	shift16In3 = Operand1[47:32]; 
    	shift16In4 = Operand1[63:48]; 
 
	Result[63:0] = { shift16Out4[15:0], shift16Out3[15:0], shift16Out2[15:0], shift16Out1[15:0]}; 
	end 
 
    end 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1072: //  PSRLD - PACKED DOUBLE WORD SHIFT RIGHT LOGICAL			 
 
    begin 
 
	direction = 1; 
	Count1 = Operand2; 
	Count2 = Operand2; 
 
        if(|Operand2[63:5])		// if Operand2 is greater than 31 
	begin 
 
		Result = 64'b0; 
 
	end 
	else 
 
	begin 
    	shiftIn1 = Operand1[31:0]; 
    	shiftIn2 = Operand1[63:32]; 
 
	Result[63:0] = { shiftOut2[31:0], shiftOut1[31:0]}; 
	end 
 
    end 
 
/* ************************************* */ 
   11'd1078: //  PSRLQ - PACKED QUADWORD SHIFT RIGHT LOGICAL		 
 
    begin 
 
	direction0 = 1; 
	Count0 = Operand2; 
        if(|Operand2[63:6])		// if Operand2 is greater than 63 
		begin 
			Result = {64{1'b0}}; 
		end 
	else 
		begin 
    			shiftIn0 = Operand1; 
			Result   =  shiftOut0; 
		end 
    end 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1079: //  PSRLQ - PACKED QUADWORD SHIFT RIGHT LOGICAL with 8-bit IMMIDIATE OPERAND 
 
    begin 
 
	direction0 = 1; 
	Count0 = Operand2; 
        if(|Operand2[63:6])		// if Operand2 is greater than 63 
		begin 
			Result = {64{1'b0}}; 
		end 
	else 
		begin 
    			shiftIn0 = Operand1; 
			Result   =  shiftOut0; 
		end 
    end 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1067: //  PSRAW - PACKED WORD SHIFT RIGHT Arithmetic			 
 
    begin 
 
	Count_A1 = Operand2; 
	Count_A2 = Operand2; 
	Count_A3 = Operand2; 
	Count_A4 = Operand2; 
 
        if(|Operand2[63:4]) 
		begin 
			Count_A1 = 63'd16; 
			Count_A2 = 63'd16; 
			Count_A3 = 63'd16; 
			Count_A4 = 63'd16; 
		end 
 
    	shift_A1_In = Operand1[15:0]; 
    	shift_A2_In = Operand1[31:16]; 
    	shift_A3_In = Operand1[47:32]; 
    	shift_A4_In = Operand1[63:48]; 
 
	Result[63:0]   =  { shift_A4_Out, shift_A3_Out, shift_A2_Out, shift_A1_Out}; 
 
    end 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1069: //  PSRAW - PACKED WORD SHIFT RIGHT Arithmetic with 8-bit Operand	 
 
    begin 
 
	Count_A1 = Operand2; 
	Count_A2 = Operand2; 
	Count_A3 = Operand2; 
	Count_A4 = Operand2; 
 
        if(|Operand2[63:4]) 
		begin 
			Count_A1 = 63'd16; 
			Count_A2 = 63'd16; 
			Count_A3 = 63'd16; 
			Count_A4 = 63'd16; 
		end 
 
	shift_A1_In = Operand1[15:0]; 
    	shift_A2_In = Operand1[31:16]; 
    	shift_A3_In = Operand1[47:32]; 
    	shift_A4_In = Operand1[63:48]; 
 
	Result[63:0]   =  { shift_A4_Out, shift_A3_Out, shift_A2_Out, shift_A1_Out}; 
 
    end 
 
/* ************************************* */ 
 
/* ************************************* */ 
   11'd1073: //  PSRAD - PACKED Double WORD SHIFT RIGHT Arithetic		 
 
    begin 
 
	Count1_AS32 = Operand2; 
	Count2_AS32 = Operand2; 
 
        if(|Operand2[63:5]) 
		begin 
			Count1_AS32 = 63'd32; 
			Count2_AS32 = 63'd32; 
 
		end 
 
	shiftA32_In1 = Operand1[31:0]; 
    	shiftA32_In2 = Operand1[63:32]; 
 
	Result[63:0]   =  { shiftA32_Out2, shiftA32_Out1 }; 
 
    end 
 
/* ************************************* */ 
 
 
//  Data Transfer Instructions 
 
/* ************************************* */ 
   11'd1059: //  MOVD - DESTINATION IS 32 bit Register/mem and SOURCE is MMX Register			 
 
	begin 
		Result   =  { 32'd0,Operand2[31:0]}; 
	end 
 
 
/* ************************************* */ 
 
 
/* ************************************* */ 
   11'd1058:   //  MOVQ  
 
	begin 
    	   Result   =  Operand2; 
	end 
 
 
  default: 
  	Result = 64'd0; 
 
 
  endcase 
 
   
 end 
 end 
 
endmodule