www.pudn.com > x86.rar > compare16.v, change:2007-12-05,size:1874b



module compare16(compOut, compIn1, compIn2);
  input  [15:0]  compIn1;
  input  [15:0]  compIn2;
  output [2:0]   compOut;
  reg    [2:0]   compOut;
  reg    [15:0]  claIn1;
  reg    [15:0]  claIn2;
  wire   [15:0]  claOut;
  wire   [16:1]  carryOut;
  reg    [15:0]  twoCmpIn;
  wire   [15:0]  twoCmpOut;

cla16Bit    cla1 (claOut,carryOut,claIn1,claIn2,1'b0);
twosComp16  comp (twoCmpOut,twoCmpIn);
always @ (compIn2)  twoCmpIn = compIn2;
always @ (compIn1 or twoCmpOut)
begin
      claIn1 = compIn1;
      claIn2 = twoCmpOut;
end

always @ (claOut or carryOut or compIn1 or compIn2)
begin

        if(!(|claOut))
                compOut = 3'd2;
        else
        if(!(|compIn1 ) || !(|compIn2))
        begin

                if(!(|compIn1))
                begin
                        if(!(|compIn2))
                                compOut = 3'd2;
                        else
                                if(compIn2[15] == 1)
                                        compOut = 3'd4;
                                else
                                        compOut = 3'd1;

                end
                else
                if(!(|compIn2 ))
                begin

                        if(compIn1[15] == 1)
                                compOut = 3'd1;
                        else
                                compOut = 3'd4;

                end

        end
        else
        begin
                if(compIn1[15] & (!compIn2[15]) )
                        compOut = 3'd1;
                else
                if(!compIn1[15] & compIn2[15])
                        compOut = 3'd4;
                else
                begin

                        if(carryOut[16]==1)
                                compOut=3'd4;
                        else
                                compOut=3'd1;
                end

        end
end

endmodule