www.pudn.com > 860bsp.rar > sysSerial.c


/* sysSerial.c -  MPC860  BSP serial device initialization */ 
 
#include "copyright_wrs.h" 
 
/* 
modification history 
-------------------- 
 
*/ 
 
/* 
The sysSerial.c file is normally  included as part of the sysLib.c file. 
This code segment configures the serial ports for the BSP. 
*/ 
  
#include "vxWorks.h" 
#include "iv.h" 
#include "intLib.h" 
#include "config.h" 
#include "sysLib.h" 
#include "rngLib.h" 
#include "drv/sio/ppc860Sio.h" 
#include "drv/multi/ppc860Cpm.h" 
#include "bsc860.h" 
/*#include "scc2Modem.c"*/ 
 
/* defines */ 
 
/*  
 * the macros below define parameters describing the configuration of 
 * the SMCs channels in the PPC860's DPRAM, for instance the offset 
 * of the transmit buffer descriptors (TBD), receive buffer descriptors 
 * (RBD), and so on. The user may redefine them to best suit its needs. 
 * He should be aware of the location of other peripherals's parameters 
 * within the DPRAM (SCC1, etc.). 
 */ 
 
/* offset from DPRAM of SMC1's TBDs */ 
 
#define SMC1_TBD_OFF		0xc00 
 
/* offset from DPRAM of SMC1's RBDs */ 
 
#define SMC1_RBD_OFF		(SMC1_TBD_OFF + 0x10) 
 
/* offset from DPRAM of SMC1's Tx buffers */ 
 
#define SMC1_TX_BUF_OFF		0xd00 
 
/* offset from DPRAM of SMC1's Rx buffers */ 
 
#define SMC1_RX_BUF_OFF		(SMC1_TX_BUF_OFF + 0x80) 
 
/* number of SMC1's TBDs */ 
 
#define SMC1_TBD_NUM		0x01 
 
/* number of SMC1's RBDs */ 
 
#define SMC1_RBD_NUM		0x10 
 
 
/* offset from DPRAM of SMC2's TBDs */ 
 
#define SMC2_TBD_OFF		0xe00 
 
/* offset from DPRAM of SMC2's RBDs */ 
 
#define SMC2_RBD_OFF		(SMC2_TBD_OFF + 0x10) 
 
/* offset from DPRAM of SMC2's Tx buffers */ 
 
#define SMC2_TX_BUF_OFF		0xf00 
 
/* offset from DPRAM of SMC2's Rx buffers */ 
 
#define SMC2_RX_BUF_OFF		(SMC2_TX_BUF_OFF + 0x80) 
 
/* number of SMC2's TBDs */ 
 
#define SMC2_TBD_NUM		0x01 
 
/* number of SMC2's RBDs */ 
 
#define SMC2_RBD_NUM		0x10 
 
 
 
/* size of the SMC1 transmit buffer */ 
 
#define SMC1_TX_BUF_SZ		0x01 
 
 
/* size of the SMC2 transmit buffer */ 
 
#define SMC2_TX_BUF_SZ		0x01 
 
/* device initialization structure */ 
 
  
typedef struct 
    { 
    UINT32	smcTbdOff;		/* offset of the TBDs for this smc */ 
    UINT32	smcRbdOff;		/* offset of the RBDs for this smc */ 
    UINT32	smcTbdNum;		/* number of TBDs for this smc */ 
    UINT32	smcRbdNum;		/* number of RBDs for this smc */ 
    UINT32	smcTxBufOff;		/* offset of the Tx buf for this smc */ 
    UINT32	smcRxBufOff;		/* offset of the Rx buf for this smc */ 
    UINT32	smcTxBufSz;		/* size of the Tx buf for this smc */ 
    } PPC860SMC_PARMS; 
  
 
/* forward declaration */ 
void scc2ModemInit(void); 
 
  
/* Local data structures */ 
  
static UINT8	chanNum =1;	/* number of channels actually used */ 
 
/*----------------------------*/ 
/* Base of buffer descriptors */ 
/*----------------------------*/ 
 
static PPC860SMC_PARMS ppc860SmcParms [] = 
    { 
       {SMC1_TBD_OFF, SMC1_RBD_OFF, SMC1_TBD_NUM, SMC1_RBD_NUM, 
	SMC1_TX_BUF_OFF, SMC1_RX_BUF_OFF, SMC1_TX_BUF_SZ}, 
       {SMC2_TBD_OFF, SMC2_RBD_OFF, SMC2_TBD_NUM, SMC2_RBD_NUM, 
	SMC2_TX_BUF_OFF, SMC2_RX_BUF_OFF, SMC2_TX_BUF_SZ}, 
 
    }; 
  
static PPC860SMC_CHAN	ppc860Chan [1]; 
/*static PPC860SCC2MODEM_CHAN   scc2Modem;   */  /*scc2 uart*/ 
/*static UINT8   scc2TxBuffer[SCC2MODEM_TXBDNUM][SCC2MODEM_TXBUFFER]; 
static UINT8   scc2RxBuffer[SCC2MODEM_RXBDNUM][SCC2MODEM_RXBUFFER];*/ 
 
/****************************************************************************** 
* 
* sysSerialHwInit - initialize the BSP serial devices to a quiesent state 
* 
* This routine initializes the BSP serial device descriptors and puts the 
* devices in a quiesent state.  It is called from sysHwInit() with 
* interrupts locked. 
 
* RETURNS: N/A 
*/  
 
void sysSerialHwInit (void) 
    { 
    int		i;		/* an index */ 
    UINT8    smcNum; 
     
    smcNum=chanNum;   
     
    /* intialize the chips device descriptors */ 
 
    for (i = 0; i < smcNum; i++) 
        { 
	UINT32 regBase; 
 
	/* BRGCLK freq (Hz) */ 
 
	ppc860Chan [i].clockRate      = BRGCLK_FREQ;	     
 
	/* IMMR reg has base adr */ 
 
	ppc860Chan [i].regBase        = vxImmrGet();  	     
 
	regBase = ppc860Chan [i].regBase; 
 
	/* use BRG1 for channel 1 and BRG2 for channel 2 */ 
 
	ppc860Chan [i].bgrNum         = (i + 1);                   
 
	/* SMC wired for rs232 */ 
 
	ppc860Chan [i].uart.smcNum    = (i + 1);                   
 
	/* init the number of TBDs */ 
 
	ppc860Chan [i].uart.txBdNum   = ppc860SmcParms[i].smcTbdNum;                   
 
	/* init the number of RBDs */ 
 
	ppc860Chan [i].uart.rxBdNum   = ppc860SmcParms[i].smcRbdNum;                
 
	/* transmit BD base adrs */ 
 
	ppc860Chan [i].uart.txBdBase  = (SMC_BUF *)  
					 (MPC860_REGB_OFFSET +  
					 ppc860SmcParms[i].smcTbdOff); 
 
	/* receive BD base adrs */ 
 
	ppc860Chan [i].uart.rxBdBase  = (SMC_BUF *)  
					 (MPC860_REGB_OFFSET +  
					 ppc860SmcParms[i].smcRbdOff); 
 
	/* tx buf base */ 
 
	ppc860Chan [i].uart.txBufBase = (u_char *)  
					 (MPC860_DPRAM_BASE (regBase) 
					 + ppc860SmcParms[i].smcTxBufOff); 
	/* rx buf base */ 
 
	ppc860Chan [i].uart.rxBufBase = (u_char *)  
					 (MPC860_DPRAM_BASE (regBase) 
					 + ppc860SmcParms[i].smcRxBufOff); 
 
	/* transmit buffer size */ 
 
	ppc860Chan [i].uart.txBufSize = ppc860SmcParms[i].smcTxBufSz; 
 
	/* DPRAM addr of SMC1 params */ 
 
	ppc860Chan [i].uart.pSmc = (SMC *) ((UINT32) PPC860_DPR_SMC1  
					    (MPC860_DPRAM_BASE (regBase))  
					    + (i * 0x100)); 
 
	/* SMCMR1 for SMC1 */ 
 
	ppc860Chan [i].uart.pSmcReg = (SMC_REG *)  
				       ((UINT32) MPC860_SMCMR1 (regBase) 
				       + (i * 0x10)); 
 
	/* Mask interrupts */ 
 
	ppc860Chan [i].uart.pSmcReg->smcm = 0;               
 
	ppc860Chan [i].pBaud = (UINT32 *) ((UINT32) MPC860_BRGC1 (regBase) 
					    + (i * 4)); 
	ppc860Chan [i].channelMode = 0; 
 
	/* select RS232 pins */ 
 
	*MPC860_PBPAR(regBase) |= 0xC0 << (i * 4);       /*PB24,PB25*/ 
 
	/* set it to normal operations */ 
 
	*MPC860_SDCR(regBase) = SDCR_RAID_BR5;            
 
	/* reset the chip */ 
 
	ppc860DevInit(&(ppc860Chan [i])); 
        } 
 
        /*以上是对SMC口的初始化程序,SMC1为TTY设备0,SMC2为TTY设备1*/ 
           
      /*  scc2ModemInit();*/ 
       /*SCC2为标准MODEM串口*/  
    } 
 
/****************************************************************************** 
* 
* sysSerialHwInit2 - connect BSP serial device interrupts 
* 
* This routine connects the BSP serial device interrupts.  It is called from 
* sysHwInit2().  Serial device interrupts could not be connected in 
* sysSerialHwInit() because the kernel memory allocator was not initialized 
* at that point, and intConnect() calls malloc(). 
* 
* RETURNS: N/A 
*/  
 
void sysSerialHwInit2 (void) 
    { 
    int		i;	/* an index */ 
 
    /* connect serial interrupts */ 
 
    for (i = 0; i < chanNum; i++) 
	{ 
	switch (i) 
	    { 
	    case 0: 
 
		(void) intConnect (IV_SMC1, (VOIDFUNCPTR) ppc860Int,  
				   (int) &ppc860Chan [i]); 
		break; 
 
	    case 1: 
 
		(void) intConnect (IV_SMC2_PIP, (VOIDFUNCPTR)ppc860Int,  
				   (int)&ppc860Chan [i]); 
		break; 
 
	    default: 
		return; 
	    } 
 
	*CIMR(vxImmrGet()) |= (CIMR_SMC1 >> i); 
        } 
                 
       /* (void)intConnect(IV_SCC2,(VOIDFUNCPTR)scc2ModemInterrupt,(int)&scc2Modem); 
          
        *MPC860_CIMR(vxImmrGet())|=CIMR_SCC2;*/ 
        /*SCC2中断使能*/ 
    } 
 
/****************************************************************************** 
* 
* sysSerialChanGet - get the SIO_CHAN device associated with a serial channel 
* 
* This routine gets the SIO_CHAN device associated with a specified serial 
* channel. 
* 
* RETURNS: A pointer to the SIO_CHAN structure for the channel, or ERROR 
* if the channel is invalid. 
*/ 
 
SIO_CHAN * sysSerialChanGet 
    ( 
    int channel		/* serial channel */ 
    ) 
    { 
    if (channel >= chanNum) 
	return ((SIO_CHAN *) ERROR); 
 
    return ((SIO_CHAN *) &ppc860Chan [channel]); 
    } 
 
/******************************************************************************* 
* 
* sysSerialReset - reset the serail device  
* 
* This function calls sysSerialHwInit() to reset the serail device 
* 
* RETURNS: N/A 
* 
*/ 
 
void sysSerialReset (void) 
    { 
    sysSerialHwInit (); 
    } 
 
 
 
 
 
/*scc2通道初始化,结构PPC860SCC860 
  参数:无 
  返回值:无 
 */ 
/*void scc2ModemInit 
    ( 
    void 
    ) 
{ 
	UINT32 regBase; 
	int i=0; 
	 
	scc2Modem.clockRate      = BRGCLK_FREQ;*/	     
 
	/* IMMR reg has base adr */ 
 
	/*scc2Modem.regBase        = vxImmrGet();  	     
 
	regBase = scc2Modem.regBase; 
	 
	scc2Modem.creatFlag=0;*/ 
 
	/* use BRG3 for scc2 */ 
 
	/*scc2Modem.bgrNum         = 3;    
	 
	scc2Modem.scc2RingId=rngCreate(2*SCC2MODEM_RXBDNUM*SCC2MODEM_RXBUFFER);  */        
 
	/* ScC2 wired for rs232 */ 
 
	/*scc2Modem.uart.sccNum    = 2;        */           
 
	/* init the number of TBDs */ 
 
	/*scc2Modem.uart.txBdNum   = SCC2MODEM_TXBDNUM;    */               
 
	/* init the number of RBDs */ 
 
	/*scc2Modem.uart.rxBdNum   = SCC2MODEM_RXBDNUM;   */             
 
	/* transmit BD base adrs */ 
 
	/*scc2Modem.uart.txBdBase  = (SCC_BUF *)(0x2a00);*//*bd结构*/ 
 
	/* receive BD base adrs */ 
 
	/*scc2Modem.uart.rxBdBase  = (SCC_BUF *)(0x2b00);*/ /*bd结构*/ 
					  
	/* tx buf base */ 
 
	/*scc2Modem.uart.txBufBase = (u_char *)(scc2TxBuffer); */ 
					  
	/* rx buf base */ 
 
	/*scc2Modem.uart.rxBufBase = (u_char *)(scc2RxBuffer);*/ 
					  
 
	/* transmit buffer size */ 
 
	/*scc2Modem.uart.txBufSize = SCC2MODEM_TXBUFFER; 
	scc2Modem.uart.rxBufSize = SCC2MODEM_RXBUFFER;*/ 
 
	/* DPRAM addr of Scc2 params */ 
 
	/*scc2Modem.uart.pScc = (SCC *) ((UINT32) PPC860_DPR_SCC2 
				      (MPC860_DPRAM_BASE (regBase)));*/ 
					     
 
	/* scc2的寄存器 */ 
 
	/*scc2Modem.uart.pSccReg = (SCC_REG *)((UINT32) MPC860_GSMR_L2 (regBase));*/ 
				        
 
	/* Mask interrupts */ 
 
	/*scc2Modem.uart.pSccReg->sccm = 0;               
 
	scc2Modem.pBaud = (UINT32 *) ((UINT32) MPC860_BRGC3 (regBase)); 
	 
	scc2Modem.channelMode = 0; */ /*中断或轮询*/ 
 
	/* select RS232 pins ,CTS2,RTS2,CD2,TXD2,RXD2*/ 
 
	/**MPC860_PCPAR(regBase) &= 0xff3f ;  */     /*Pc8,Pc9,pcpar bit clear 0*/ 
	/**MPC860_PCDIR(regBase) &= 0xff3f ;   */    /*pc8,pc9,pcdir bit clear 0*/ 
	/**MPC860_PCSO(regBase)  |= 0x00c0 ;    */   /*pc8,pc9,pcso  bit set 1  */ 
	/**MPC860_PCPAR(regBase) |= 0x0020 ;     */  /*Pc16,pcpar bit set 1*/ 
	/**MPC860_PCDIR(regBase) &= 0xfffd ; */      /*pc14,pcdir bit clear 0*/ 
	/**MPC860_PAPAR(regBase) |= 0x000c ; */      /*pa12,pa13,papar bit set 1*/ 
	/**MPC860_PADIR(regBase) |= 0xfff3 ; */      /* pa12,pa13,padir bit clear 0*/    
 
	/*scc2Modem.pBaud=0x0001028c;	*//*50M/9600/16=326=0x146,产生9600波特率*/ 
	/* 
	*MPC860_SICR(regBase)&=0xffff00ff; 
	*MPC860_SICR(regBase)|=0x00001200;  */ /*brg3,NMSI*/ 
	 
	/**MPC860_SDCR(regBase) =0x00000001; */ /*Normal mode*/ 
	 
	/*scc2Modem.uart.pScc->param.tbase=SCC2_RBASE_OFFSET; *//*0xa00*/ 
	/*scc2Modem.uart.pScc->param.rbase=SCC2_TBASE_OFFSET; *//*0xb00*/ 
	 
	/*MPC860_CPCR(regBase)=0x0041;*/ /*write value to rbptr and tbptr*/ 
	 
	/*scc2Modem.uart.pScc->param.rfcr=0x10; *//*normal*/ 
	/*scc2Modem.uart.pScc->param.tfcr=0x10; *//*normal*/ 
	 
	/*scc2Modem.uart.pScc->param.mrblr=SCC2MODEM_RXBUFFER; *//*maxium buffer 1 bytes*/ 
	 
        /**SCC_MAX_IDL((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x0000; 
         
        *SCC_BRKCR((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x00011;*/ 
        /*only one break charcter*/ 
         
        /**SCC_PAREC((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x0000; 
        *SCC_FRMEC((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x0000; 
        *SCC_NOSEC((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x0000; 
        *SCC_BRKEC((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x0000;*/ 
        /*clear parec, frmec ,nosec , brkec*/ 
         
        /**SCC_UADDR1((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x0000; 
        *SCC_UADDR2((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x0000;*/ 
        /*clear UADDR1, UADDR2*/ 
         
        /**SCC_TOSEQ((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x0000;*/ 
        /*clear TOSEQ*/ 
         
        /**SCC_CHARACTER1((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x8000; 
        *SCC_CHARACTER2((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x8000; 
        *SCC_CHARACTER3((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x8000; 
        *SCC_CHARACTER4((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x8000; 
        *SCC_CHARACTER5((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x8000; 
        *SCC_CHARACTER6((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x8000; 
        *SCC_CHARACTER7((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x8000; 
        *SCC_CHARACTER8((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0x8000;*/ 
        /*clear from character1 to character8 */ 
         
        /**SCC_RCCM((UINT32)PPC860_DPR_SCC2(MPC860_DPRAM_BASE (regBase)))=0xc0ff;*/ 
        /*set rccm*/ 
         
        /*初始化BD*/ 
        /*for(i=0;iscce=0xffff;*/ 
         /*clear all previous events*/ 
          
         /*scc2Modem.uart.pSccReg->sccm=0x0001;*/ 
         /* enable  Rx interrupt 
            disable Tx interrupt*/ 
         
       /* *MPC860_CIMR(regBase)|=0x20000000;*/ 
        /*scc2 allowed to generate a sysytem interrupt*/ 
         
        /**MPC860_CICR(regBase)|=0x00000000;*/ 
        /*set cmp interrupt level ,default level 4*/ 
         
        /*scc2Modem.uart.pSccReg->gsmrh=0x00000020;*/ 
        /*a small Rx FIFO width*/ 
         
       /* scc2Modem.uart.pSccReg->gsmrl=0x00028004;*/ 
        /*uart mode ,normal operate*/ 
         
       /* scc2Modem.uart.pSccReg->psmr=0xb000;*/ 
        /*automatic flow control 
          8 bit characters 
          no parity 
          1 stop bit 
          asynchronous SCC UART operation*/ 
           
         
           
           
          /*scc2 uart initialization is over */ 
          /*writen by d.c.peng,4.29,2001*/  
/*}*/