www.pudn.com > 860bsp.rar > config.h
/* */
/* Copyright */
/*
modification history
--------------------
*/
/*
Example memory layout for a 32-megabyte board:
.CS
------------- 0x02000000= 64K DPRAM buffers
| |
-------------- 0x01ff0000= 64k QMC BD table
| |
-------------- 0x01fe0000 = LOCAL_MEM_SIZE = sysMemTop()
| |
| RAM |
| 0 filled |
| |
|------------| = (romInit+ROM_COPY_SIZE) or binArrayStart
| ROM image |
|----------- | 0x01800000 = RAM_HIGH_ADRS
| STACK_SAVE |
|------------|
| | 0x01F50000 = 31.3 Megabytes
| |
| |
| |
| |
| |
| |
| |
| 0 filled |
--------------
| |
| | 0x00010000 = RAM_ADRS & RAM_LOW_ADRS
| |
| | exc vectors, bp anchor, exc msg, bootline
| |
| |
-------------- 0x00000000 = LOCAL_MEM_LOCAL_ADRS
.CE
.CS
--------------
| ROM |
| | 0x028xxxxx = binArrayStart
| |
| | 0x02800100 = ROM_TEXT_ADRS
-------------- 0x02800000 = ROM_BASE_ADRS
*/
#ifndef INCconfigh
#define INCconfigh
/* BSP version/revision identification, should be placed
* before #include "configAll.h"
*/
#define BSP_VER_1_2 1
#define BSP_VER_1_1 1
#define BSP_VERSION "1.4"
#define BSP_REV ".4" /* 0 for the first bsp revision */
#include "configAll.h"
#define DEFAULT_BOOT_LINE \
"cpm(0,0)whlai:c:/target/vxWorks h=169.0.1.6 e=169.0.1.91:ffff0000 u=szxinwei pw=szxinwei f=0x00 tn=bsc860"
#define INCLUDE_SDRAM /* to define in case of SDRAM */
/* Cache and MMU not supported */
#define INCLUDE_CACHE_SUPPORT
#define USER_I_CACHE_ENABLE
#define USER_D_CACHE_ENABLE
#define USER_I_MMU_ENABLE
#define USER_D_MMU_ENABLE
#define INCLUDE_MMU_BASIC
/* Number of TTY definition */
#undef NUM_TTY
#define NUM_TTY 1
/* defined in bsc860.h */
/* clock rates */
#define SYS_CLK_RATE_MIN 1 /* minimum system clock rate */
#define SYS_CLK_RATE_MAX 8000 /* maximum system clock rate */
#define AUX_CLK_RATE_MIN 1 /* minimum auxiliary clock rate */
#define AUX_CLK_RATE_MAX 8000 /* maximum auxiliary clock rate */
/*
* Cristal Frequency - This macro defines the input oscillator frequency
* clocking the PPC860.
*/
#define CRISTAL_FREQ 50000000 /* 50 Mhz */
#define SPLL_FREQ_REQUESTED 50000000
/*
* DRAM refresh frequency - This macro defines the DRAM refresh frequency.
* e.i: A DRAM with 1024 rows to refresh in 16ms:
* DRAM_REFRESH_FREQ = 1024/ 16E-3 = 64E3 hz
*/
#define DRAM_REFRESH_FREQ SDRAM_REFRESH_FREQ /* defined in ads860.h*/
/*
* Baud Rate Generator division factor - 0 for division by 1
* 1 for division by 4
* 2 for division by 16
* 3 for division by 64
*/
#define BRGCLK_DIV_FACTOR 0
#define INCLUDE_END
#define INCLUDE_CPM /* include the CPM ethernet driver */
/* remove unnecessary drivers */
#undef INCLUDE_BP
#undef INCLUDE_EX
#undef INCLUDE_ENP
#undef INCLUDE_SM_NET
#undef INCLUDE_SM_SEQ_ADD
/* miscellaneous definitions */
#define NV_RAM_SIZE 0x00000000 /* 8M NVRAM */
/* Memory addresses */
#define LOCAL_MEM_LOCAL_ADRS 0x00000000 /* Base of RAM */
#define LOCAL_MEM_SIZE 0x01fe0000 /* 32 Mbyte memory available */
/* 64k for dpram buffer*/
/* 64k for QMC BD table*/
/*
* The constants ROM_TEXT_ADRS, ROM_SIZE, and RAM_HIGH_ADRS are defined
* in config.h, MakeSkel, Makefile, and Makefile.*
* All definitions for these constants must be identical.
*/
#define ROM_BASE_ADRS 0x30000000 /* base address of ROM */
#define ROM_TEXT_ADRS ROM_BASE_ADRS + 0x100
#define ROM_SIZE 0x00800000 /* 512k ROM space */
/* bootrom constants define */
#define BOOTROM_BASE_ADRS 0x02800000 /* base address of BOOTROM */
#define BOOTROM_TEXT_ADRS BOOTROM_BASE_ADRS + 0x100
#define BOOTROM_SIZE 0x00800000 /* 512k ROM space */
/* RAM address for ROM boot */
#define RAM_HIGH_ADRS (LOCAL_MEM_LOCAL_ADRS + 0x00700000)
/* RAM address for sys image */
#define RAM_LOW_ADRS (LOCAL_MEM_LOCAL_ADRS + 0x00010000)
#define USER_RESERVED_MEM 0x00 /* user reserved memory size */
/*
* Default power management mode - selected via vxPowerModeSet() in
* sysHwInit().
*/
#define DEFAULT_POWER_MGT_MODE VX_POWER_MODE_DISABLE
#include "bsc860.h" /* include the bsc860 params */
#endif /* INCconfigh */
#if defined(PRJ_BUILD)
#include "prjParams.h"
#endif