www.pudn.com > hpbios.rar > 686_UAR2.ASX
//----------------------------------------------------------------------------
//Rev Date Name Description
//---------------------------------------------------------------------------
//R07 01/27/00 GAR Add report ASKIR as UART2
//R06 12/01/99 GAR Add DISE to judge turn IRDA device off or not
//R05 05/11/99 ADS Remove _PRW Object
//R04 05/11/99 ADS For HCT 8.1 Convert PnP/APM to ACPI fail
//R03 04/23/99 ADS Fixed Win98 Device Node UAR2 can't disable
//R02 03/30/99 RIC Fixed that Win98 Device Node report error in disabling
// VIA 686 Superio in BIOS Setup.
//R01 02/04/99 RIC Fixed that LPT/COM1/CMO2 can't be disabled in ACPI OS.
//R00 12/02/98 ADS Start of Definitions for VT686 super I/O device
//*************************************************************************//
//* UART2 DEVICE *//
//*************************************************************************//
Device(UAR2) { //UAR2 Device
Name(_HID,EISAID("PNP0501")) //Hardware Device ID
Name(_UID,0x2)
Method(_STA,0) { //Status
//R04 If(LNot(\_SB.PCI0.PIB.EP3C)) {
//R04 Return(0x00) // Not present
//R04 } // end if
//R04 start
Store(0x8000[VT686_DEV_FUN0]84, PIND)
Store(PDAT, Local0)
And(Local0, 0x00000100, Local0) // VT686 Function 0 Rx85 bit 0
If(LNot(Local0)) {
Return(0x00)
} //end if
//R04 end
Else { //R02
ENFG() // Enter Config Mode
Store(CRCE, Local0) // Read UMR register
And(Local0, 0x38, Local0) // Bit5-3: UART2 Mode
//R07 If(LEqual(Local0, 0x00)) { // 000: Standard
If(LNotEqual(Local0, 0x08)) { //R07 001: IRDA
//Don't Disable UART2 for UART1 bug
//Store(CRC2, Local1) // Read FSR register
//And(Local1, 0x08, Local1) // bit3 UART2 enable
//If(LNotEqual(Local1, 0x00)) {
// EXFG()
// Return(0x0F) //present, enable, UI, functioning
//} // end if
Store(CRC2, Local1) // Read SAR2 register //R02 - starts
And(Local1, 0x08, Local1) // bit3 UART2 enable
If(LNotEqual(Local1, 0x00)) {
EXFG()
Return(0x0F) //present, enable, UI, functioning
} // end if
else { //R02 - ends
Store(CRC8, Local1) // Read UART2 IO register
If(LNotEqual(Local1, 0x00)) {
EXFG()
//R02 Return(0x0F) //present, enable, UI, functioning
Return(0x0D) //present, enable, UI, functioning //R02
} // end if
Else {
EXFG()
//R02 Return(0x0D) //present, disable, UI, functioning
Return(0x00) //present, disable, UI, functioning //R02
} // end else
} // end else //R02
} // end if
Else { // IrDA
EXFG()
Return(0x00)
} // end else
} // end Else //R02
} // end of _STA method
Method(_DIS,0) { // Disable
//R01 - start
ENFG()
And(CRC2,0xF7,CRC2) // Disable UART2
EXFG()
//R01 - end
} //end _DIS method
Method(_CRS,0) { // Current Serial 2 Resource
Name(BFU2, ResourceTemplate(){
IO(
Decode16,
0x02F8, // Min base I/O addr, UIO2._MIN
0x02F8, // Max base I/O addr, UIO2._MAX
0x08, // Base alignment
0x08, // Number of contig I/O ports
UIO2
)
IRQNoFlags(
UIRQ
)
{0x03} // IRQ 3, UIRQ._INT
} // end Resource Template
) // end buffer BFU2
CreateWordField (BFU2, UIO2._MIN, IMIN) //IO MIN address
CreateWordField (BFU2, UIO2._MAX, IMAX) //IO MAX address
CreateWordField (BFU2, UIRQ._INT, IRQ0) //IRQ Mask
ENFG() // Enter Config Mode
Store(CRC8, Local0) // Read UART2 FSR register
Store(Local0, Local1) // Local1: IOUH, Local0: IOUL
And(Local1, 0x00C0, Local1) // CRC8:
ShiftLeft(Local1, 0x02, Local1) // Bit7-6: ADR9-8
And(Local0, 0x003F, Local0) // Bit5-1: ADR7-3
ShiftLeft(Local0, 0x02, Local0) // Bit0: 0
Or(Local0, Local1, Local0)
Store(Local0, IMIN)
Store(Local0, IMAX)
EXFG() // Exit Config Mode
Store(\_SB.PCI0.PIB.U2IR, Local0) //Get UART2 IRQ Value
Store(0x01, Local1)
ShiftLeft(Local1, Local0, IRQ0)
Return(BFU2) //Return BFU2
} //end _CRS method
Name(_PRS, ResourceTemplate(){
// First Possible Config 3F8, IRQ 4
StartDependentFnNoPri(){
IO(
Decode16,
0x03F8, // Min base I/O addr
0x03F8, // Max base I/O addr
0x08, // Base alignment
0x08 // Number of contig I/O ports
)
IRQNoFlags()
{0x04} // IRQ 4
} // end first dependent function
// Second Possible Config 2F8 IRQ 3
StartDependentFnNoPri(){
IO(
Decode16,
0x02F8, // Min base I/O addr
0x02F8, // Max base I/O addr
0x08, // Base alignment
0x08 // Number of contig I/O ports
)
IRQNoFlags()
{0x03} // IRQ 3
} // end second dependent function
// Third Possible Config 3E8 IRQ 4
StartDependentFnNoPri(){
IO(
Decode16,
0x03E8, // Min base I/O addr
0x03E8, // Max base I/O addr
0x08, // Base alignment
0x08 // Number of contig I/O ports
)
IRQNoFlags()
{0x04} // IRQ 4
} // end third dependent function
// Fourth Possible Config 2E8 IRQ 3
StartDependentFnNoPri(){
IO(
Decode16,
0x02E8, // Min base I/O addr
0x02E8, // Max base I/O addr
0x08, // Base alignment
0x08 // Number of contig I/O ports
)
IRQNoFlags()
{0x03} // IRQ 3
} // end fourth dependent function
EndDependentFn() // end dependent functions
} // end Resource Template
) // end _PRS
Method(_SRS,1) { //Set Resource
CreateByteField (Arg0, 0x02, IOLO) //IO Port Low
CreateByteField (Arg0, 0x03, IOHI) //IO Port High
CreateWordField (Arg0, 0x09, IRQ0) //IRQ MASK
ENFG() // Enter Config Mode
Store(CRC2,Local0) // Disable UART2
And(Local0,0xF7,Local1)
Store(Local1,CRC2)
Store(IOLO, Local0) //Set IO
ShiftRight(Local0, 0x02, Local0) //UART2 IO: CRC8
And(Local0, 0xFE, Local0) //Bit7-1 = ADR9-3
Store(IOHI, Local1) //Bit0 = 0
ShiftLeft(Local1, 0x06, Local1)
Or(Local0, Local1, Local0)
Store(Local0, CRC8)
FindSetRightBit(IRQ0, Local0) //Set IRQ
If(LGreater(Local0, 0x00)) {
Decrement(Local0)
}
Store(Local0, \_SB.PCI0.PIB.U2IR)
Store(CRC2,Local0) // Enable UART1
Or(Local0,0x08,Local1)
Store(Local1,CRC2)
EXFG() // Exit Config Mode
} //End of _SRS Method
//R05 Name(_PRW, Package(2) {0x08, 4})
// package (argnum) {GPEbit, wakelevel}
// GP_STS.08,
// lowest sleep state is S4
// no relative power resource
} // end of UART2 device
Device(IrDA) { //UAR1 Device
Name(_HID,EISAID("PNP0510")) //Hardware Device ID
Method(_STA,0) { //Status
//R04 If(LNot(\_SB.PCI0.PIB.EP3C)) {
//R04 Return(0x00) // Not present
//R04 } // end if
//R04 start
Store(0x8000[VT686_DEV_FUN0]84, PIND)
Store(PDAT, Local0)
And(Local0, 0x00000100, Local0) // VT686 Function 0 Rx85 bit 0
If(LNot(Local0)) {
Return(0x00)
} //end if
//R04 end
ENFG() // Enter Config Mode
Store(CRCE, Local0) // Read UMR register
And(Local0, 0x38, Local0) // Bit5-3: UART2 Mode
If(LEqual(Local0, 0x08)) { // 001: IrDA
//Don't Disable UART2 for UART1 bug
//Store(CRC2, Local1) // Read FSR register
//And(Local1, 0x08, Local1) // bit3 UART2 enable
//If(LNotEqual(Local1, 0x00)) {
// EXFG()
// Return(0x0F) //present, enable, UI, functioning
//} // end if
Store(CRC8, Local1) // Read UART2 IO register
If(LNotEqual(Local1, 0x00)) {
EXFG()
Return(0x0F) //present, enable, UI, functioning
} // end if
Else {
EXFG()
Return(0x0D) //present, disable, UI, functioning
} // end else
} // end if
Else { // Standard
EXFG()
Return(0x00)
} // end else
} // end of _STA method
Method(_DIS,0) { //Disable
If(LEqual(DISE, 0x1)) //R06
{ //R06
//R03 - start
ENFG()
And(CRCE,0xC7,CRCE) // Disable UART2
EXFG()
//R03 - end
} //R06
Store(Local0, Local0) //R06
} //end _DIS method
Method(_CRS,0) { // Current Serial 2 Resource
Name(BFU2, ResourceTemplate(){
IO(
Decode16,
0x02F8, // Min base I/O addr, UIO2._MIN
0x02F8, // Max base I/O addr, UIO2._MAX
0x08, // Base alignment
0x08, // Number of contig I/O ports
UIO2
)
IRQNoFlags(
UIRQ
)
{0x03} // IRQ 3, UIRQ._INT
} // end Resource Template
) // end buffer BFU2
CreateWordField (BFU2, UIO2._MIN, IMIN) //IO MIN address
CreateWordField (BFU2, UIO2._MAX, IMAX) //IO MAX address
CreateWordField (BFU2, UIRQ._INT, IRQ0) //IRQ Mask
ENFG() // Enter Config Mode
Store(CRC8, Local0) // Read UART2 FSR register
Store(Local0, Local1) // Local1: IOUH, Local0: IOUL
And(Local1, 0x00C0, Local1) // CRC8:
ShiftLeft(Local1, 0x02, Local1) // Bit7-6: ADR9-8
And(Local0, 0x003F, Local0) // Bit5-1: ADR7-3
ShiftLeft(Local0, 0x02, Local0) // Bit0: 0
Or(Local0, Local1, Local0)
Store(Local0, IMIN)
Store(Local0, IMAX)
EXFG() // Exit Config Mode
Store(\_SB.PCI0.PIB.U2IR, Local0) //Get UART2 IRQ Value
Store(0x01, Local1)
ShiftLeft(Local1, Local0, IRQ0)
Return(BFU2) //Return BFU2
} //end _CRS method
Name(_PRS, ResourceTemplate(){
// First Possible Config 3F8, IRQ 4
StartDependentFnNoPri(){
IO(
Decode16,
0x03F8, // Min base I/O addr
0x03F8, // Max base I/O addr
0x08, // Base alignment
0x08 // Number of contig I/O ports
)
IRQNoFlags()
{0x04} // IRQ 4
} // end first dependent function
// Second Possible Config 2F8 IRQ 3
StartDependentFnNoPri(){
IO(
Decode16,
0x02F8, // Min base I/O addr
0x02F8, // Max base I/O addr
0x08, // Base alignment
0x08 // Number of contig I/O ports
)
IRQNoFlags()
{0x03} // IRQ 3
} // end second dependent function
// Third Possible Config 3E8 IRQ 4
StartDependentFnNoPri(){
IO(
Decode16,
0x03E8, // Min base I/O addr
0x03E8, // Max base I/O addr
0x08, // Base alignment
0x08 // Number of contig I/O ports
)
IRQNoFlags()
{0x04} // IRQ 4
} // end third dependent function
// Fourth Possible Config 2E8 IRQ 3
StartDependentFnNoPri(){
IO(
Decode16,
0x02E8, // Min base I/O addr
0x02E8, // Max base I/O addr
0x08, // Base alignment
0x08 // Number of contig I/O ports
)
IRQNoFlags()
{0x03} // IRQ 3
} // end fourth dependent function
EndDependentFn() // end dependent functions
} // end Resource Template
) // end _PRS
Method(_SRS,1) { //Set Resource
CreateByteField (Arg0, 0x02, IOLO) //IO Port Low
CreateByteField (Arg0, 0x03, IOHI) //IO Port High
CreateWordField (Arg0, 0x09, IRQ0) //IRQ MASK
ENFG() // Enter Config Mode
Store(CRC2,Local0) // Disable UART2
And(Local0,0xF7,Local1)
Store(Local1,CRC2)
Store(IOLO, Local0) //Set IO
ShiftRight(Local0, 0x02, Local0) //UART2 IO: CRC8
And(Local0, 0xFE, Local0) //Bit7-1 = ADR9-3
Store(IOHI, Local1) //Bit0 = 0
ShiftLeft(Local1, 0x06, Local1)
Or(Local0, Local1, Local0)
Store(Local0, CRC8)
FindSetRightBit(IRQ0, Local0) //Set IRQ
If(LGreater(Local0, 0x00)) {
Decrement(Local0)
}
Store(Local0, \_SB.PCI0.PIB.U2IR)
Store(CRC2,Local0) // Enable UART2
Or(Local0,0x08,Local1)
Store(Local1,CRC2)
EXFG() // Exit Config Mode
} //End of _SRS Method
} // end of IrDA device